_PL011_UART_REGISTERS Struct Reference

#include <pl011.h>

Data Fields
uint32_t	dr
	Data Register.
uint32_t	rsrecr
	Receive Status Register / Error Clear Register.
uint32_t	reserved01
uint32_t	reserved02
uint32_t	reserved03
uint32_t	reserved04
uint32_t	fr
	Flag register.
uint32_t	reserved05
uint32_t	ilpr
	IrDA Low-Power Counter Register.
uint32_t	ibrd
	Integer Baud rate divisor.
uint32_t	fbrd
	Fractional Baud rate divisor.
uint32_t	lcrh
	Line Control register.
uint32_t	cr
	Control register.
uint32_t	ifls
	Interrupt FIFO Level Select Register.
uint32_t	imsc
	Interrupt Mask Set Clear Register.
uint32_t	ris
	Raw Interrupt Status Register.
uint32_t	mis
	Masked Interrupt Status Register.
uint32_t	icr
	Interrupt Clear Register.
uint32_t	dmacr
	DMA Control Register.
uint32_t	reserved11
uint32_t	reserved12
uint32_t	reserved13
uint32_t	reserved14
uint32_t	reserved15
uint32_t	reserved16
uint32_t	reserved17
uint32_t	reserved18
uint32_t	reserved19
uint32_t	reserved1a
uint32_t	reserved1b
uint32_t	reserved1c
uint32_t	reserved1d
uint32_t	itcr
	Test Control Register.
uint32_t	itip
	Integration Test Input Register.
uint32_t	itop
	Integration Test Output Register.
uint32_t	tdr
	Test Data Register.

Field Documentation

dr

uint32_t dr

Data Register.

rsrecr

uint32_t rsrecr

Receive Status Register / Error Clear Register.

reserved01

uint32_t reserved01

reserved02

uint32_t reserved02

reserved03

uint32_t reserved03

reserved04

uint32_t reserved04

fr

uint32_t fr

Flag register.

reserved05

uint32_t reserved05

ilpr

uint32_t ilpr

IrDA Low-Power Counter Register.

ibrd

uint32_t ibrd

Integer Baud rate divisor.

fbrd

uint32_t fbrd

Fractional Baud rate divisor.

lcrh

uint32_t lcrh

Line Control register.

cr

uint32_t cr

Control register.

ifls

uint32_t ifls

Interrupt FIFO Level Select Register.

imsc

uint32_t imsc

Interrupt Mask Set Clear Register.

ris

uint32_t ris

Raw Interrupt Status Register.

mis

uint32_t mis

Masked Interrupt Status Register.

icr

uint32_t icr

Interrupt Clear Register.

dmacr

uint32_t dmacr

DMA Control Register.

reserved11

uint32_t reserved11

reserved12

uint32_t reserved12

reserved13

uint32_t reserved13

reserved14

uint32_t reserved14

reserved15

uint32_t reserved15

reserved16

uint32_t reserved16

reserved17

uint32_t reserved17

reserved18

uint32_t reserved18

reserved19

uint32_t reserved19

reserved1a

uint32_t reserved1a

reserved1b

uint32_t reserved1b

reserved1c

uint32_t reserved1c

reserved1d

uint32_t reserved1d

itcr

uint32_t itcr

Test Control Register.

itip

uint32_t itip

Integration Test Input Register.

itop

uint32_t itop

Integration Test Output Register.

tdr

uint32_t tdr

Test Data Register.

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The documentation for this struct was generated from the following file:

• ultibo/drivers/pl011.h