#include <bcmsdhost.h>
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| SDHCI_HOST | sdhci |
| uint32_t | irq |
| | The IRQ number for this device.
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| SPIN_HANDLE | lock |
| | Host lock (Differs from lock in Host portion) (Spin lock due to use by interrupt handler).
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| LONGBOOL | enablefiq |
| | Use FIQ instead of IRQ.
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| uint32_t | gpiofirst |
| | The starting pin number for GPIO assignments (or GPIO_PIN_UNKNOWN if externally configured).
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| uint32_t | gpiolast |
| | The ending pin number for GPIO assignments (or GPIO_PIN_UNKNOWN if externally configured).
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| uint32_t | gpiofunction |
| | The function number for GPIO assignments (or GPIO_FUNCTION_UNKNOWN if externally configured).
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| uint32_t | clockdivider |
| | Cached Clock Divider (CDIV) register.
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| uint32_t | hostconfiguration |
| | Cached Host Configuration (HCFG) register.
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| LONGBOOL | firmwaresetsclockdivider |
| | True if the firmware controls the clock divider.
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| uint32_t | commandquickpollretries |
| uint32_t | nanosecondsperfifoword |
| LONGBOOL | allowdma |
| | Allow DMA to be used for data transfers.
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| LONGBOOL | resetclock |
| | Reset the clock for the next request.
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| uint32_t | maxdelay |
| | Maximum length of time spent waiting (in Milliseconds).
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| int64_t | stoptime |
| | When the last stop was issued (in Clock Ticks).
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| uint32_t | drainwords |
| | Last words of FIFO to drain on DMA read.
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| uint32_t | drainoffset |
| | Offset for data during FIFO drain on DMA read.
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| LONGBOOL | usesbc |
| | Use CMD23 (Set Block Count) for the current transfer.
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| LONGBOOL | usebusy |
| | Wait for busy interrupt on current command.
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| uint32_t | delayafterstop |
| | Minimum time between stop and subsequent data transfer (in Microseconds).
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| uint32_t | delayafterthisstop |
| | Minimum time between this stop and subsequent data transfer (in Microseconds).
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| uint32_t | useroverclock50 |
| | User's preferred frequency to use when 50MHz is requested (in MHz).
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| uint32_t | overclock50 |
| | Frequency to use when 50MHz is requested (in MHz).
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| uint32_t | overclock |
| | Current frequency if overclocked, else zero (in Hz).
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| uint32_t | piolimit |
| | Maximum block count for PIO (0 = always DMA / 0x7FFFFFF = always PIO).
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| uint32_t | piotimeout |
| | PIO Read or Write block timeout (in milliseconds).
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◆ sdhci
◆ irq
The IRQ number for this device.
◆ lock
Host lock (Differs from lock in Host portion) (Spin lock due to use by interrupt handler).
◆ enablefiq
◆ gpiofirst
The starting pin number for GPIO assignments (or GPIO_PIN_UNKNOWN if externally configured).
◆ gpiolast
The ending pin number for GPIO assignments (or GPIO_PIN_UNKNOWN if externally configured).
◆ gpiofunction
The function number for GPIO assignments (or GPIO_FUNCTION_UNKNOWN if externally configured).
◆ clockdivider
Cached Clock Divider (CDIV) register.
◆ hostconfiguration
| uint32_t hostconfiguration |
Cached Host Configuration (HCFG) register.
◆ firmwaresetsclockdivider
True if the firmware controls the clock divider.
◆ commandquickpollretries
| uint32_t commandquickpollretries |
◆ nanosecondsperfifoword
| uint32_t nanosecondsperfifoword |
◆ allowdma
Allow DMA to be used for data transfers.
◆ resetclock
Reset the clock for the next request.
◆ maxdelay
Maximum length of time spent waiting (in Milliseconds).
◆ stoptime
When the last stop was issued (in Clock Ticks).
◆ drainwords
Last words of FIFO to drain on DMA read.
◆ drainoffset
Offset for data during FIFO drain on DMA read.
◆ usesbc
Use CMD23 (Set Block Count) for the current transfer.
◆ usebusy
Wait for busy interrupt on current command.
◆ delayafterstop
Minimum time between stop and subsequent data transfer (in Microseconds).
◆ delayafterthisstop
| uint32_t delayafterthisstop |
Minimum time between this stop and subsequent data transfer (in Microseconds).
◆ useroverclock50
User's preferred frequency to use when 50MHz is requested (in MHz).
◆ overclock50
Frequency to use when 50MHz is requested (in MHz).
◆ overclock
Current frequency if overclocked, else zero (in Hz).
◆ piolimit
Maximum block count for PIO (0 = always DMA / 0x7FFFFFF = always PIO).
◆ piotimeout
PIO Read or Write block timeout (in milliseconds).
The documentation for this struct was generated from the following file: