PACKED Struct Reference

#include <smc91x.h>

Data Fields
uint16_t	tcr
	Transmit Control Register.
uint16_t	eph_status
	EPH Status Register.
uint16_t	rcr
	Receive Control Register.
uint16_t	counter
	Counter Register.
uint16_t	mir
	Memory Information Register.
uint16_t	rpcr
	Receive/Phy Control Register.
uint16_t	reserved
	Reserved.
uint16_t	bank
	Bank Select Register.
uint16_t	config
	Configuration Register.
uint16_t	base
	Base Address Register.
uint16_t	addr0
	Individual Address Registers (0 and 1).
uint16_t	addr1
	Individual Address Registers (2 and 3).
uint16_t	addr2
	Individual Address Registers (4 and 5).
uint16_t	gp
	General Purpose Register.
uint16_t	ctl
	Control Register.
uint16_t	fifo
struct {
uint8_t   tx
uint8_t   rx
};
uint32_t	data
struct {
uint16_t   datah
uint16_t   datal
};
struct {
uint8_t   data0
uint8_t   data1
uint8_t   data2
uint8_t   data3
};
uint16_t	mmu_cmd
	MMU Command Register.
uint8_t	pn
	Packet Number Register.
uint8_t	ar
	Allocation Result Register.
SMC91X_FIFO_REGISTERS	fifo
	FIFO Ports Register.
uint16_t	ptr
	Pointer Register.
SMC91X_DATA_REGISTERS	data
	Data Register.
uint8_t	int_sts
	Interrupt Status Register.
uint8_t	im
	Interrupt Mask Register.
uint16_t	mcast1
	Multicast Table Registers (0 and 1).
uint16_t	mcast2
	Multicast Table Registers (2 and 3).
uint16_t	mcast3
	Multicast Table Registers (4 and 5).
uint16_t	mcast4
	Multicast Table Registers (6 and 7).
uint16_t	mii
	Management Interface Register.
uint16_t	rev
	Revision Register.
uint16_t	rcv
	RCV Register.

Detailed Description

Register 20. Reserved - Structure and Bit Definition Nothing SMC91X specific types Layout of the SMC91X registers

Field Documentation

tcr

uint16_t tcr

Transmit Control Register.

eph_status

uint16_t eph_status

EPH Status Register.

rcr

uint16_t rcr

Receive Control Register.

counter

uint16_t counter

Counter Register.

mir

uint16_t mir

Memory Information Register.

rpcr

uint16_t rpcr

Receive/Phy Control Register.

reserved

uint16_t reserved

Reserved.

bank

uint16_t bank

Bank Select Register.

config

uint16_t config

Configuration Register.

base

uint16_t base

Base Address Register.

addr0

uint16_t addr0

Individual Address Registers (0 and 1).

addr1

uint16_t addr1

Individual Address Registers (2 and 3).

addr2

uint16_t addr2

Individual Address Registers (4 and 5).

gp

uint16_t gp

General Purpose Register.

ctl

uint16_t ctl

Control Register.

fifo [1/2]

uint16_t fifo

tx

uint8_t tx

rx

uint8_t rx

[struct]

struct { ... }

data [1/2]

uint32_t data

datah

uint16_t datah

datal

uint16_t datal

[struct]

struct { ... }

data0

uint8_t data0

data1

uint8_t data1

data2

uint8_t data2

data3

uint8_t data3

[struct]

struct { ... }

mmu_cmd

uint16_t mmu_cmd

MMU Command Register.

pn

uint8_t pn

Packet Number Register.

ar

uint8_t ar

Allocation Result Register.

fifo [2/2]

SMC91X_FIFO_REGISTERS fifo

FIFO Ports Register.

ptr

uint16_t ptr

Pointer Register.

data [2/2]

SMC91X_DATA_REGISTERS data

Data Register.

int_sts

uint8_t int_sts

Interrupt Status Register.

im

uint8_t im

Interrupt Mask Register.

mcast1

uint16_t mcast1

Multicast Table Registers (0 and 1).

mcast2

uint16_t mcast2

Multicast Table Registers (2 and 3).

mcast3

uint16_t mcast3

Multicast Table Registers (4 and 5).

mcast4

uint16_t mcast4

Multicast Table Registers (6 and 7).

mii

uint16_t mii

Management Interface Register.

rev

uint16_t rev

Revision Register.

rcv

uint16_t rcv

RCV Register.

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The documentation for this struct was generated from the following file:

• ultibo/drivers/smc91x.h