Unit PlatformRPi4

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While it might be possible to read the SD card during boot, check for a config.txt and parse it to determine the value of the enable_gic setting, to be fully functional this process would also need to parse the device tree information (if available) and check for a compatible GIC node. Even then that doesn't account for booting from USB, network or some other source and all of that would have to happen very early in the boot sequence to be usable.

To make matters worse there doesn't appear to be a documented way to detect which interrupt controller is enabled by reading a register value, the GIC even behaves as though it is working when the legacy controller is enabled but no interrupts are received.

To ensure a level of reliability regardless of what firmware and files and configuration settings are present Ultibo implements drivers for both the GIC and legacy interrupt controllers and includes a detection mechanism during early stage boot.

In simple terms the boot process configures the GIC and then installs an interrupt handler for the generic virtual timer and configures the timer to fire in 1ms before enabling interrupts. It then waits 2ms and disables interrupts, unconfigures the timer and deregisters the interrupt handler.

If the test worked the local variable GICAvailable will have been set by the handler to RPI4_GIC_AVAILABLE, if not the variable will remain at RPI4_GIC_UNAVAILABLE and the boot process will proceed to configure the legacy interrupt controller for use.

This is not an ideal mechanism and could potentially fail for other reasons (although it is carefully constructed to avoid many potential failures) but at present is the best option for allowing the boot process to succeed regardless of the firmware behavior.

`RPI4_SECURE_BOOT = $00000001;`	If 1 then startup will attempt to switch back to secure world during boot process (Moved to ARMSecureBoot)
`RPI4_SECURE_BOOT_OFFSET = $000000D4;`	The address of the Secure Boot marker in the ARM boot stub
`RPI4_SECURE_BOOT_MARKER = $58495052;`	The Secure Boot marker (ASCII "RPIX")
`RPI4_SECURE_BOOT_CIRCLE = $53514946;`	The alternate Secure Boot marker (ASCII "FIQS") (As used by Circle)

`RPI4_PAGE_DIRECTORY_BASE = $00002000;`	Place the first level Page Directory after the interrupt vectors at 0x00001000 and before the first level Page Table at 0x00004000
`RPI4_PAGE_DIRECTORY_SIZE = SIZE_4K;`	ARM Cortex A72 first level Page Table is up to 4KB in size (512 64 bit (8 byte) entries)

`RPI4_PAGE_TABLE_BASE = $00004000;`	Place the second level Page Table after the first level Page Directory at 0x00002000 and before the code start at 0x00008000
`RPI4_PAGE_TABLE_SIZE = SIZE_16K;`	ARM Cortex A72 second level Page Table is exactly 16KB in size (4 x 512 64 bit (8 byte) entries)

`RPI4_VECTOR_TABLE_BASE = $00001000;`	Place the Interrupt Vector Table at 0x00001000 before the code start at 0x00008000
`RPI4_VECTOR_TABLE_SIZE = SIZE_64;`	The Interrupt Vector Table is exactly 64 bytes (16 32 bit (4 byte) entries)
`RPI4_VECTOR_TABLE_COUNT = 8;`	The Interrupt Vector Table contains 8 entries on an ARMv7 device

`RPI4_CPU_COUNT = BCM2838_CPU_COUNT;`
`RPI4_CPU_BOOT = CPU_ID_0;`
`RPI4_CPU_MASK = CPU_AFFINITY_0 or CPU_AFFINITY_1 or CPU_AFFINITY_2 or CPU_AFFINITY_3;`

`RPI4_CORE_TIMER_PRESCALER = $25ED098;`	Divide the Crystal Clock by 54 to give a 1MHz Core Timer
`RPI4_CORE_TIMER_FREQUENCY = 1000000;`	The Core Timer frequency from the prescaler setting above
`RPI4_GENERIC_TIMER_FREQUENCY = 1000000;`	The ARM Generic Timer frequency from the prescaler setting above

`RPI4_CORE_TIMER_PRESCALER = $80000000;`	Divide the Crystal Clock by 1 to give a 54MHz Core Timer
`RPI4_CORE_TIMER_FREQUENCY = 54000000;`	The Core Timer frequency from the prescaler setting above
`RPI4_GENERIC_TIMER_FREQUENCY = 54000000;`	The ARM Generic Timer frequency from the prescaler setting above

`RPI4_KERNEL_NAME = 'kernel7l.img';`
`RPI4_KERNEL_NAME = 'kernel8.img';`
`RPI4_KERNEL_CONFIG = 'config.txt';`
`RPI4_KERNEL_COMMAND = 'cmdline.txt';`
`RPI4_FIRMWARE_FILES = 'start4.elf,fixup4.dat,armstub32-rpi4.bin,armstub64-rpi4.bin';`
`RPI4_DTB_FILES = 'bcm2711-rpi-4-b.dtb,bcm2711-rpi-400.dtb,bcm2711-rpi-cm4.dtb,bcm2711-rpi-cm4s.dtb';`

`RPI4_GPIO_ACTLED_GPFSEL = BCM2838_GPFSEL4;`	GPFSEL register for ACT LED
`RPI4_GPIO_ACTLED_GPSET = BCM2838_GPSET1;`	GPSET register for ACT LED
`RPI4_GPIO_ACTLED_GPCLR = BCM2838_GPCLR1;`	GPCLR register for ACT LED
`RPI4_GPIO_ACTLED_GPPUD = BCM2838_GPPUD2;`	GPPUD register for ACT LED

`RPI4_GPIO_ACTLED_GPFSHIFT = 6;`	GPFSEL register shift for ACT LED
`RPI4_GPIO_ACTLED_GPFMASK = BCM2838_GPFSEL_MASK;`	GPFSEL register mask for ACT LED

`RPI4_GPIO_ACTLED_GPSHIFT = (42 - 32);`	GPSET/GPCLR register shift for ACT LED
`RPI4_GPIO_ACTLED_GPMASK = BCM2838_GPSET_MASK;`	GPSET/GPCLR register mask for ACT LED

`RPI4_GPIO_ACTLED_GPPUDSHIFT = 20;`	GPPUD register shift for ACT LED
`RPI4_GPIO_ACTLED_GPPUDMASK = BCM2838_GPPUD_MASK;`	GPPUD register mask for ACT LED

`RPI4_MAILBOX_TIMEOUT = 100;`	Default timeout to wait for mailbox calls to complete (Milliseconds)
`RPI4_MAILBOX_TIMEOUT_EX = 1000;`	Extended timeout to wait for mailbox calls to complete (Milliseconds)

Framebuffer Properties
`Framebuffer:TFramebufferDevice;`
RPi4 Properties
`MultiDisplay:LongBool;`
`DisplayNum:LongWord;`
`DisplaySettings:TDisplaySettings;`

`RPI4_GIC_UNAVAILABLE = 0;`
`RPI4_GIC_AVAILABLE = 1;`

Data	Data does not need to include mailbox property channel header or footer. Data pointer does not need any specific alignment or caching attributes.
Size	Size must be a multiple of 4 bytes. Size must include the size of the request and response which use the same buffer.

Number	The interrupt number to register the hanlder for
Mask	The mask of CPUs to register the handler for (eg CPU_MASK_0, CPU_MASK_1) (Where Applicable)
Priority	The priroty level of the interrupt to be registered (eg INTERRUPT_PRIORITY_MAXIMUM) (Where Applicable)
Flags	The flags to control the registration of the interrupt (eg INTERRUPT_FLAG_SHARED) (Where Applicable)
Handler	The shared interrupt handler to be called when the interrupt occurs
Parameter	A pointer to be passed to the handler when the interrupt occurs (Optional)
Return	ERROR_SUCCESS if the callback was scheduled successfully or another error code on failure

Number	The interrupt number to deregister the hanlder for
Mask	The mask of CPUs to deregister the handler for (eg CPU_MASK_0, CPU_MASK_1) (Where Applicable)
Priority	The priroty level of the interrupt to be deregistered (eg INTERRUPT_PRIORITY_MAXIMUM) (Where Applicable)
Flags	The flags to control the deregistration of the interrupt (eg INTERRUPT_FLAG_SHARED, INTERRUPT_FLAG_LOCAL, INTERRUPT_FLAG_FIQ) (Where Applicable)
Handler	The shared interrupt handler to be called when the interrupt occurs
Parameter	A pointer to be passed to the handler when the interrupt occurs (Optional)
Return	ERROR_SUCCESS if the callback was scheduled successfully or another error code on failure

CPUID	The CPU ID to register the System Call against (or CPU_ID_ALL)
Number	The System Call number to be registered
Handler	The handler function to be registered
HandlerEx	The extended handler function to be registered
Note	Only one of Handler or HandlerEx can be specified

CPUID	The CPU ID to deregister the System Call from (or CPU_ID_ALL)
Number	The System Call number to be deregistered
Handler	The handler function to be deregistered
HandlerEx	The extended handler function to be deregistered
Note	Only one of Handler or HandlerEx can be specified

Cycles	Number of cycles after which the timer interrupt is to be triggered
Note	This refers to native clock cycles as specified by CLOCK_FREQUENCY

Cycles	Number of cycles after which the scheduler interrupt is to be triggered
Note	This refers to native clock cycles as specified by RPI4_GENERIC_TIMER_FREQUENCY

Unit PlatformRPi4

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Constants

Type definitions

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