Unit PlatformARMv8

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Description


Ultibo Platform Interface unit for ARMv8

The ARMv8 does not support the SWP/SWPB instructions for syncronisation (Lock/Mutex/Semaphore etc) unless enabled.

On ARMv8 Unaligned memory access is always enabled.

On ARMv8 the Extended Page Table format is always enabled.

For usage of barriers (DMB/DSB/ISB) after cache maintenance operations see: ARM.Reference_Manual_1.pdf - Appendix G Barrier Litmus Tests

Note: This unit currently only supports ARMv8 in Aarch32 mode, support for Aarch64 mode will be added in future.

Constants



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ARMv8 page tables shift ARMV8_PAGE_TABLES_*


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ARMv8 CP15 C0 main Id ARMV8_CP15_C0_MAINID_*


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ARMv8 CP15 C0 multiprocessor affinity ARMV8_CP15_C0_MPID_*


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ARMv8 CP15 C0 cache size Id ARMV8_CP15_C0_CCSID_*


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ARMv8 CP15 C0 cache level Id ARMV8_CP15_C0_CLID_*


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ARMv8 CP15 C0 cache size selection ARMV8_CP15_C0_CSSEL_*


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ARMv8 CP15 C1 control ARMV8_CP15_C1_*


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ARMv8 CP15 C1 auxiliary control ARMV8_CP15_C1_AUX_*


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ARMv8 CP15 C1 coprocessor access control ARMV8_CP15_C1_CP*


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ARMv8 CP15 C1 secure configuration ARMV8_CP15_C1_SCR_*


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ARMv8 CP15 C2 translation table base ARMV8_CP15_C2_TTBR_*


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ARMv8 CP15 C3 domain access control ARMV8_CP15_C3_DOMAIN*


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ARMv8 CP15 C10 primary region remap ARMV8_CP15_C10_PRRR_*


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ARMv8 CP15 C10 normal memory remap ARMV8_CP15_C10_NMRR_*


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ARMv8 CP15 C14 generic timer control ARMV8_CP15_C14_CNT_CTL_*


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ARMv8 CP15 C14 generic timer ARMV8_CP15_C14_*


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ARMv8 floating-point exception ARMV8_FPEXC_*


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ARMv8 level one descriptor type ARMV8_L1D_TYPE_*


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ARMv8 level one descriptor flag ARMV8_L1D_FLAG_*


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ARMv8 level one descriptor mask ARMV8_L1D_*_MASK


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ARMv8 level one descriptor TEX value ARMV8_L1D_TEX*


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ARMv8 level one descriptor AP value ARMV8_L1D_AP*


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ARMv8 level one descriptor permission value ARMV8_L1D_ACCESS_*


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ARMv8 level one descriptor cache value ARMV8_L1D_CACHE_*


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ARMv8 level one descriptor cacheable memory value ARMV8_L1D_CACHE_CACHEABLE_*


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ARMv8 level one descriptor cache TEX remap value ARMV8_L1D_CACHE_REMAP_*


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ARMv8 level two descriptor type ARMV8_L2D_TYPE_*


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ARMv8 level two descriptor flag ARMV8_L2D_FLAG_*


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ARMv8 level two descriptor mask ARMV8_L2D_*_MASK


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ARMv8 level two descriptor large TEX value ARMV8_L2D_LARGE_TEX*


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ARMv8 level two descriptor small TEX value ARMV8_L2D_SMALL_TEX*


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ARMv8 level two descriptor AP value ARMV8_L2D_AP*


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ARMv8 level two descriptor permission value ARMV8_L2D_ACCESS_*


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ARMv8 level two descriptor large cache value ARMV8_L2D_LARGE_CACHE_*


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ARMv8 level two descriptor large cacheable memory value ARMV8_L2D_LARGE_CACHE_CACHEABLE_*


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ARMv8 level two descriptor large cache TEX remap value ARMV8_L2D_LARGE_CACHE_REMAP_*


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ARMv8 level two descriptor small cache value ARMV8_L2D_SMALL_CACHE_*


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ARMv8 level two descriptor small cacheable memory value ARMV8_L2D_SMALL_CACHE_CACHEABLE_*


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ARMv8 level two descriptor small cache TEX remap value ARMV8_L2D_SMALL_CACHE_REMAP_*


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ARMv8 specific constants ARMV8_*


Type definitions



ARMv8 page table initialization

TARMv8PageTableInit = procedure;

ARMv8 dispatch IRQ

TARMv8DispatchIRQ = function(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;

ARMv8 dispatch FIQ

TARMv8DispatchFIQ = function(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;

ARMv8 dispatch SWI

TARMv8DispatchSWI = function(CPUID:LongWord; Thread:TThreadHandle; Request:PSystemCallRequest):TThreadHandle;


Public variables



ARMv8 specific variables

ARMv8Initialized:Boolean;

Page table handlers

ARMv8PageTableInitHandler:TARMv8PageTableInit;

IRQ handlers

ARMv8DispatchIRQHandler:TARMv8DispatchIRQ;

FIQ handlers

ARMv8DispatchFIQHandler:TARMv8DispatchFIQ;

SWI handlers

ARMv8DispatchSWIHandler:TARMv8DispatchSWI;


Function declarations



Initialization functions

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procedure ARMv8Init;
Description: To be documented


ARMv8 platform functions

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procedure ARMv8CPUInit; assembler; nostackframe;
Description: To be documented


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procedure ARMv8FPUInit; assembler; nostackframe;
Description: To be documented


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procedure ARMv8MMUInit;
Description: To be documented


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procedure ARMv8CacheInit; assembler; nostackframe;
Description: To be documented


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procedure ARMv8TimerInit(Frequency:LongWord); assembler; nostackframe;
Description: To be documented


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procedure ARMv8PageTableInit;
Description: Initialize the Hardware Page Tables before enabling the MMU


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procedure ARMv8SystemCall(Number:LongWord; Param1,Param2,Param3:PtrUInt); assembler; nostackframe;
Description: To be documented


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function ARMv8CPUGetMode:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8CPUGetState:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8CPUGetCurrent:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8CPUGetMainID:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8CPUGetMultiprocessorID:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8CPUGetModel:LongWord;
Description: To be documented


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function ARMv8CPUGetRevision:LongWord;
Description: To be documented


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function ARMv8CPUGetDescription:String;
Description: To be documented


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function ARMv8FPUGetState:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L1CacheGetType:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L1DataCacheGetSize:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L1DataCacheGetLineSize:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L1InstructionCacheGetSize:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L1InstructionCacheGetLineSize:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L2CacheGetType:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L2CacheGetSize:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8L2CacheGetLineSize:LongWord; assembler; nostackframe;
Description: To be documented


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procedure ARMv8Halt; assembler; nostackframe; public name '_haltproc';
Description: The purpose of the Wait For Interrupt operation is to put the processor in to a low power state


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procedure ARMv8Pause; assembler; nostackframe;
Description: The purpose of the Wait For Interrupt operation is to put the processor in to a low power state


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procedure ARMv8SendEvent; assembler; nostackframe;
Description: To be documented


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procedure ARMv8WaitForEvent; assembler; nostackframe;
Description: To be documented


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procedure ARMv8WaitForInterrupt; assembler; nostackframe;
Description: The purpose of the Wait For Interrupt operation is to put the processor in to a low power state


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procedure ARMv8DataMemoryBarrier; assembler; nostackframe;
Description: Perform a data memory barrier operation using the c7 (Cache Operations) register of system control coprocessor CP15


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procedure ARMv8DataSynchronizationBarrier; assembler; nostackframe;
Description: Perform a data synchronization barrier operation


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procedure ARMv8InstructionMemoryBarrier; assembler; nostackframe;
Description: Perform a instruction synchronization barrier operation


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procedure ARMv8InvalidateTLB; assembler; nostackframe;
Description: Perform an invalidate entire TLB operation using the c8 (TLB Operations) register of system control coprocessor CP15


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procedure ARMv8InvalidateDataTLB; assembler; nostackframe;
Description: Perform an invalidate data TLB (Unlocked/Data) operation using the c8 (TLB Operations) register of system control coprocessor CP15


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procedure ARMv8InvalidateInstructionTLB; assembler; nostackframe;
Description: Perform an invalidate instruction TLB (Unlocked/Instruction) operation using the c8 (TLB Operations) register of system control coprocessor CP15


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procedure ARMv8InvalidateCache; assembler; nostackframe;
Description: Perform an invalidate both caches operation using the c7 (Cache Operations) register of system control coprocessor CP15


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procedure ARMv8CleanDataCache; assembler; nostackframe;
Description: Perform a clean entire data cache operation


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procedure ARMv8InvalidateDataCache; assembler; nostackframe;
Description: Perform an invalidate entire data cache operation


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procedure ARMv8InvalidateL1DataCache; assembler; nostackframe;
Description: Perform an invalidate entire L1 data cache operation


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procedure ARMv8CleanAndInvalidateDataCache; assembler; nostackframe;
Description: Perform a clean and invalidate entire data cache operation


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procedure ARMv8InvalidateInstructionCache; assembler; nostackframe;
Description: Perform an invalidate entire instruction cache operation using the c7 (Cache Operations) register of system control coprocessor CP15


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procedure ARMv8InvalidateDataCacheRange(Address:PtrUInt; Size:LongWord);
Description: Perform an invalidate data cache by MVA to PoC operation


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procedure ARMv8CleanAndInvalidateDataCacheRange(Address:PtrUInt; Size:LongWord);
Description: Perform a clean and invalidate data cache by MVA to PoC operation


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procedure ARMv8InvalidateInstructionCacheRange(Address:PtrUInt; Size:LongWord);
Description: Perform an invalidate instruction caches by MVA to PoU operation


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procedure ARMv8CleanDataCacheSetWay(SetWay:LongWord); assembler; nostackframe;
Description: Perform a clean data cache line by set/way operation


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procedure ARMv8InvalidateDataCacheSetWay(SetWay:LongWord); assembler; nostackframe;
Description: Perform an invalidate data cache line by set/way operation


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procedure ARMv8CleanAndInvalidateDataCacheSetWay(SetWay:LongWord); assembler; nostackframe;
Description: Perform a clean and invalidate data cache line by set/way operation


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procedure ARMv8FlushPrefetchBuffer; assembler; nostackframe;
Description: Perform an Instruction Synchronization Barrier operation


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procedure ARMv8FlushBranchTargetCache; assembler; nostackframe;
Description: Perform a Flush Entire Branch Target Cache operation


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procedure ARMv8ContextSwitch(OldStack,NewStack:Pointer; NewThread:TThreadHandle); assembler; nostackframe;
Description: Perform a context switch from one thread to another as a result of a thread yielding, sleeping or waiting


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procedure ARMv8ContextSwitchIRQ(OldStack,NewStack:Pointer; NewThread:TThreadHandle); assembler; nostackframe;
Description: Perform a context switch from one thread to another as a result of an interrupt request (IRQ)


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procedure ARMv8ContextSwitchFIQ(OldStack,NewStack:Pointer; NewThread:TThreadHandle); assembler; nostackframe;
Description: Perform a context switch from one thread to another as a result of a fast interrupt request (FIQ)


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procedure ARMv8ContextSwitchSWI(OldStack,NewStack:Pointer; NewThread:TThreadHandle); assembler; nostackframe;
Description: Perform a context switch from one thread to another as a result of a software interrupt (SWI)


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function ARMv8InterlockedOr(var Target:LongInt; Value:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic OR operation using LDREX/STREX


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function ARMv8InterlockedXor(var Target:LongInt; Value:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic XOR operation using LDREX/STREX


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function ARMv8InterlockedAnd(var Target:LongInt; Value:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic AND operation using LDREX/STREX


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function ARMv8InterlockedDecrement(var Target:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic decrement operation using LDREX/STREX


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function ARMv8InterlockedIncrement(var Target:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic increment operation using LDREX/STREX


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function ARMv8InterlockedExchange(var Target:LongInt; Source:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic exchange operation using LDREX/STREX


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function ARMv8InterlockedAddExchange(var Target:LongInt; Source:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic add and exchange operation using LDREX/STREX


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function ARMv8InterlockedCompareExchange(var Target:LongInt; Source,Compare:LongInt):LongInt; assembler; nostackframe;
Description: Perform an atomic compare and exchange operation using LDREX/STREX


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procedure ARMv8PageTableGetEntry(Address:PtrUInt; var Entry:TPageTableEntry);
Description: Get and Decode the entry in the Page Table that corresponds to the supplied virtual address


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function ARMv8PageTableSetEntry(const Entry:TPageTableEntry):LongWord;
Description: Encode and Set an entry in the Page Table that corresponds to the supplied virtual address


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function ARMv8VectorTableGetEntry(Number:LongWord):PtrUInt;
Description: Return the address of the specified vector table entry number


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function ARMv8VectorTableSetEntry(Number:LongWord; Address:PtrUInt):LongWord;
Description: Set the supplied address as the value of the specified vector table entry number


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function ARMv8FirstBitSet(Value:LongWord):LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8CountLeadingZeros(Value:LongWord):LongWord; assembler; nostackframe;
Description: Equivalent of the GCC Builtin function __builtin_clz


ARMv8 thread functions

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procedure ARMv8PrimaryInit; assembler; nostackframe;
Description: To be documented


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function ARMv8SpinLock(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Lock an existing Spin entry


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function ARMv8SpinUnlock(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Unlock an existing Spin entry


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function ARMv8SpinLockIRQ(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Lock an existing Spin entry, disable IRQ and save the previous IRQ state


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function ARMv8SpinUnlockIRQ(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Unlock an existing Spin entry and restore the previous IRQ state


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function ARMv8SpinLockFIQ(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Lock an existing Spin entry, disable FIQ and save the previous FIQ state


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function ARMv8SpinUnlockFIQ(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Unlock an existing Spin entry and restore the previous FIQ state


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function ARMv8SpinLockIRQFIQ(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Lock an existing Spin entry, disable IRQ and FIQ and save the previous IRQ/FIQ state


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function ARMv8SpinUnlockIRQFIQ(Spin:PSpinEntry):LongWord; assembler; nostackframe;
Description: Unlock an existing Spin entry and restore the previous IRQ/FIQ state


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function ARMv8SpinCheckIRQ(Spin:PSpinEntry):Boolean;
Description: To be documented


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function ARMv8SpinCheckFIQ(Spin:PSpinEntry):Boolean;
Description: To be documented


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function ARMv8SpinExchangeIRQ(Spin1,Spin2:PSpinEntry):LongWord;
Description: To be documented


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function ARMv8SpinExchangeFIQ(Spin1,Spin2:PSpinEntry):LongWord;
Description: To be documented


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function ARMv8MutexLock(Mutex:PMutexEntry):LongWord; assembler; nostackframe;
Description: Lock an existing Mutex entry


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function ARMv8MutexUnlock(Mutex:PMutexEntry):LongWord; assembler; nostackframe;
Description: Unlock an existing Mutex entry


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function ARMv8MutexTryLock(Mutex:PMutexEntry):LongWord; assembler; nostackframe;
Description: Try to lock an existing Mutex entry


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function ARMv8ThreadGetCurrent:TThreadHandle; assembler; nostackframe;
Description: Get the current thread Id from the c13 (Thread and process ID) register of system control coprocessor CP15


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function ARMv8ThreadSetCurrent(Thread:TThreadHandle):LongWord; assembler; nostackframe;
Description: Set the current thread Id in the c13 (Thread and process ID) register of system control coprocessor CP15


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function ARMv8ThreadSetupStack(StackBase:Pointer; StartProc:TThreadStart; ReturnProc:TThreadEnd; Parameter:Pointer):Pointer;
Description: Set up the context record and arguments on the stack for a new thread


ARMv8 IRQ functions

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function ARMv8DispatchIRQ(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle; inline;
Description: To be documented


ARMv8 FIQ functions

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function ARMv8DispatchFIQ(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle; inline;
Description: To be documented


ARMv8 SWI functions

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function ARMv8DispatchSWI(CPUID:LongWord; Thread:TThreadHandle; Request:PSystemCallRequest):TThreadHandle; inline;
Description: To be documented


ARMv8 interrupt functions

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procedure ARMv8ResetHandler; assembler; nostackframe;
Description: To be documented


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procedure ARMv8UndefinedInstructionHandler; assembler; nostackframe;
Description: Handle an undefined instruction exception


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procedure ARMv8SoftwareInterruptHandler; assembler; nostackframe;
Description: Handle a software interrupt (SWI) from a system call (SVC)


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procedure ARMv8PrefetchAbortHandler; assembler; nostackframe;
Description: Handle a prefetch abort exception


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procedure ARMv8DataAbortHandler; assembler; nostackframe;
Description: Handle a data abort exception


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procedure ARMv8ReservedHandler; assembler; nostackframe;
Description: To be documented


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procedure ARMv8IRQHandler; assembler; nostackframe;
Description: Handle an interrupt request IRQ from an interrupt source


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procedure ARMv8FIQHandler; assembler; nostackframe;
Description: Handle a fast interrupt request FIQ from an interrupt source


ARMv8 helper functions

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function ARMv8GetFPEXC:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8GetFPSCR:LongWord; assembler; nostackframe;
Description: To be documented


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procedure ARMv8StartMMU; assembler; nostackframe;
Description: To be documented


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function ARMv8GetTimerState(Timer:LongWord):LongWord; assembler; nostackframe;
Description: To be documented


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procedure ARMv8SetTimerState(Timer,State:LongWord); assembler; nostackframe;
Description: To be documented


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function ARMv8GetTimerCount(Timer:LongWord):Int64; assembler; nostackframe;
Description: To be documented


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function ARMv8GetTimerValue(Timer:LongWord):LongWord; assembler; nostackframe;
Description: To be documented


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procedure ARMV8SetTimerValue(Timer,Value:LongWord); assembler; nostackframe;
Description: To be documented


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function ARMv8GetTimerCompare(Timer:LongWord):Int64; assembler; nostackframe;
Description: To be documented


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procedure ARMV8SetTimerCompare(Timer,High,Low:LongWord); assembler; nostackframe;
Description: To be documented


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function ARMv8GetTimerFrequency:LongWord; assembler; nostackframe;
Description: To be documented


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function ARMv8GetPageTableCoarse(Address:PtrUInt):LongWord;
Description: Get the descriptor for a Coarse Page Table entry (1MB)


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function ARMv8SetPageTableCoarse(Address,CoarseAddress:PtrUInt; Flags:Word):Boolean;
Description: Set the descriptor for a Coarse Page Table entry (1MB)


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function ARMv8GetPageTableLarge(Address:PtrUInt):LongWord;
Description: Get the descriptor for a Large Page Table entry (64KB)


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function ARMv8SetPageTableLarge(Address,PhysicalAddress:PtrUInt; Flags:Word):Boolean;
Description: Set the descriptor for a Large Page Table entry (64KB)


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function ARMv8GetPageTableSmall(Address:PtrUInt):LongWord;
Description: Get the descriptor for a Small Page Table entry (4KB)


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function ARMv8SetPageTableSmall(Address,PhysicalAddress:PtrUInt; Flags:Word):Boolean;
Description: Set the descriptor for a Small Page Table entry (4KB)


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function ARMv8GetPageTableSection(Address:PtrUInt):LongWord;
Description: Get the descriptor for a Page Table Section (1MB) or Supersection (16MB)


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function ARMv8SetPageTableSection(Address,PhysicalAddress:PtrUInt; Flags:LongWord):Boolean;
Description: Set the descriptor for a Page Table Section (1MB)


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function ARMv8SetPageTableSupersection(Address,PhysicalAddress:PtrUInt; Flags:LongWord):Boolean;
Description: Set the descriptor for a Page Table Supersection (16MB)


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