Difference between revisions of "Unit SMC91X"
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− | '' | + | |
+ | '''SMC91X bank 0 registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | |||
+ | <code>TSMC91XBank0Registers = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|Note: Layout of the SMC91X registers | ||
+ | |- | ||
+ | | <code>TCR:Word;</code> | ||
+ | | Transmit Control Register | ||
+ | |- | ||
+ | | <code>EPH_STATUS:Word;</code> | ||
+ | | EPH Status Register | ||
+ | |- | ||
+ | | <code>RCR:Word;</code> | ||
+ | | Receive Control Register | ||
+ | |- | ||
+ | | <code>COUNTER:Word;</code> | ||
+ | | Counter Register | ||
+ | |- | ||
+ | | <code>MIR:Word;</code> | ||
+ | | Memory Information Register | ||
+ | |- | ||
+ | | <code>RPCR:Word;</code> | ||
+ | | Receive/Phy Control Register | ||
+ | |- | ||
+ | | <code>RESERVED:Word;</code> | ||
+ | | Reserved | ||
+ | |- | ||
+ | | <code>BANK:Word;</code> | ||
+ | | Bank Select Register | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X bank 1 registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | |||
+ | <code>TSMC91XBank1Registers = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>CONFIG:Word;</code> | ||
+ | | Configuration Register | ||
+ | |- | ||
+ | | <code>BASE:Word;</code> | ||
+ | | Base Address Register | ||
+ | |- | ||
+ | | <code>ADDR0:Word;</code> | ||
+ | | Individual Address Registers (0 and 1) | ||
+ | |- | ||
+ | | <code>ADDR1:Word;</code> | ||
+ | | Individual Address Registers (2 and 3) | ||
+ | |- | ||
+ | | <code>ADDR2:Word;</code> | ||
+ | | Individual Address Registers (4 and 5) | ||
+ | |- | ||
+ | | <code>GP:Word;</code> | ||
+ | | General Purpose Register | ||
+ | |- | ||
+ | | <code>CTL:Word;</code> | ||
+ | | Control Register | ||
+ | |- | ||
+ | | <code>BANK:Word;</code> | ||
+ | | Bank Select Register | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X FIFO registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | |||
+ | <code>TSMC91XFIFORegisters = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>case Integer of</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | | <code>0:(FIFO:Word);</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>1:(TX:Byte;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>RX:Byte);</code> | ||
+ | | | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X DATA registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | |||
+ | <code>TSMC91XDATARegisters = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>case Integer of</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | | <code>0:(DATA:LongWord);</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>1:(DATAH:Word;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>DATAL:Word);</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>2:(DATA0:Byte;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>DATA1:Byte;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>DATA2:Byte;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>DATA3:Byte);</code> | ||
+ | | | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X bank 2 registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | |||
+ | <code>TSMC91XBank2Registers = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>MMU_CMD:Word;</code> | ||
+ | | MMU Command Register | ||
+ | |- | ||
+ | | <code>PN:Byte;</code> | ||
+ | | Packet Number Register | ||
+ | |- | ||
+ | | <code>AR:Byte;</code> | ||
+ | | Allocation Result Register | ||
+ | |- | ||
+ | | <code>FIFO:TSMC91XFIFORegisters;</code> | ||
+ | | FIFO Ports Register | ||
+ | |- | ||
+ | | <code>PTR:Word;</code> | ||
+ | | Pointer Register | ||
+ | |- | ||
+ | | <code>DATA:TSMC91XDATARegisters;</code> | ||
+ | | Data Register | ||
+ | |- | ||
+ | | <code>INT:Byte;</code> | ||
+ | | Interrupt Status Register | ||
+ | |- | ||
+ | | <code>IM:Byte;</code> | ||
+ | | Interrupt Mask Register | ||
+ | |- | ||
+ | | <code>BANK:Word;</code> | ||
+ | | Bank Select Register | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X bank 3 registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | |||
+ | <code>TSMC91XBank3Registers = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>MCAST1:Word;</code> | ||
+ | | Multicast Table Registers (0 and 1) | ||
+ | |- | ||
+ | | <code>MCAST2:Word;</code> | ||
+ | | Multicast Table Registers (2 and 3) | ||
+ | |- | ||
+ | | <code>MCAST3:Word;</code> | ||
+ | | Multicast Table Registers (4 and 5) | ||
+ | |- | ||
+ | | <code>MCAST4:Word;</code> | ||
+ | | Multicast Table Registers (6 and 7) | ||
+ | |- | ||
+ | | <code>MII:Word;</code> | ||
+ | | Management Interface Register | ||
+ | |- | ||
+ | | <code>REV:Word;</code> | ||
+ | | Revision Register | ||
+ | |- | ||
+ | | <code>RCV:Word;</code> | ||
+ | | RCV Register | ||
+ | |- | ||
+ | | <code>Bank:Word;</code> | ||
+ | | Bank Select Register | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | <code>PSMC91XRegisters = ^TSMC91XRegisters;</code> | ||
+ | |||
+ | <code>TSMC91XRegisters = packed record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>case Integer of</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | | <code>0:(Bank0:TSMC91XBank0Registers);</code> | ||
+ | | Bank 0 Registers | ||
+ | |- | ||
+ | | <code>1:(Bank1:TSMC91XBank1Registers);</code> | ||
+ | | Bank 1 Registers | ||
+ | |- | ||
+ | | <code>2:(Bank2:TSMC91XBank2Registers);</code> | ||
+ | | Bank 2 Registers | ||
+ | |- | ||
+ | | <code>3:(Bank3:TSMC91XBank3Registers);</code> | ||
+ | | Bank 3 Registers | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''SMC91X network''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | <code>PSMC91XNetwork = ^TSMC91XNetwork;</code> | ||
+ | |||
+ | <code>TSMC91XNetwork = record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|''Network Properties'' | ||
+ | |- | ||
+ | | <code>Network:TNetworkDevice;</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | |colspan="2"|''SMC91X Properties'' | ||
+ | |- | ||
+ | | <code>IRQ:LongWord;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>Lock:TSpinHandle;</code> | ||
+ | | Device lock (Differs from lock in Network device) (Spin lock due to use by interrupt handler) | ||
+ | |- | ||
+ | | <code>Thread:TThreadHandle;</code> | ||
+ | | Thread for handling packet receive and transmit completion | ||
+ | |- | ||
+ | | <code>Start:LongWord;</code> | ||
+ | | First receive entry available for incoming packet | ||
+ | |- | ||
+ | | <code>Count:LongWord;</code> | ||
+ | | Number of receive entries available for incoming packets | ||
+ | |- | ||
+ | | <code>Entries:array[0..(SMC91X_MAX_RX_ENTRIES - 1)] of PNetworkEntry;</code> | ||
+ | | Queue of receive entries for handling incoming packets | ||
+ | |- | ||
+ | | <code>Registers:PSMC91XRegisters;</code> | ||
+ | | Device registers | ||
+ | |- | ||
+ | | <code>Revision:Word;</code> | ||
+ | | Device revision | ||
+ | |- | ||
+ | | <code>PHYId:LongWord;</code> | ||
+ | | Physical Interface (PHY) Address | ||
+ | |- | ||
+ | | <code>PHYType:LongWord;</code> | ||
+ | | Physical Interface (PHY) Type | ||
+ | |- | ||
+ | | <code>TCRFlags:LongWord;</code> | ||
+ | | Current Transmit Control Register (TCR) flags | ||
+ | |- | ||
+ | | <code>RCRFlags:LongWord;</code> | ||
+ | | Current Receive Control Register (RCR) flags | ||
+ | |- | ||
+ | | <code>RPCFlags:LongWord;</code> | ||
+ | | Current Receive/PHY Control Register (RPC) flags | ||
+ | |- | ||
+ | |colspan="2"|''Statistics Properties'' | ||
+ | |- | ||
+ | | <code>InterruptCount:LongWord;</code> | ||
+ | | Number of interrupt requests received by the device | ||
+ | |- | ||
+ | | <code>CollisionCount:LongWord;</code> | ||
+ | | Number of transmit collisions detected by the device | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
=== Public variables === | === Public variables === |
Revision as of 06:08, 25 April 2017
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Contents
[hide]Description
SMSC 91C9x/91C1xx Ethernet Driver unit
The SMSC 91C9x/91C1xx are a family of Non-PCI 10/100 Ethernet Single Chip MAC + PHY devices.
This driver is primarily intended to support the LAN91C111 Ethernet device included in the QEMU Verstile PB emulation however the driver is based on the equivalent Linux driver and as such includes (untested) support for a number of chip variants (see SMC91X_CHIP_* constants below).
The QEMU emulation does not include support for a number of the features provided in the real chip so they are either currently not supported or are untested without access to a physical chip implementation for testing.
Constants
SMC91X_*
SMC91X_TCR_*
SMC91X_EPH_STATUS_*
SMC91X_RCR_*
SMC91X_RPC_*
SMC91X_CONFIG_*
SMC91X_CTL_*
SMC91X_MMU_CMD_*
SMC91X_AR_*
SMC91X_TXFIFO_*
SMC91X_RXFIFO_*
SMC91X_PTR_*
SMC91X_IM_*
SMC91X_MII_*
SMC91X_RCV_THRESHOLD*
SMC91X_RCV_*
SMC91X_BANK_SELECT_*
SMC91X_CHIP_*
SMC91X_PHY_*
Type definitions
SMC91X bank 0 registers
TSMC91XBank0Registers = packed record
SMC91X bank 1 registers
TSMC91XBank1Registers = packed record
SMC91X FIFO registers
TSMC91XFIFORegisters = packed record
SMC91X DATA registers
TSMC91XDATARegisters = packed record
SMC91X bank 2 registers
TSMC91XBank2Registers = packed record
SMC91X bank 3 registers
TSMC91XBank3Registers = packed record
SMC91X registers
SMC91X network
Public variables
SMC91X specific variables
SMC91X_ALLOCATE_WAIT_COUNT:LongWord = 16;
|
How long to wait for the SMC91X to allocate memory before deferring a packet |
SMC91X_MAX_IRQ_COUNT:LongWord = 8;
|
How many iterations of the interrupt handler are allowed on each interrupt |
SMC91X_THROTTLE_TRANSMIT:Boolean = False;
|
Determines if TX packets are sent one at a time or queued into SMC91X internal memory |
Function declarations
To be documented
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