|
|
| (One intermediate revision by the same user not shown) |
| Line 874: |
Line 874: |
| | |- | | |- |
| | | <code>IRQ0:LongWord;</code> | | | <code>IRQ0:LongWord;</code> |
| − | | | + | | First host IRQ line |
| | |- | | |- |
| | | <code>IRQ1:LongWord;</code> | | | <code>IRQ1:LongWord;</code> |
| − | | | + | | Second host IRQ line |
| | |- | | |- |
| − | | <code>Lock:TSpinHandle;</code> | + | | <code>EnableFIQ:LongBool;</code> |
| − | | Host lock (Differs from lock in Host portion) Spin lock due to use by interrupt handler | + | | Use FIQ instead of IRQ |
| | |- | | |- |
| | | <code>SingleIRQ:LongBool;</code> | | | <code>SingleIRQ:LongBool;</code> |
| Line 1,035: |
Line 1,035: |
| | '''PL18X MMC functions''' | | '''PL18X MMC functions''' |
| | | | |
| − | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
| |
| − | <pre style="border: 0; padding-bottom:0px;">function PL18XMMCDeviceInitialize(MMC:PMMCDevice):LongWord;</pre>
| |
| − | <div style="font-size: 14px; padding-left: 12px;">'''Description:''' Implementation of MMCDeviceInitialize API for PL18X SDHCI</div>
| |
| − | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
| |
| − | {| class="wikitable" style="font-size: 14px; background: white;"
| |
| − | |-
| |
| − | ! Note
| |
| − | | Not intended to be called directly by applications, use MMCDeviceInitialize instead.
| |
| − | |-
| |
| − | |}
| |
| − | </div></div>
| |
| − | <br />
| |
| | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;"> | | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;"> |
| | <pre style="border: 0; padding-bottom:0px;">function PL18XMMCDeviceGetCardDetect(MMC:PMMCDevice):LongWord;</pre> | | <pre style="border: 0; padding-bottom:0px;">function PL18XMMCDeviceGetCardDetect(MMC:PMMCDevice):LongWord;</pre> |
| Line 1,190: |
Line 1,178: |
| | ! Note | | ! Note |
| | | Not intended to be called directly by applications, use SDHCIHostWriteLong instead. | | | Not intended to be called directly by applications, use SDHCIHostWriteLong instead. |
| | + | |- |
| | + | |} |
| | + | </div></div> |
| | + | <br /> |
| | + | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;"> |
| | + | <pre style="border: 0; padding-bottom:0px;">function PL18XSDHCIHostSetPower(SDHCI:PSDHCIHost; Power:Word):LongWord;</pre> |
| | + | <div style="font-size: 14px; padding-left: 12px;">'''Description:''' Implementation of SDHCISetPower API for PL18X SDHCI</div> |
| | + | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> |
| | + | {| class="wikitable" style="font-size: 14px; background: white;" |
| | + | |- |
| | + | ! Note |
| | + | | Not intended to be called directly by applications, use SDHCISetPower instead. |
| | |- | | |- |
| | |} | | |} |
Latest revision as of 06:06, 7 April 2023
Return to Unit Reference
Description
ARM PrimeCell PL180/181 Multimedia Card Interface Driver unit
The PL180/181 Multimedia Card is an ARM peripheral that is compatible with MMC multimedia cards and SD secure digital cards in memory mapped I/O format compatible with the ARM advanced peripheral bus (APB).
The design of the Pl180/181 allows for multiple cards per controller however this driver currently only supports attaching one card.
Constants
[Expand]
PL18X specific constants PL180_MMCI_*
PL180_MMCI_DESCRIPTION = 'ARM PrimeCell PL180 MMCI Host';
|
Description of PL180 device
|
PL181_MMCI_DESCRIPTION = 'ARM PrimeCell PL181 MMCI Host';
|
Description of PL181 device
|
[Expand]
PL18X power control register PL18X_MMCI_POWER_*
PL18X_MMCI_POWER = $000;
|
|
PL18X_MMCI_POWER_OFF = $00;
|
Power-off
|
| Bits 1:0 - $01 Reserved
|
PL18X_MMCI_POWER_UP = $02;
|
Power-up
|
PL18X_MMCI_POWER_ON = $03;
|
Power-on
|
| Bits 5:2 - Output Voltage
|
PL18X_MMCI_POWER_OD = (1 shl 6);
|
MCICMD output control
|
PL18X_MMCI_POWER_ROD = (1 shl 7);
|
Rod control
|
|
|
| The ST Micro version does not have ROD and reuses the voltage registers for direction settings
|
PL18X_MMCI_POWER_ST_DATA2DIREN = (1 shl 2);
|
|
PL18X_MMCI_POWER_ST_CMDDIREN = (1 shl 3);
|
|
PL18X_MMCI_POWER_ST_DATA0DIREN = (1 shl 4);
|
|
PL18X_MMCI_POWER_ST_DATA31DIREN = (1 shl 5);
|
|
PL18X_MMCI_POWER_ST_FBCLKEN = (1 shl 7);
|
|
PL18X_MMCI_POWER_ST_DATA74DIREN = (1 shl 8);
|
|
[Expand]
PL18X clock control register PL18X_MMCI_CLOCK*
PL18X_MMCI_CLOCK = $004;
|
|
PL18X_MMCI_CLOCK_ENABLE = (1 shl 8);
|
Enable MCI bus clock: 0 = Clock disabled / 1 = Clock enabled
|
PL18X_MMCI_CLOCK_PWRSAVE = (1 shl 9);
|
Disable MCI clock output when bus is idle: 0 = Always enabled / 1 = Clock enabled when bus is active
|
PL18X_MMCI_CLOCK_BYPASS = (1 shl 10);
|
Enable bypass of clock divide logic: 0 = Disable bypass / 1 = Enable bypass
|
PL18X_MMCI_CLOCK_4BIT_BUS = (1 shl 11);
|
Enable wide bus mode: 0 = Standard bus mode (only MCIDAT0 used) / 1 = Wide bus mode (MCIDAT3:0 used)
|
|
|
| 8bit wide buses, hardware flow contronl, negative edges and clock inversion supported in ST Micro U300 and Ux500 versions
|
PL18X_MMCI_CLOCK_ST_8BIT_BUS = (1 shl 12);
|
|
PL18X_MMCI_CLOCK_ST_U300_HWFCEN = (1 shl 13);
|
|
PL18X_MMCI_CLOCK_ST_UX500_NEG_EDGE = (1 shl 13);
|
|
PL18X_MMCI_CLOCK_ST_UX500_HWFCEN = (1 shl 14);
|
|
PL18X_MMCI_CLOCK_ST_UX500_CLK_INV = (1 shl 15);
|
|
| Modified PL180 on Versatile Express platform
|
PL18X_MMCI_CLOCK_ARM_HWFCEN = (1 shl 12);
|
|
|
|
| Modified on Qualcomm Integrations
|
PL18X_MMCI_CLOCK_QCOM_WIDEBUS_8 = (1 shl 10) or (1 shl 11);
|
|
PL18X_MMCI_CLOCK_QCOM_FLOWENA = (1 shl 12);
|
|
PL18X_MMCI_CLOCK_QCOM_INVERTOUT = (1 shl 13);
|
|
|
|
| Select in latch data and command in
|
PL18X_MMCI_CLOCK_QCOM_SELECT_IN_FBCLK = (1 shl 15);
|
|
PL18X_MMCI_CLOCK_QCOM_SELECT_IN_DDR_MODE = (1 shl 14) or (1 shl 15);
|
|
[Expand]
PL18X argument register PL18X_MMCI_ARGUMENT*
PL18X_MMCI_ARGUMENT = $008;
|
|
| Bits 31:0 Command Argument
|
[Expand]
PL18X command register PL18X_MMCI_COMMAND*
PL18X_MMCI_COMMAND = $00c;
|
|
| Bits 5:0 Command Index
|
PL18X_MMCI_CPSM_RESPONSE = (1 shl 6);
|
If set, CPSM waits for a response
|
PL18X_MMCI_CPSM_LONGRSP = (1 shl 7);
|
If set, CPSM receives a 136-bit long response
|
PL18X_MMCI_CPSM_INTERRUPT = (1 shl 8);
|
If set, CPSM disables command timer and waits for interrupt request
|
PL18X_MMCI_CPSM_PENDING = (1 shl 9);
|
If set, CPSM waits for CmdPend before it starts sending a command
|
PL18X_MMCI_CPSM_ENABLE = (1 shl 10);
|
If set, CPSM is enabled
|
| Argument flag extenstions in the ST Micro versions
|
PL18X_MMCI_CPSM_ST_SDIO_SUSP = (1 shl 11);
|
|
PL18X_MMCI_CPSM_ST_ENCMD_COMPL = (1 shl 12);
|
|
PL18X_MMCI_CPSM_ST_NIEN = (1 shl 13);
|
|
PL18X_MMCI_CPSM_ST_CE_ATACMD = (1 shl 14);
|
|
|
|
| Modified on Qualcomm Integrations
|
PL18X_MMCI_CPSM_QCOM_DATCMD = (1 shl 12);
|
|
PL18X_MMCI_CPSM_QCOM_MCIABORT = (1 shl 13);
|
|
PL18X_MMCI_CPSM_QCOM_CCSENABLE = (1 shl 14);
|
|
PL18X_MMCI_CPSM_QCOM_CCSDISABLE = (1 shl 15);
|
|
PL18X_MMCI_CPSM_QCOM_AUTO_CMD19 = (1 shl 16);
|
|
PL18X_MMCI_CPSM_QCOM_AUTO_CMD21 = (1 shl 21);
|
|
[Expand]
PL18X command response register PL18X_MMCI_RESPCMD*
PL18X_MMCI_RESPCMD = $010;
|
|
| Bits 5:0 Response command index
|
| Bits 31:6 Reserved
|
[Expand]
PL18X response registers PL18X_MMCI_RESPONSE*
PL18X_MMCI_RESPONSE0 = $014;
|
|
PL18X_MMCI_RESPONSE1 = $018;
|
|
PL18X_MMCI_RESPONSE2 = $01c;
|
|
PL18X_MMCI_RESPONSE3 = $020;
|
|
| Bits 31:0 Card Status
|
[Expand]
PL18X data timer register PL18X_MMCI_DATATIMER*
PL18X_MMCI_DATATIMER = $024;
|
|
| Bits 31:0 Data Timeout Period
|
[Expand]
PL18X data length register PL18X_MMCI_DATALENGTH*
PL18X_MMCI_DATALENGTH = $028;
|
|
| Bits 15:0 Data Length Value
|
| Bits 31:16 Reserved
|
[Expand]
PL18X data control register PL18X_MMCI_DATACTRL*
PL18X_MMCI_DATACTRL = $02c;
|
|
PL18X_MMCI_DPSM_ENABLE = (1 shl 0);
|
Data transfer enabled
|
PL18X_MMCI_DPSM_DIRECTION = (1 shl 1);
|
Data transfer direction: 0 = From controller to card / 1 = From card to controller
|
PL18X_MMCI_DPSM_MODE = (1 shl 2);
|
Data transfer mode: 0 = Block data transfer / 1 = Stream data transfer
|
PL18X_MMCI_DPSM_BLOCKSIZE = (1 shl 4);
|
Data block length
|
| Control register extensions in the ST Micro U300 and Ux500 versions
|
PL18X_MMCI_ST_DPSM_RWSTART = (1 shl 8);
|
|
PL18X_MMCI_ST_DPSM_RWSTOP = (1 shl 9);
|
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PL18X_MMCI_ST_DPSM_RWMOD = (1 shl 10);
|
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PL18X_MMCI_ST_DPSM_SDIOEN = (1 shl 11);
|
|
| Control register extensions in the ST Micro Ux500 versions
|
PL18X_MMCI_ST_DPSM_DMAREQCTL = (1 shl 12);
|
|
PL18X_MMCI_ST_DPSM_DBOOTMODEEN = (1 shl 13);
|
|
PL18X_MMCI_ST_DPSM_BUSYMODE = (1 shl 14);
|
|
PL18X_MMCI_ST_DPSM_DDRMODE = (1 shl 15);
|
|
[Expand]
PL18X data counter register PL18X_MMCI_DATACNT*
PL18X_MMCI_DATACNT = $030;
|
|
| Bits 15:0 Remaining Data
|
| Bits 31:16 Reserved
|
[Expand]
PL18X status register PL18X_MMCI_STATUS*
PL18X_MMCI_STATUS = $034;
|
|
PL18X_MMCI_CMDCRCFAIL = (1 shl 0);
|
|
PL18X_MMCI_DATACRCFAIL = (1 shl 1);
|
|
PL18X_MMCI_CMDTIMEOUT = (1 shl 2);
|
|
PL18X_MMCI_DATATIMEOUT = (1 shl 3);
|
|
PL18X_MMCI_TXUNDERRUN = (1 shl 4);
|
|
PL18X_MMCI_RXOVERRUN = (1 shl 5);
|
|
PL18X_MMCI_CMDRESPEND = (1 shl 6);
|
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PL18X_MMCI_CMDSENT = (1 shl 7);
|
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PL18X_MMCI_DATAEND = (1 shl 8);
|
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PL18X_MMCI_STARTBITERR = (1 shl 9);
|
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PL18X_MMCI_DATABLOCKEND = (1 shl 10);
|
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PL18X_MMCI_CMDACTIVE = (1 shl 11);
|
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PL18X_MMCI_TXACTIVE = (1 shl 12);
|
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PL18X_MMCI_RXACTIVE = (1 shl 13);
|
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PL18X_MMCI_TXFIFOHALFEMPTY = (1 shl 14);
|
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PL18X_MMCI_RXFIFOHALFFULL = (1 shl 15);
|
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PL18X_MMCI_TXFIFOFULL = (1 shl 16);
|
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PL18X_MMCI_RXFIFOFULL = (1 shl 17);
|
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PL18X_MMCI_TXFIFOEMPTY = (1 shl 18);
|
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PL18X_MMCI_RXFIFOEMPTY = (1 shl 19);
|
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PL18X_MMCI_TXDATAAVLBL = (1 shl 20);
|
|
PL18X_MMCI_RXDATAAVLBL = (1 shl 21);
|
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| Extended status bits for the ST Micro variants
|
PL18X_MMCI_ST_SDIOIT = (1 shl 22);
|
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PL18X_MMCI_ST_CEATAEND = (1 shl 23);
|
|
PL18X_MMCI_ST_CARDBUSY = (1 shl 24);
|
|
[Expand]
PL18X clear register PL18X_MMCI_CLEAR*
PL18X_MMCI_CLEAR = $038;
|
|
PL18X_MMCI_CMDCRCFAILCLR = (1 shl 0);
|
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PL18X_MMCI_DATACRCFAILCLR = (1 shl 1);
|
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PL18X_MMCI_CMDTIMEOUTCLR = (1 shl 2);
|
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PL18X_MMCI_DATATIMEOUTCLR = (1 shl 3);
|
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PL18X_MMCI_TXUNDERRUNCLR = (1 shl 4);
|
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PL18X_MMCI_RXOVERRUNCLR = (1 shl 5);
|
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PL18X_MMCI_CMDRESPENDCLR = (1 shl 6);
|
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PL18X_MMCI_CMDSENTCLR = (1 shl 7);
|
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PL18X_MMCI_DATAENDCLR = (1 shl 8);
|
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PL18X_MMCI_STARTBITERRCLR = (1 shl 9);
|
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PL18X_MMCI_DATABLOCKENDCLR = (1 shl 10);
|
|
| Extended status bits for the ST Micro variants
|
PL18X_MMCI_ST_SDIOITC = (1 shl 22);
|
|
PL18X_MMCI_ST_CEATAENDC = (1 shl 23);
|
|
PL18X_MMCI_ST_BUSYENDC = (1 shl 24);
|
|
[Expand]
PL18X interrupt mask registers PL18X_MMCI_MASK*
PL18X_MMCI_MASK0 = $03c;
|
|
PL18X_MMCI_MASK1 = $040;
|
|
PL18X_MMCI_CMDCRCFAILMASK = (1 shl 0);
|
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PL18X_MMCI_DATACRCFAILMASK = (1 shl 1);
|
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PL18X_MMCI_CMDTIMEOUTMASK = (1 shl 2);
|
|
PL18X_MMCI_DATATIMEOUTMASK = (1 shl 3);
|
|
PL18X_MMCI_TXUNDERRUNMASK = (1 shl 4);
|
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PL18X_MMCI_RXOVERRUNMASK = (1 shl 5);
|
|
PL18X_MMCI_CMDRESPENDMASK = (1 shl 6);
|
|
PL18X_MMCI_CMDSENTMASK = (1 shl 7);
|
|
PL18X_MMCI_DATAENDMASK = (1 shl 8);
|
|
PL18X_MMCI_STARTBITERRMASK = (1 shl 9);
|
|
PL18X_MMCI_DATABLOCKENDMASK = (1 shl 10);
|
|
PL18X_MMCI_CMDACTIVEMASK = (1 shl 11);
|
|
PL18X_MMCI_TXACTIVEMASK = (1 shl 12);
|
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PL18X_MMCI_RXACTIVEMASK = (1 shl 13);
|
|
PL18X_MMCI_TXFIFOHALFEMPTYMASK = (1 shl 14);
|
|
PL18X_MMCI_RXFIFOHALFFULLMASK = (1 shl 15);
|
|
PL18X_MMCI_TXFIFOFULLMASK = (1 shl 16);
|
|
PL18X_MMCI_RXFIFOFULLMASK = (1 shl 17);
|
|
PL18X_MMCI_TXFIFOEMPTYMASK = (1 shl 18);
|
|
PL18X_MMCI_RXFIFOEMPTYMASK = (1 shl 19);
|
|
PL18X_MMCI_TXDATAAVLBLMASK = (1 shl 20);
|
|
PL18X_MMCI_RXDATAAVLBLMASK = (1 shl 21);
|
|
| Extended status bits for the ST Micro variants
|
PL18X_MMCI_ST_SDIOITMASK = (1 shl 22);
|
|
PL18X_MMCI_ST_CEATAENDMASK = (1 shl 23);
|
|
PL18X_MMCI_ST_BUSYEND = (1 shl 24);
|
|
[Expand]
PL18X SD card select register PL18X_MMCI_SELECT*
PL18X_MMCI_SELECT = $044;
|
|
[Expand]
PL18X FIFO counter register PL18X_MMCI_FIFOCNT*
PL18X_MMCI_FIFOCNT = $048;
|
|
[Expand]
PL18X data FIFO register PL18X_MMCI_FIFO*
PL18X_MMCI_FIFO = $080;
|
To $0bc
|
[Expand]
PL18X peripheral identification register PL18X_MMCI_PERIPHID*
PL18X_MMCI_PERIPHID = $FE0;
|
|
[Expand]
PL18X PrimeCell identification register PL18X_MMCI_PCELLID*
PL18X_MMCI_PCELLID = $FF0;
|
|
|
|
PL18X_MMCI_IRQENABLE = (PL18X_MMCI_CMDCRCFAILMASK or PL18X_MMCI_DATACRCFAILMASK or PL18X_MMCI_CMDTIMEOUTMASK or PL18X_MMCI_DATATIMEOUTMASK or PL18X_MMCI_TXUNDERRUNMASK or PL18X_MMCI_RXOVERRUNMASK or PL18X_MMCI_CMDRESPENDMASK or PL18X_MMCI_CMDSENTMASK or PL18X_MMCI_STARTBITERRMASK);
|
|
| These interrupts are directed to IRQ1 when two IRQ lines are available
|
PL18X_MMCI_IRQ1MASK = (PL18X_MMCI_RXFIFOHALFFULLMASK or PL18X_MMCI_RXDATAAVLBLMASK or PL18X_MMCI_TXFIFOHALFEMPTYMASK);
|
|
Type definitions
PL18X version Id
[Expand]
PPL18XVersionID = ^TPL18XVersionID;
TPL18XVersionID = record
PeripheralID:LongWord;
|
|
PeripheralMask:LongWord;
|
|
VersionData:PPL18XVersionData;
|
|
PL18X version data
[Expand]
PPL18XVersionData = ^TPL18XVersionData;
TPL18XVersionData = record
Name:String;
|
Name of the device
|
ClockRegister:LongWord;
|
Default value for MCICLOCK register
|
ClockEnable:LongWord;
|
Enable value for MMCICLOCK register
|
Clock8BitEnable:LongWord;
|
Enable value for 8 bit bus
|
ClockNegativeEdgeEnable:LongWord;
|
Enable value for inverted data/cmd output
|
DataLengthBits:LongWord;
|
Number of bits in the MMCIDATALENGTH register
|
FIFOSize:LongWord;
|
Number of bytes that can be written when MMCI_TXFIFOEMPTY is asserted (likewise for RX)
|
FIFOHalfSize:LongWord;
|
Number of bytes that can be written when MCI_TXFIFOHALFEMPTY is asserted (likewise for RX)
|
DataCommandEnable:LongWord;
|
Enable value for data commands
|
DataControlMaskDDR:LongWord;
|
DDR mode mask in MMCIDATACTRL register
|
DataControlMaskSDIO:LongWord;
|
SDIO enable mask in MMCIDATACTRL register
|
STSDIO:LongBool;
|
Enable ST specific SDIO logic
|
STClockDivider:LongBool;
|
True if using a ST-specific clock divider algorithm
|
BlockSizeDataControl16:LongBool;
|
True if Block size is at b16..b30 position in MMCIDATACTRL register
|
BlockSizeDataControl4:LongBool;
|
True if Block size is at b4..b16 position in MMCIDATACTRL register
|
PowerPowerUp:LongWord;
|
Power up value for MMCIPOWER register
|
ClockMaximum:LongWord;
|
Maximum clk frequency supported by the controller
|
SignalDirection:LongBool;
|
Input/out direction of bus signals can be indicated
|
PowerClockGate:LongBool;
|
MMCIPOWER register must be used to gate the clock
|
BusyDetect:LongBool;
|
True if busy detection on dat0 is supported
|
PowerNoPower:LongBool;
|
Bits in MMCIPOWER don't control external power supply
|
ExplicitMClockControl:LongBool;
|
Enable explicit mclk control in driver
|
QualcommFIFO:LongBool;
|
Enable Qualcomm specific FIFO PIO read logic
|
QualcommDMA:LongBool;
|
Enable Qualcomm specific DMA glue for DMA transfers
|
ReversedIRQ:LongBool;
|
Handle data irq before cmd irq
|
PL18X MMCI registers
[Expand]
PPL18XMMCIRegisters = ^TPL18XMMCIRegisters;
TPL18XMMCIRegisters = record
| Note: Layout of the PL18X registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0172a/i1006458.html)
|
Power:LongWord;
|
Power control register
|
Clock:LongWord;
|
Clock control register
|
Argument:LongWord;
|
Argument register
|
Command:LongWord;
|
Command register
|
RespCmd:LongWord;
|
Response command register
|
Response0:LongWord;
|
Response register
|
Response1:LongWord;
|
Response register
|
Response2:LongWord;
|
Response register
|
Response3:LongWord;
|
Response register
|
DataTimer:LongWord;
|
Data timer
|
DataLength:LongWord;
|
Data length register
|
DataCtrl:LongWord;
|
Data control register
|
DataCnt:LongWord;
|
Data counter
|
Status:LongWord;
|
Status register
|
Clear:LongWord;
|
Clear register
|
Mask0:LongWord;
|
Interrupt 0 mask register
|
Mask1:LongWord;
|
Interrupt 1 mask register
|
Select:LongWord;
|
Secure digital memory card select register
|
FifoCnt:LongWord;
|
FIFO counter
|
Reserved:array[$4C..$7C] of Byte;
|
Reserved
|
FIFO:LongWord;
|
Data FIFO register (0x80 to 0xBC)
|
PL18X SDHCI get RXFIFO count
TPL18XSDHCIGetRXFIFOCount = function(SDHCI:PPL18XSDHCIHost; Status,Remain:LongWord):LongWord;
|
|
PL18X SDHCI host
[Expand]
PPL18XSDHCIHost = ^TPL18XSDHCIHost;
TPL18XSDHCIHost = record
| SDHCI Properties
|
SDHCI:TSDHCIHost;
|
|
| PL18X Properties
|
IRQ0:LongWord;
|
First host IRQ line
|
IRQ1:LongWord;
|
Second host IRQ line
|
EnableFIQ:LongBool;
|
Use FIQ instead of IRQ
|
SingleIRQ:LongBool;
|
The host only has a single IRQ line instead of the standard 2 lines
|
Registers:PPL18XMMCIRegisters;
|
Host registers
|
Version:PPL18XVersionData;
|
Host version data
|
ClockRegister:LongWord;
|
Current clock register value
|
PowerRegister:LongWord;
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Current power register value
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DataCtrlRegister:LongWord;
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Current data control register value
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BusyStatus:LongWord;
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Current Busy Status for ST Micro variants
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GetRXFIFOCount:TPL18XSDHCIGetRXFIFOCount;
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Model specific GetRXFIFOCount function
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Public variables
PL18X specific variables
PL18X_MMCI_FIQ_ENABLED:LongBool;
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The SDHCI uses Fast Interrupt Requests (FIQ) instead of IRQ
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PL18X_MMCI_MIN_FREQ:LongWord = 400000;
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Minimum clock frequency for SDHCI (Default minimum of 400KHz)
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PL18X_MMCI_MAX_FREQ:LongWord = 400000;
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Maximum clock frequency for SDHCI (Default maximum of 400KHz)
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Function declarations
Initialization functions
[Expand]
procedure PL18XInit;
Description: Initialize the PL18X unit and version table
| Note
|
Called only during system startup
|
PL18X functions
[Expand]
function PL180SDHCICreate(Address:PtrUInt; const Name:String; IRQ0,IRQ1,ClockMinimum,ClockMaximum:LongWord; CardDetect:TMMCDeviceGetCardDetect = nil; WriteProtect:TMMCDeviceGetWriteProtect = nil):PSDHCIHost;
Description: Create and register a new PL180 SDHCI device which can be accessed using the SDHCI API
| Address
|
The address of the PL180 registers
|
| Name
|
The text description of this device which will show in the device list (Optional)
|
| IRQ0
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The interrupt 0 number for the PL180
|
| IRQ1
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The interrupt 1 number for the PL180
|
| ClockMinimum
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The minimum frequency for the Pl180 clock
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| ClockMaximum
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The maximum frequency for the Pl180 clock
|
| Return
|
Pointer to the new SDHCI device or nil if the SDHCI device could not be created
|
[Expand]
function PL181SDHCICreate(Address:PtrUInt; const Name:String; IRQ0,IRQ1,ClockMinimum,ClockMaximum:LongWord; CardDetect:TMMCDeviceGetCardDetect = nil; WriteProtect:TMMCDeviceGetWriteProtect = nil):PSDHCIHost;
Description: Create and register a new PL181 SDHCI device which can be accessed using the SDHCI API
| Address
|
The address of the PL181 registers
|
| Name
|
The text description of this device which will show in the device list (Optional)
|
| IRQ0
|
The interrupt 0 number for the PL181
|
| IRQ1
|
The interrupt 1 number for the PL181
|
| ClockMinimum
|
The minimum frequency for the Pl181 clock
|
| ClockMaximum
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The maximum frequency for the Pl181 clock
|
| Return
|
Pointer to the new SDHCI device or nil if the SDHCI device could not be created
|
[Expand]
function PL18XSDHCIDestroy(SDHCI:PSDHCIHost):LongWord;
Description: Stop, deregister and destroy a PL18X SDHCI device created by this driver
| SDHCI
|
The SDHCI device to destroy
|
| Return
|
ERROR_SUCCESS if completed or another error code on failure
|
PL18X MMC functions
[Expand]
function PL18XMMCDeviceGetCardDetect(MMC:PMMCDevice):LongWord;
Description: Implementation of MMCDeviceGetCardDetect API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use MMCDeviceGetCardDetect instead.
|
[Expand]
function PL18XMMCDeviceGetWriteProtect(MMC:PMMCDevice):LongWord;
Description: Implementation of MMCDeviceGetWriteProtect API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use MMCDeviceGetWriteProtect instead.
|
[Expand]
function PL18XMMCDeviceSendCommand(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
Description: Implementation of MMCDeviceSendCommand API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use MMCDeviceSendCommand instead.
|
[Expand]
function PL18XMMCDeviceSetIOS(MMC:PMMCDevice):LongWord;
Description: Implementation of MMCDeviceSetIOS API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use MMCDeviceSetIOS instead.
|
PL18X SDHCI functions
[Expand]
function PL18XSDHCIHostStart(SDHCI:PSDHCIHost):LongWord;
Description: Implementation of SDHCIHostStart API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostStart instead.
|
[Expand]
function PL18XSDHCIHostStop(SDHCI:PSDHCIHost):LongWord;
Description: Implementation of SDHCIHostStop API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostStop instead.
|
[Expand]
function PL18XSDHCIHostReadByte(SDHCI:PSDHCIHost; Reg:LongWord):Byte;
Description: Implementation of SDHCIHostReadByte API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostReadByte instead.
|
[Expand]
function PL18XSDHCIHostReadWord(SDHCI:PSDHCIHost; Reg:LongWord):Word;
Description: Implementation of SDHCIHostReadWord API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostReadWord instead.
|
[Expand]
function PL18XSDHCIHostReadLong(SDHCI:PSDHCIHost; Reg:LongWord):LongWord;
Description: Implementation of SDHCIHostReadLong API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostReadLong instead.
|
[Expand]
procedure PL18XSDHCIHostWriteByte(SDHCI:PSDHCIHost; Reg:LongWord; Value:Byte);
Description: Implementation of SDHCIHostWriteByte API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostWriteByte instead.
|
[Expand]
procedure PL18XSDHCIHostWriteWord(SDHCI:PSDHCIHost; Reg:LongWord; Value:Word);
Description: Implementation of SDHCIHostWriteWord API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostWriteWord instead.
|
[Expand]
procedure PL18XSDHCIHostWriteLong(SDHCI:PSDHCIHost; Reg:LongWord; Value:LongWord);
Description: Implementation of SDHCIHostWriteLong API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCIHostWriteLong instead.
|
[Expand]
function PL18XSDHCIHostSetPower(SDHCI:PSDHCIHost; Power:Word):LongWord;
Description: Implementation of SDHCISetPower API for PL18X SDHCI
| Note
|
Not intended to be called directly by applications, use SDHCISetPower instead.
|
[Expand]
procedure PL18XSDHCIInterruptHandler(SDHCI:PPL18XSDHCIHost);
Description: Interrupt handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
|
[Expand]
procedure PL18XSDHCIDataInterrupt(SDHCI:PPL18XSDHCIHost; Status:LongWord);
Description: Data interrupt handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
Caller must hold the host lock
|
[Expand]
procedure PL18XSDHCICommandInterrupt(SDHCI:PPL18XSDHCIHost; Status:LongWord);
Description: Command interrupt handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
Caller must hold the host lock
|
[Expand]
procedure PL18XSDHCIStopData(SDHCI:PPL18XSDHCIHost);
Description: Data stop handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
Caller must hold the host lock
|
[Expand]
procedure PL18XSDHCIPIOInterruptHandler(SDHCI:PPL18XSDHCIHost);
Description: PIO Interrupt handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
|
[Expand]
function PL18XSHDCIReadPIO(SDHCI:PPL18XSDHCIHost ;Buffer:Pointer; Remain:LongWord):LongWord;
Description: PIO read interrupt handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
Caller must hold the host lock
|
[Expand]
function PL18XSDHCIWritePIO(SDHCI:PPL18XSDHCIHost; Buffer:Pointer; Remain,Status:LongWord):LongWord;
Description: PIO read interrupt handler for the PL18X SDHCI
| Note
|
Not intended to be called directly by applications
Caller must hold the host lock
|
PL18X helper functions
[Expand]
function PL18XGetPeripheralID(SDHCI:PPL18XSDHCIHost):LongWord;
Description: Return the Peripheral Id for a PL18X SDHCI device
[Expand]
function PL18XGetVersionData(SDHCI:PPL18XSDHCIHost):PPL18XVersionData;
Description: Return the version data for a PL18X SDHCI device based on the Peripheral Id
[Expand]
function PL18XGetRXFIFOCount(SDHCI:PPL18XSDHCIHost; Status,Remain:LongWord):LongWord;
Description: Determine the receive FIFO count available
[Expand]
function PL18XQualcommGetRXFIFOCount(SDHCI:PPL18XSDHCIHost; Status,Remain:LongWord):LongWord;
Description: Determine the receive FIFO count available
[Expand]
procedure PL18XRegisterDelay(SDHCI:PPL18XSDHCIHost);
Description: Delay for the required amount of time after a register write
[Expand]
procedure PL18XSetClockRegister(SDHCI:PPL18XSDHCIHost; MMC:PMMCDevice; Desired:LongWord);
Description: Setup the current clock rate in the clock register
| Note
|
Caller must hold the host lock
|
[Expand]
procedure PL18XSetPowerRegister(SDHCI:PPL18XSDHCIHost; Value:LongWord);
Description: Setup the current power state in the power register
| Note
|
Caller must hold the host lock
|
[Expand]
procedure PL18XSetInterruptMask1(SDHCI:PPL18XSDHCIHost; Mask:LongWord);
Description: Setup the interrupt mask to use either Mask0 or Mask1 depending on configuration
| Note
|
Caller must hold the host lock
|
[Expand]
procedure PL18XWriteClockRegister(SDHCI:PPL18XSDHCIHost; Clock:LongWord);
Description: Write to the clock register
| Note
|
Caller must hold the host lock
|
[Expand]
procedure PL18XWritePowerRegister(SDHCI:PPL18XSDHCIHost; Power:LongWord);
Description: Write to the power register
| Note
|
Caller must hold the host lock
|
[Expand]
procedure PL18XWriteDataCtrlRegister(SDHCI:PPL18XSDHCIHost; DataCtrl:LongWord);
Description: Write to the data control register
| Note
|
Caller must hold the host lock
|
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