Difference between revisions of "Unit PL18X"
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− | '' | + | |
+ | '''PL18X version Id''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | <code>PPL18XVersionID = ^TPL18XVersionID;</code> | ||
+ | |||
+ | <code>TPL18XVersionID = record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PeripheralID:LongWord;</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | | <code>PeripheralMask:LongWord;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>VersionData:PPL18XVersionData;</code> | ||
+ | | | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''PL18X version data''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | <code>PPL18XVersionData = ^TPL18XVersionData;</code> | ||
+ | |||
+ | <code>TPL18XVersionData = record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>Name:String;</code> | ||
+ | | Name of the device | ||
+ | |- | ||
+ | | <code>ClockRegister:LongWord;</code> | ||
+ | | Default value for MCICLOCK register | ||
+ | |- | ||
+ | | <code>ClockEnable:LongWord;</code> | ||
+ | | Enable value for MMCICLOCK register | ||
+ | |- | ||
+ | | <code>Clock8BitEnable:LongWord;</code> | ||
+ | | Enable value for 8 bit bus | ||
+ | |- | ||
+ | | <code>ClockNegativeEdgeEnable:LongWord;</code> | ||
+ | | Enable value for inverted data/cmd output | ||
+ | |- | ||
+ | | <code>DataLengthBits:LongWord;</code> | ||
+ | | Number of bits in the MMCIDATALENGTH register | ||
+ | |- | ||
+ | | <code>FIFOSize:LongWord;</code> | ||
+ | | Number of bytes that can be written when MMCI_TXFIFOEMPTY is asserted (likewise for RX) | ||
+ | |- | ||
+ | | <code>FIFOHalfSize:LongWord;</code> | ||
+ | | Number of bytes that can be written when MCI_TXFIFOHALFEMPTY is asserted (likewise for RX) | ||
+ | |- | ||
+ | | <code>DataCommandEnable:LongWord;</code> | ||
+ | | Enable value for data commands | ||
+ | |- | ||
+ | | <code>DataControlMaskDDR:LongWord;</code> | ||
+ | | DDR mode mask in MMCIDATACTRL register | ||
+ | |- | ||
+ | | <code>DataControlMaskSDIO:LongWord;</code> | ||
+ | | SDIO enable mask in MMCIDATACTRL register | ||
+ | |- | ||
+ | | <code>STSDIO:LongBool;</code> | ||
+ | | Enable ST specific SDIO logic | ||
+ | |- | ||
+ | | <code>STClockDivider:LongBool;</code> | ||
+ | | True if using a ST-specific clock divider algorithm | ||
+ | |- | ||
+ | | <code>BlockSizeDataControl16:LongBool;</code> | ||
+ | | True if Block size is at b16..b30 position in MMCIDATACTRL register | ||
+ | |- | ||
+ | | <code>BlockSizeDataControl4:LongBool;</code> | ||
+ | | True if Block size is at b4..b16 position in MMCIDATACTRL register | ||
+ | |- | ||
+ | | <code>PowerPowerUp:LongWord;</code> | ||
+ | | Power up value for MMCIPOWER register | ||
+ | |- | ||
+ | | <code>ClockMaximum:LongWord;</code> | ||
+ | | Maximum clk frequency supported by the controller | ||
+ | |- | ||
+ | | <code>SignalDirection:LongBool;</code> | ||
+ | | Input/out direction of bus signals can be indicated | ||
+ | |- | ||
+ | | <code>PowerClockGate:LongBool;</code> | ||
+ | | MMCIPOWER register must be used to gate the clock | ||
+ | |- | ||
+ | | <code>BusyDetect:LongBool;</code> | ||
+ | | True if busy detection on dat0 is supported | ||
+ | |- | ||
+ | | <code>PowerNoPower:LongBool;</code> | ||
+ | | Bits in MMCIPOWER don't control external power supply | ||
+ | |- | ||
+ | | <code>ExplicitMClockControl:LongBool;</code> | ||
+ | | Enable explicit mclk control in driver | ||
+ | |- | ||
+ | | <code>QualcommFIFO:LongBool;</code> | ||
+ | | Enable Qualcomm specific FIFO PIO read logic | ||
+ | |- | ||
+ | | <code>QualcommDMA:LongBool;</code> | ||
+ | | Enable Qualcomm specific DMA glue for DMA transfers | ||
+ | |- | ||
+ | | <code>ReversedIRQ:LongBool;</code> | ||
+ | | Handle data irq before cmd irq | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''PL18X MMCI registers''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | <code>PPL18XMMCIRegisters = ^TPL18XMMCIRegisters;</code> | ||
+ | |||
+ | <code>TPL18XMMCIRegisters = record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|Note: Layout of the PL18X registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0172a/i1006458.html) | ||
+ | |- | ||
+ | | <code>Power:LongWord;</code> | ||
+ | | Power control register | ||
+ | |- | ||
+ | | <code>Clock:LongWord;</code> | ||
+ | | Clock control register | ||
+ | |- | ||
+ | | <code>Argument:LongWord;</code> | ||
+ | | Argument register | ||
+ | |- | ||
+ | | <code>Command:LongWord;</code> | ||
+ | | Command register | ||
+ | |- | ||
+ | | <code>RespCmd:LongWord;</code> | ||
+ | | Response command register | ||
+ | |- | ||
+ | | <code>Response0:LongWord;</code> | ||
+ | | Response register | ||
+ | |- | ||
+ | | <code>Response1:LongWord;</code> | ||
+ | | Response register | ||
+ | |- | ||
+ | | <code>Response2:LongWord;</code> | ||
+ | | Response register | ||
+ | |- | ||
+ | | <code>Response3:LongWord;</code> | ||
+ | | Response register | ||
+ | |- | ||
+ | | <code>DataTimer:LongWord;</code> | ||
+ | | Data timer | ||
+ | |- | ||
+ | | <code>DataLength:LongWord;</code> | ||
+ | | Data length register | ||
+ | |- | ||
+ | | <code>DataCtrl:LongWord;</code> | ||
+ | | Data control register | ||
+ | |- | ||
+ | | <code>DataCnt:LongWord;</code> | ||
+ | | Data counter | ||
+ | |- | ||
+ | | <code>Status:LongWord;</code> | ||
+ | | Status register | ||
+ | |- | ||
+ | | <code>Clear:LongWord;</code> | ||
+ | | Clear register | ||
+ | |- | ||
+ | | <code>Mask0:LongWord;</code> | ||
+ | | Interrupt 0 mask register | ||
+ | |- | ||
+ | | <code>Mask1:LongWord;</code> | ||
+ | | Interrupt 1 mask register | ||
+ | |- | ||
+ | | <code>Select:LongWord;</code> | ||
+ | | Secure digital memory card select register | ||
+ | |- | ||
+ | | <code>FifoCnt:LongWord;</code> | ||
+ | | FIFO counter | ||
+ | |- | ||
+ | | <code>Reserved:array[$4C..$7C] of Byte;</code> | ||
+ | | Reserved | ||
+ | |- | ||
+ | | <code>FIFO:LongWord;</code> | ||
+ | | Data FIFO register (0x80 to 0xBC) | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | |||
+ | '''PL18X SDHCI get RXFIFO count''' | ||
+ | |||
+ | {| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;" | ||
+ | |- | ||
+ | | <code>TPL18XSDHCIGetRXFIFOCount = function(SDHCI:PPL18XSDHCIHost; Status,Remain:LongWord):LongWord;</code> | ||
+ | | style="width: 40%;"| | ||
+ | |- | ||
+ | |} | ||
+ | |||
+ | '''PL18X SDHCI host''' | ||
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;"> | ||
+ | <code>PPL18XSDHCIHost = ^TPL18XSDHCIHost;</code> | ||
+ | |||
+ | <code>TPL18XSDHCIHost = record</code> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|''SDHCI Properties'' | ||
+ | |- | ||
+ | | <code>SDHCI:TSDHCIHost;</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | |colspan="2"|''PL18X Properties'' | ||
+ | |- | ||
+ | | <code>IRQ0:LongWord;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>IRQ1:LongWord;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>Lock:TSpinHandle;</code> | ||
+ | | Host lock (Differs from lock in Host portion) Spin lock due to use by interrupt handler | ||
+ | |- | ||
+ | | <code>SingleIRQ:LongBool;</code> | ||
+ | | The host only has a single IRQ line instead of the standard 2 lines | ||
+ | |- | ||
+ | | <code>Registers:PPL18XMMCIRegisters;</code> | ||
+ | | Host registers | ||
+ | |- | ||
+ | | <code>Version:PPL18XVersionData;</code> | ||
+ | | Host version data | ||
+ | |- | ||
+ | | <code>ClockRegister:LongWord;</code> | ||
+ | | Current clock register value | ||
+ | |- | ||
+ | | <code>PowerRegister:LongWord;</code> | ||
+ | | Current power register value | ||
+ | |- | ||
+ | | <code>DataCtrlRegister:LongWord;</code> | ||
+ | | Current data control register value | ||
+ | |- | ||
+ | | <code>MaximumBlockSize:LongWord;</code> | ||
+ | | Host maximum block size | ||
+ | |- | ||
+ | | <code>MaximumRequestSize:LongWord;</code> | ||
+ | | Host maximum request size | ||
+ | |- | ||
+ | | <code>BusyStatus:LongWord;</code> | ||
+ | | Current Busy Status for ST Micro variants | ||
+ | |- | ||
+ | | <code>GetRXFIFOCount:TPL18XSDHCIGetRXFIFOCount;</code> | ||
+ | | Model specific GetRXFIFOCount function | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
=== Public variables === | === Public variables === |
Revision as of 04:57, 13 June 2017
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Contents
[hide]Description
ARM PrimeCell PL180/181 Multimedia Card Interface Driver unit
The PL180/181 Multimedia Card is an ARM peripheral that is compatible with MMC multimedia cards and SD secure digital cards in memory mapped I/O format compatible with the ARM advanced peripheral bus (APB).
The design of the Pl180/181 allows for multiple cards per controller however this driver currently only supports attaching one card.
Constants
To be documented
Type definitions
PL18X version Id
PL18X version data
PL18X MMCI registers
PL18X SDHCI get RXFIFO count
TPL18XSDHCIGetRXFIFOCount = function(SDHCI:PPL18XSDHCIHost; Status,Remain:LongWord):LongWord;
|
PL18X SDHCI host
Public variables
PL18X specific variables
PL18X_MMCI_FIQ_ENABLED:LongBool;
|
The SDHCI uses Fast Interrupt Requests (FIQ) instead of IRQ |
PL18X_MMCI_MIN_FREQ:LongWord = 400000;
|
Minimum clock frequency for SDHCI (Default minimum of 400KHz) |
PL18X_MMCI_MAX_FREQ:LongWord = 400000;
|
Maximum clock frequency for SDHCI (Default maximum of 400KHz) |
Function declarations
To be documented
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