Unit PL110
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Description
ARM PrimeCell PL110 Color LCD Controller Driver unit
The ARM PrimeCell PL110 Color LCD Controller is an AMBA compliant module that provides LCD display support for both TFT and STN displays in a variety of configurations.
While the controller supports TFT displays it differs from other TFT display controllers because it has a DMA interface to system memory rather than using SPI or other serial transfer protocols.
Currently this driver only supports the setup required for the QEMU VersatilePB target however it is possible to support additional configurations by adding more variations of the PL110FramebufferCreate functions (eg PL110FramebufferCreateSTN etc).
Note: The driver does not include support for FRAMEBUFFER_FLAG_SYNC as the QEMU emulation of the device does not provide interrupt support at present.
Constants
PL110 specific constants
PL110_* PL110_FRAMEBUFFER_DESCRIPTION = 'ARM PrimeCell PL110 Color LCD';
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Description of PL110 device |
PL110_MAX_PHYSICALWIDTH = 1024;
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PL110_MAX_PHYSICALHEIGHT = 1024;
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PL110 mode
PL110_MODE_* PL110_MODE_UNKNOWN = 0;
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PL110_MODE_VGA = 1;
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Connected to a VGA display |
PL110_MODE_SVGA = 2;
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Connected to a SVGA display |
PL110_MODE_TFT = 3;
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Connected to a TFT display |
PL110_MODE_STN = 4;
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Connected to an STN display |
PL110 register offset
PL110_CLCD_* | See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html | |
PL110_CLCD_TIMING0 = $00000000;
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Horizontal Axis Panel Control Register |
PL110_CLCD_TIMING1 = $00000004;
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Vertical Axis Panel Control Register |
PL110_CLCD_TIMING2 = $00000008;
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Clock and Signal Polarity Control Register |
PL110_CLCD_TIMING3 = $0000000c;
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Line End Control Register |
PL110_CLCD_UPBASE = $00000010;
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Upper Panel Frame Base Address Registers |
PL110_CLCD_LPBASE = $00000014;
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Lower Panel Frame Base Address Registers |
PL110_CLCD_CONTROL = $00000018;
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Control Register Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM |
PL110_CLCD_IMSC = $0000001c;
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Interrupt Mask Set/Clear Register Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM |
PL110_CLCD_RIS = $00000020;
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Raw Interrupt Status Register |
PL110_CLCD_MIS = $00000024;
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Masked Interrupt Status Register |
PL110_CLCD_ICR = $00000028;
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Interrupt Clear Register |
PL110_CLCD_UPCURR = $0000002C;
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Upper Panel Current Address Value Registers |
PL110_CLCD_LPCURR = $00000030;
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Lower Panel Current Address Value Registers |
PL110_CLCD_PALETTE = $00000200;
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Color Palette Register |
PL110 CLCD timing0
PL110_CLCD_TIMING0_* | See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html | |
PL110_CLCD_TIMING0_HBP = ($FF shl 24);
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Horizontal back porch |
PL110_CLCD_TIMING0_HFP = ($FF shl 16);
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Horizontal front porch |
PL110_CLCD_TIMING0_HSW = ($FF shl 8);
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Horizontal synchronization pulse width |
PL110_CLCD_TIMING0_PPL = ($FC shl 2);
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Pixels-per-line (Actual pixels-per-line = 16 * (PPL + 1)) |
PL110 CLCD timing1
PL110_CLCD_TIMING1_* | See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html | |
PL110_CLCD_TIMING1_VBP = ($FF shl 24);
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Vertical back porch |
PL110_CLCD_TIMING1_VFP = ($FF shl 16);
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Vertical front porch |
PL110_CLCD_TIMING1_VSW = ($FC shl 10);
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Vertical synchronization pulse width |
PL110_CLCD_TIMING1_LPP = ($3FF shl 0);
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Lines per panel is the number of active lines per screen (Program to number of lines required minus 1) |
PL110 CLCD timing2
PL110_CLCD_TIMING2_* | See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html | |
PL110_CLCD_TIMING2_PCD_HI = ($1F shl 27);
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Upper five bits of Panel Clock Divisor |
PL110_CLCD_TIMING2_BCD = (1 shl 26);
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Bypass pixel clock divider |
PL110_CLCD_TIMING2_CPL = ($3FF shl 16);
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Clocks per line |
PL110_CLCD_TIMING2_IOE = (1 shl 14);
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Invert output enable |
PL110_CLCD_TIMING2_IPC = (1 shl 13);
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Invert panel clock |
PL110_CLCD_TIMING2_IHS = (1 shl 12);
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Invert horizontal synchron |
PL110_CLCD_TIMING2_IVS = (1 shl 11);
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Invert vertical synchronization |
PL110_CLCD_TIMING2_ACB = ($1F shl 6);
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AC bias pin frequency |
PL110_CLCD_TIMING2_CLKSEL = (1 shl 5);
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This bit drives the CLCDCLKSEL signal which is used as the select signal for the external LCD clock multiplexor |
PL110_CLCD_TIMING2_PCD_LO = ($1F shl 0);
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Lower five bits of Panel Clock Divisor |
PL110 CLCD timing3
PL110_CLCD_TIMING3_* | See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html | |
PL110_CLCD_TIMING3_LEE = (1 shl 16);
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LCD Line end enable: 0 = CLLE disabled (held LOW)/1 = CLLE signal active |
PL110_CLCD_TIMING3_LED = ($3F shl 0);
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Line-end signal delay from the rising-edge of the last panel clock |
PL110 CLCD control
PL110_CLCD_CONTROL_* | See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html | |
PL110_CLCD_CONTROL_LCDEN = (1 shl 0);
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PL110_CLCD_CONTROL_LCDBPP1 = (0 shl 1);
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LCD bits per pixel: 000 = 1 bpp |
PL110_CLCD_CONTROL_LCDBPP2 = (1 shl 1);
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LCD bits per pixel: 001 = 2 bpp |
PL110_CLCD_CONTROL_LCDBPP4 = (2 shl 1);
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LCD bits per pixel: 010 = 4 bpp |
PL110_CLCD_CONTROL_LCDBPP8 = (3 shl 1);
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LCD bits per pixel: 011 = 8 bpp |
PL110_CLCD_CONTROL_LCDBPP16 = (4 shl 1);
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LCD bits per pixel: 100 = 16 bpp |
PL110_CLCD_CONTROL_LCDBPP16_565 = (6 shl 1);
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LCD bits per pixel: 110 = 16 bpp 565 (PL111 only) |
PL110_CLCD_CONTROL_LCDBPP16_444 = (7 shl 1);
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LCD bits per pixel: 111 = 16 bpp 444 (PL111 only) |
PL110_CLCD_CONTROL_LCDBPP24 = (5 shl 1);
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LCD bits per pixel: 101 = 24 bpp |
PL110_CLCD_CONTROL_LCDBW = (1 shl 4);
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STN LCD is monochrome (black and white) (0 = STN LCD is color/1 = STN LCD is monochrome) |
PL110_CLCD_CONTROL_LCDTFT = (1 shl 5);
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LCD is TFT (0 = LCD is an STN display, use gray scaler/1 = LCD is TFT, do not use gray scaler) |
PL110_CLCD_CONTROL_LCDMONO8 = (1 shl 6);
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Monochrome LCD has an 8-bit interface (0 = mono LCD uses 4-bit interface/1 = mono LCD uses 8-bit interface) |
PL110_CLCD_CONTROL_LCDDUAL = (1 shl 7);
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LCD interface is dual panel STN (0 = single panel LCD is in use/1 = dual panel LCD is in use) |
PL110_CLCD_CONTROL_BGR = (1 shl 8);
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RGB or BGR format selection (0 = RGB normal output/1 = BGR red and blue swapped.) |
PL110_CLCD_CONTROL_BEBO = (1 shl 9);
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Big-endian byte order (0 = little-endian byte order/1 = big-endian byte order) |
PL110_CLCD_CONTROL_BEPO = (1 shl 10);
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Big-endian pixel ordering within a byte (0 = little-endian pixel ordering within a byte/1= big-endian pixel ordering within a byte) |
PL110_CLCD_CONTROL_LCDPWR = (1 shl 11);
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LCD power enable |
PL110_CLCD_CONTROL_LCDVCOMP_VSYNC = (0 shl 12);
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Generate interrupt at: 00 = start of vertical synchronization |
PL110_CLCD_CONTROL_LCDVCOMP_BPORCH = (1 shl 12);
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Generate interrupt at: 01 = start of back porch |
PL110_CLCD_CONTROL_LCDVCOMP_VIDEO = (2 shl 12);
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Generate interrupt at: 10 = start of active video |
PL110_CLCD_CONTROL_LCDVCOMP_FPORCH = (3 shl 12);
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Generate interrupt at: 11 = start of front porch |
PL110_CLCD_CONTROL_LDMAFIFOTIME = (1 shl 15);
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Unknown |
PL110_CLCD_CONTROL_WATERMARK = (1 shl 16);
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LCD DMA FIFO Watermark level |
PL110 control
PL110_CONTROL_* PL110_CONTROL_VGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;
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PL110_CONTROL_SVGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;
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PL110 timing0
PL110_TIMING0_* PL110_TIMING0_VGA = $3F1F3F9C;
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PL110_TIMING0_SVGA = $1313A4C4;
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PL110 timing1
PL110_TIMING1_* PL110_TIMING1_VGA = $090B61DF;
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PL110_TIMING1_SVGA = $0505F657;
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PL110 timing2
PL110_TIMING2_* PL110_TIMING2_VGA = $067F1800;
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PL110_TIMING2_SVGA = $071F1800;
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Type definitions
PL110 CLCD registers
PPL110CLCDRegisters = ^TPL110CLCDRegisters;
TPL110CLCDRegisters = record
| Note: Layout of the PL110 registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I904421.html) | |
TIMING0:LongWord;
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Horizontal Axis Panel Control Register |
TIMING1:LongWord;
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Vertical Axis Panel Control Register |
TIMING2:LongWord;
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Clock and Signal Polarity Control Register |
TIMING3:LongWord;
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Line End Control Register |
UPBASE:LongWord;
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Upper Panel Frame Base Address Registers |
CONTROL:LongWord;
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Control Register Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM |
IMSC:LongWord;
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Interrupt Mask Set/Clear Register Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM |
RIS:LongWord;
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Raw Interrupt Status Register |
MIS:LongWord;
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Masked Interrupt Status Register |
ICR:LongWord;
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Interrupt Clear Register |
UPCURR:LongWord;
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Upper Panel Current Address Value Registers |
LPCURR:LongWord;
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Lower Panel Current Address Value Registers |
PL110 framebuffer properties
PPL110Framebuffer = ^TPL110Framebuffer;
TPL110Framebuffer = record
| Framebuffer Properties | |
Framebuffer:TFramebufferDevice;
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| PL110 Properties | |
Mode:LongWord;
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PL110 framebuffer mode (eg PL110_MODE_TFT) |
Depth:LongWord;
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Framebuffer color depth (eg FRAMEBUFFER_DEPTH_16) |
Width:LongWord;
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Framebuffer width in pixels |
Height:LongWord;
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Framebuffer height in pixels |
Rotation:LongWord;
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Framebuffer rotation (eg FRAMEBUFFER_ROTATION_180) |
| Driver Properties | |
Control:LongWord;
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Preset Control register value |
Timing0:LongWord;
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Preset Timing0 register value |
Timing1:LongWord;
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Preset Timing1 register value |
Timing2:LongWord;
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Preset Timing2 register value |
Timing3:LongWord;
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Preset Timing2 register value |
Registers:PPL110CLCDRegisters;
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PL110 registers |
Public variables
None defined
Function declarations
PL110 functions
function PL110FramebufferCreateVGA(Address:PtrUInt; const Name:String; Rotation,Width,Height,Depth:LongWord):PFramebufferDevice;
Description: Create, register and allocate a new PL110 Framebuffer device which can be accessed using the framebuffer API
| Address | The address of the PL110 registers |
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| Name | The text description of this device which will show in the device list (Optional) |
| Rotation | The rotation value for the framebuffer device (eg FRAMEBUFFER_ROTATION_180) |
| Width | The width of the framebuffer in pixels |
| Height | The height of the framebuffer in pixels |
| Depth | The color depth (bits per pixel) for the framebuffer (eg FRAMEBUFFER_DEPTH_16) |
| Return | Pointer to the new Framebuffer device or nil if the framebuffer device could not be created |
function PL110FramebufferCreateSVGA(Address:PtrUInt; const Name:String; Rotation,Width,Height,Depth:LongWord):PFramebufferDevice;
Description: Create, register and allocate a new PL110 Framebuffer device which can be accessed using the framebuffer API
| Address | The address of the PL110 registers |
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| Name | The text description of this device which will show in the device list (Optional) |
| Rotation | The rotation value for the framebuffer device (eg FRAMEBUFFER_ROTATION_180) |
| Width | The width of the framebuffer in pixels |
| Height | The height of the framebuffer in pixels |
| Depth | The color depth (bits per pixel) for the framebuffer (eg FRAMEBUFFER_DEPTH_16) |
| Return | Pointer to the new Framebuffer device or nil if the framebuffer device could not be created |
function PL110FramebufferDestroy(Framebuffer:PFramebufferDevice):LongWord;
Description: Release, deregister and destroy a PL110 Framebuffer device created by this driver
| Framebuffer | The Framebuffer device to destroy |
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| Return | ERROR_SUCCESS if completed or another error code on failure |
PL110 framebuffer functions
function PL110FramebufferAllocate(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;
Description: Implementation of FramebufferDeviceAllocate API for PL110 Framebuffer
| Note | Not intended to be called directly by applications, use FramebufferDeviceAllocate instead. |
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function PL110FramebufferRelease(Framebuffer:PFramebufferDevice):LongWord;
Description: Implementation of FramebufferDeviceRelease API for PL110 Framebuffer
| Note | Not intended to be called directly by applications, use FramebufferDeviceRelease instead. |
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function PL110FramebufferBlank(Framebuffer:PFramebufferDevice; Blank:Boolean):LongWord;
Description: Implementation of FramebufferDevicBlank API for PL110 Framebuffer
| Note | Not intended to be called directly by applications, use FramebufferDevicBlank instead. |
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function PL110FramebufferCommit(Framebuffer:PFramebufferDevice; Address:PtrUInt; Size,Flags:LongWord):LongWord;
Description: Implementation of FramebufferDeviceCommit API for PL110 Framebuffer
| Note | Not intended to be called directly by applications, use FramebufferDeviceCommit instead. |
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function PL110FramebufferSetOffsetEx(Framebuffer:PFramebufferDevice; X,Y:LongWord; Pan,Switch:Boolean):LongWord;
Description: Implementation of FramebufferDeviceSetOffsetEx API for PL110 Framebuffer
| Note | Not intended to be called directly by applications, use FramebufferDeviceSetOffsetEx instead. |
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