Unit MMC
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Description
Ultibo MMC/SD interface unit
This unit implements the standards based part of the SD/MMC specification including the standard SDHCI interfaces.
For each platform a SDHCI module needs to be provided that implements the platform specific parts of the SDHCI interface.
This is similar in model to USB and other interfaces in Ultibo, where the generic interface unit requires a platform specific module to register with it in order to communicate with platform specific devices.
The SD/MMC interfaces are 2 tier (ie Host and Device) whereas the USB interface is 3 tier (Host, Device and Driver).
Constants
MMC_*
MMC_NAME_PREFIX = 'MMC';
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Name prefix for MMC Devices |
MMC_DEVICE_DESCRIPTION = 'MMC/SD Device';
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Description of MMC/SD device |
MMC_STORAGE_DESCRIPTION = 'MMC/SD Storage Device';
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Description of MMC/SD storage device |
MMC_STATUS_TIMER_INTERVAL = 1000;
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MMC_DEFAULT_BLOCKSIZE = 512;
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MMC_DEFAULT_BLOCKSHIFT = 9;
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MMC_TYPE_*
MMC_TYPE_NONE = 0;
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MMC_TYPE_MMC = 1;
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An MMC specification card |
MMC_TYPE_SD = 2;
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An SD specification card |
MMC_TYPE_SDIO = 3;
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An SDIO specification card |
MMC_TYPE_SD_COMBO = 4;
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An SD/SDIO combination card |
MMC_TYPE_MAX = 4;
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MMC_STATE_*
MMC_STATE_EJECTED = 0;
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MMC_STATE_INSERTED = 1;
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MMC_STATE_MAX = 1;
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MMC_FLAG_*
MMC_FLAG_NONE = $00000000;
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MMC_FLAG_CARD_PRESENT = $00000001;
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MMC_FLAG_WRITE_PROTECT = $00000002;
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MMC_FLAG_HIGH_CAPACITY = $00000004;
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High Capacity (SDHC) |
MMC_FLAG_EXT_CAPACITY = $00000008;
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Extended Capacity (SDXC) |
MMC_FLAG_UHS_I = $00000010;
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Ultra High Speed (UHS-I) |
MMC_FLAG_UHS_II = $00000020;
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Ultra High Speed (UHS-II) |
MMC_FLAG_BLOCK_ADDRESSED = $00000040;
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Block Addressed (SDHC/SDXC and others) |
MMC_FLAG_AUTO_BLOCK_COUNT = $00000080;
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Auto CMD23 (Set Block Count) |
MMC_FLAG_AUTO_COMMAND_STOP = $00000100;
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Auto CMD12 (Stop Transmission) |
MMC_FLAG_DDR_MODE = $00000200;
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MMC_FLAG_NON_REMOVABLE = $00000400;
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Device is non removable, only check for presence once. |
MMC_STATUS_*
MMC_STATUS_SUCCESS = 0;
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Function successful |
MMC_STATUS_TIMEOUT = 1;
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The operation timed out |
MMC_STATUS_NO_MEDIA = 2;
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No media present in device |
MMC_STATUS_HARDWARE_ERROR = 3;
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Hardware error of some form occurred |
MMC_STATUS_INVALID_DATA = 4;
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Invalid data was received |
MMC_STATUS_INVALID_PARAMETER = 5;
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An invalid parameter was passed to the function |
MMC_STATUS_INVALID_SEQUENCE = 6;
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Invalid sequence encountered |
MMC_STATUS_OUT_OF_MEMORY = 7;
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No memory available for operation |
MMC_STATUS_UNSUPPORTED_REQUEST = 8;
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The request is unsupported |
MMC_STATUS_NOT_PROCESSED = 9;
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The MMC transfer has not yet been processed |
SD_VERSION_*, MMC_VERSION_*
SD_VERSION_SD = $00020000;
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SD_VERSION_1_0 = (SD_VERSION_SD or $0100);
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SD_VERSION_1_10 = (SD_VERSION_SD or $010a);
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SD_VERSION_2 = (SD_VERSION_SD or $0200);
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SD_VERSION_3 = (SD_VERSION_SD or $0300);
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SD_VERSION_4 = (SD_VERSION_SD or $0400);
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MMC_VERSION_MMC = $00010000;
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MMC_VERSION_1_2 = (MMC_VERSION_MMC or $0102);
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MMC_VERSION_1_4 = (MMC_VERSION_MMC or $0104);
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MMC_VERSION_2_2 = (MMC_VERSION_MMC or $0202);
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MMC_VERSION_3 = (MMC_VERSION_MMC or $0300);
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MMC_VERSION_4 = (MMC_VERSION_MMC or $0400);
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MMC_VERSION_4_1 = (MMC_VERSION_MMC or $0401);
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MMC_VERSION_4_2 = (MMC_VERSION_MMC or $0402);
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MMC_VERSION_4_3 = (MMC_VERSION_MMC or $0403);
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MMC_VERSION_4_41 = (MMC_VERSION_MMC or $0429);
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MMC_VERSION_4_5 = (MMC_VERSION_MMC or $0405);
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MMC_VERSION_5_0 = (MMC_VERSION_MMC or $0500);
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MMC_VERSION_UNKNOWN = (MMC_VERSION_MMC);
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MMC_CAP_*
From: /include/linux/mmc/host.h | |
MMC_CAP_4_BIT_DATA = (1 shl 0);
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Can the host do 4 bit transfers |
MMC_CAP_MMC_HIGHSPEED = (1 shl 1);
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Can do MMC high-speed timing |
MMC_CAP_SD_HIGHSPEED = (1 shl 2);
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Can do SD high-speed timing |
MMC_CAP_SDIO_IRQ = (1 shl 3);
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Can signal pending SDIO IRQs |
MMC_CAP_SPI = (1 shl 4);
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Talks only SPI protocols |
MMC_CAP_NEEDS_POLL = (1 shl 5);
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Needs polling for card-detection |
MMC_CAP_8_BIT_DATA = (1 shl 6);
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Can the host do 8 bit transfers |
MMC_CAP_AGGRESSIVE_PM = (1 shl 7);
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Suspend = (e)MMC/SD at idle |
MMC_CAP_NONREMOVABLE = (1 shl 8);
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Nonremovable eg. eMMC |
MMC_CAP_WAIT_WHILE_BUSY = (1 shl 9);
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Waits while card is busy |
MMC_CAP_3_3V_DDR = (1 shl 11);
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Host supports eMMC DDR 3.3V |
MMC_CAP_1_8V_DDR = (1 shl 12);
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Host supports eMMC DDR 1.8V |
MMC_CAP_1_2V_DDR = (1 shl 13);
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Host supports eMMC DDR 1.2V |
MMC_CAP_DDR = (MMC_CAP_3_3V_DDR or MMC_CAP_1_8V_DDR or MMC_CAP_1_2V_DDR);
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MMC_CAP_POWER_OFF_CARD = (1 shl 14);
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Can power off after boot |
MMC_CAP_BUS_WIDTH_TEST = (1 shl 15);
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CMD14/CMD19 bus width ok |
MMC_CAP_UHS_SDR12 = (1 shl 16);
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Host supports UHS SDR12 mode |
MMC_CAP_UHS_SDR25 = (1 shl 17);
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Host supports UHS SDR25 mode |
MMC_CAP_UHS_SDR50 = (1 shl 18);
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Host supports UHS SDR50 mode |
MMC_CAP_UHS_SDR104 = (1 shl 19);
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Host supports UHS SDR104 mode |
MMC_CAP_UHS_DDR50 = (1 shl 20);
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Host supports UHS DDR50 mode |
MMC_CAP_UHS = (MMC_CAP_UHS_SDR12 or MMC_CAP_UHS_SDR25 or MMC_CAP_UHS_SDR50 or MMC_CAP_UHS_SDR104 or MMC_CAP_UHS_DDR50);
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MMC_CAP_SYNC_RUNTIME_PM = (1 shl 21);
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Synced runtime PM suspends |
MMC_CAP_NEED_RSP_BUSY = (1 shl 22);
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Commands with R1B can't use R1 |
MMC_CAP_DRIVER_TYPE_A = (1 shl 23);
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Host supports Driver Type A |
MMC_CAP_DRIVER_TYPE_C = (1 shl 24);
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Host supports Driver Type C |
MMC_CAP_DRIVER_TYPE_D = (1 shl 25);
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Host supports Driver Type D |
MMC_CAP_DONE_COMPLETE = (1 shl 27);
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RW reqs can be completed within mmc_request_done() |
MMC_CAP_CD_WAKE = (1 shl 28);
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Enable card detect wake |
MMC_CAP_CMD_DURING_TFR = (1 shl 29);
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Commands during data transfer |
MMC_CAP_CMD23 = (1 shl 30);
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CMD23 supported |
MMC_CAP_HW_RESET = (1 shl 31);
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Reset the eMMC card via RST_n |
MMC_DATA_*
MMC_DATA_READ = 1;
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MMC_DATA_WRITE = 2;
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MMC_BUS_WIDTH_*
MMC_BUS_WIDTH_1 = 0;
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MMC_BUS_WIDTH_4 = 2;
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MMC_BUS_WIDTH_8 = 3;
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MMC_BUS_SPEED_*
MMC_BUS_SPEED_DEFAULT = 0;
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MMC_BUS_SPEED_HS26 = 26000000;
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MMC_BUS_SPEED_HS52 = 52000000;
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MMC_BUS_SPEED_DDR = 52000000;
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MMC_BUS_SPEED_HS200 = 200000000;
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MMC_TIMING_*
From: /include/linux/mmc/host.h | |
MMC_TIMING_LEGACY = 0;
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MMC_TIMING_MMC_HS = 1;
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MMC_TIMING_SD_HS = 2;
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MMC_TIMING_UHS_SDR12 = 3;
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MMC_TIMING_UHS_SDR25 = 4;
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MMC_TIMING_UHS_SDR50 = 5;
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MMC_TIMING_UHS_SDR104 = 6;
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MMC_TIMING_UHS_DDR50 = 7;
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MMC_TIMING_MMC_DDR52 = 8;
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MMC_TIMING_MMC_HS200 = 9;
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MMC_TIMING_MMC_HS400 = 10;
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MMC_CMD_*
From: /include/linux/mmc/mmc.h | |
Class 1 | |
MMC_CMD_GO_IDLE_STATE = 0;
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MMC_CMD_SEND_OP_COND = 1;
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MMC_CMD_ALL_SEND_CID = 2;
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MMC_CMD_SET_RELATIVE_ADDR = 3;
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MMC_CMD_SET_DSR = 4;
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MMC_CMD_SLEEP_AWAKE = 5;
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MMC_CMD_SWITCH = 6;
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MMC_CMD_SELECT_CARD = 7;
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MMC_CMD_SEND_EXT_CSD = 8;
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MMC_CMD_SEND_CSD = 9;
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MMC_CMD_SEND_CID = 10;
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MMC_CMD_READ_DAT_UNTIL_STOP = 11;
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MMC_CMD_STOP_TRANSMISSION = 12;
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MMC_CMD_SEND_STATUS = 13;
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MMC_CMD_BUS_TEST_R = 14;
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MMC_CMD_GO_INACTIVE_STATE = 15;
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MMC_CMD_BUS_TEST_W = 19;
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MMC_CMD_SPI_READ_OCR = 58;
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MMC_CMD_SPI_CRC_ON_OFF = 59;
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Class 2 | |
MMC_CMD_SET_BLOCKLEN = 16;
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MMC_CMD_READ_SINGLE_BLOCK = 17;
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MMC_CMD_READ_MULTIPLE_BLOCK = 18;
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MMC_CMD_SEND_TUNING_BLOCK = 19;
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MMC_CMD_SEND_TUNING_BLOCK_HS200 = 21;
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Class 3 | |
MMC_CMD_WRITE_DAT_UNTIL_STOP = 20;
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Class 4 | |
MMC_CMD_SET_BLOCK_COUNT = 23;
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MMC_CMD_WRITE_SINGLE_BLOCK = 24;
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MMC_CMD_WRITE_MULTIPLE_BLOCK = 25;
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MMC_CMD_PROGRAM_CID = 26;
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MMC_CMD_PROGRAM_CSD = 27;
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Class 6 | |
MMC_CMD_SET_WRITE_PROT = 28;
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MMC_CMD_CLR_WRITE_PROT = 29;
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MMC_CMD_SEND_WRITE_PROT = 30;
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Class 5 | |
MMC_CMD_ERASE_GROUP_START = 35;
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MMC_CMD_ERASE_GROUP_END = 36;
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MMC_CMD_ERASE = 38;
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Class 9 | |
MMC_CMD_FAST_IO = 39;
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MMC_CMD_GO_IRQ_STATE = 40;
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Class 7 | |
MMC_CMD_LOCK_UNLOCK = 42;
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Class 8 | |
MMC_CMD_APP_CMD = 55;
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MMC_CMD_GEN_CMD = 56;
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MMC_CMD_RES_MAN = 62;
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MMC_CMD62_ARG1 = $EFAC62EC;
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MMC_CMD62_ARG2 = $00CBAEA7;
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MMC_RSP_*
From: /include/linux/mmc/mmc.h | |
Native | |
MMC_RSP_PRESENT = (1 shl 0);
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MMC_RSP_136 = (1 shl 1);
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136 bit response |
MMC_RSP_CRC = (1 shl 2);
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Expect valid crc |
MMC_RSP_BUSY = (1 shl 3);
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Card may send busy |
MMC_RSP_OPCODE = (1 shl 4);
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Response contains opcode |
These are the native response types, and correspond to valid bit patterns of the above flags. One additional valid pattern is all zeros, which means we don't expect a response. | |
MMC_RSP_NONE = (0);
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MMC_RSP_R1 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
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MMC_RSP_R1B = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE or MMC_RSP_BUSY);
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MMC_RSP_R2 = (MMC_RSP_PRESENT or MMC_RSP_136 or MMC_RSP_CRC);
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MMC_RSP_R3 = (MMC_RSP_PRESENT);
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MMC_RSP_R4 = (MMC_RSP_PRESENT);
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MMC_RSP_R5 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
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MMC_RSP_R6 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
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MMC_RSP_R7 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
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SPI | |
MMC_RSP_SPI_S1 = (1 shl 7);
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One status byte |
MMC_RSP_SPI_S2 = (1 shl 8);
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Second byte |
MMC_RSP_SPI_B4 = (1 shl 9);
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Four data bytes |
MMC_RSP_SPI_BUSY = (1 shl 10);
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Card may send busy |
These are the SPI response types for MMC, SD, and SDIO cards. Commands return R1, with maybe more info. Zero is an error type, callers must always provide the appropriate MMC_RSP_SPI_Rx flags. | |
MMC_RSP_SPI_R1 = (MMC_RSP_SPI_S1);
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MMC_RSP_SPI_R1B = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_BUSY);
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MMC_RSP_SPI_R2 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_S2);
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MMC_RSP_SPI_R3 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_B4);
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MMC_RSP_SPI_R4 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_B4);
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MMC_RSP_SPI_R5 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_S2);
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MMC_RSP_SPI_R7 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_B4);
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MMC_RSP_R1_*, MMC_RSP_R2_*
R1 - MMC status in R1, for native mode (SPI bits are different) | |
MMC_RSP_R1_OUT_OF_RANGE = (1 shl 31);
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MMC_RSP_R1_ADDRESS_ERROR = (1 shl 30);
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MMC_RSP_R1_BLOCK_LEN_ERROR = (1 shl 29);
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MMC_RSP_R1_ERASE_SEQ_ERROR = (1 shl 28);
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MMC_RSP_R1_ERASE_PARAM = (1 shl 27);
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MMC_RSP_R1_WP_VIOLATION = (1 shl 26);
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MMC_RSP_R1_CARD_IS_LOCKED = (1 shl 25);
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MMC_RSP_R1_LOCK_UNLOCK_FAILED = (1 shl 24);
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MMC_RSP_R1_COM_CRC_ERROR = (1 shl 23);
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MMC_RSP_R1_ILLEGAL_COMMAND = (1 shl 22);
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MMC_RSP_R1_CARD_ECC_FAILED = (1 shl 21);
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MMC_RSP_R1_CC_ERROR = (1 shl 20);
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MMC_RSP_R1_ERROR = (1 shl 19);
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MMC_RSP_R1_UNDERRUN = (1 shl 18);
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MMC_RSP_R1_OVERRUN = (1 shl 17);
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MMC_RSP_R1_CID_CSD_OVERWRITE = (1 shl 16);
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MMC_RSP_R1_WP_ERASE_SKIP = (1 shl 15);
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MMC_RSP_R1_CARD_ECC_DISABLED = (1 shl 14);
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MMC_RSP_R1_ERASE_RESET = (1 shl 13);
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MMC_RSP_R1_READY_FOR_DATA = (1 shl 8);
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MMC_RSP_R1_SWITCH_ERROR = (1 shl 7);
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MMC_RSP_R1_EXCEPTION_EVENT = (1 shl 6);
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MMC_RSP_R1_APP_CMD = (1 shl 5);
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MMC_RSP_R1_AKE_SEQ_ERROR = (1 shl 3);
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R1 SPI - MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS. R1 is the low order byte, R2 is the next highest byte, when present. | |
MMC_RSP_R1_SPI_IDLE = (1 shl 0);
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MMC_RSP_R1_SPI_ERASE_RESET = (1 shl 1);
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MMC_RSP_R1_SPI_ILLEGAL_COMMAND = (1 shl 2);
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MMC_RSP_R1_SPI_COM_CRC = (1 shl 3);
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MMC_RSP_R1_SPI_ERASE_SEQ = (1 shl 4);
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MMC_RSP_R1_SPI_ADDRESS = (1 shl 5);
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MMC_RSP_R1_SPI_PARAMETER = (1 shl 6);
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R1 bit 7 is always zero | |
R2 SPI - See above | |
MMC_RSP_R2_SPI_CARD_LOCKED = (1 shl 8);
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MMC_RSP_R2_SPI_WP_ERASE_SKIP = (1 shl 9);
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Or lock/unlock fail |
MMC_RSP_R2_SPI_LOCK_UNLOCK_FAIL = MMC_RSP_R2_SPI_WP_ERASE_SKIP;
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MMC_RSP_R2_SPI_ERROR = (1 shl 10);
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MMC_RSP_R2_SPI_CC_ERROR = (1 shl 11);
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MMC_RSP_R2_SPI_CARD_ECC_ERROR = (1 shl 12);
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MMC_RSP_R2_SPI_WP_VIOLATION = (1 shl 13);
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MMC_RSP_R2_SPI_ERASE_PARAM = (1 shl 14);
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MMC_RSP_R2_SPI_OUT_OF_RANGE = (1 shl 15);
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Or CSD overwrite |
MMC_RSP_R2_SPI_CSD_OVERWRITE = MMC_RSP_R2_SPI_OUT_OF_RANGE;
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MMC_OCR_*
See: Section 5.1 of SD Physical Layer Simplified Specification V4.10 | |
MMC_OCR_BUSY = $80000000;
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Busy Status - 0 = Initializing/1 = Initialization Complete |
MMC_OCR_HCS = $40000000;
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Card Capacity Status - 0 = SDSC/1 = SDHC or SDXC |
MMC_OCR_UHS_II = $20000000;
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UHS-II Card Status - 0 = Non UHS-II Card/1 = UHS-II Card |
MMC_OCR_S18A = $01000000;
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Switching to 1.8V Accepted - 0 = Continue current voltage signaling/1 = Ready for switching signal voltage |
MMC_OCR_VOLTAGE_MASK = $007FFF80;
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MMC_OCR_ACCESS_MODE = $60000000;
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MMC_CARD_STATUS_*
See: Section 4.10.1 of SD Physical Layer Simplified Specification Version 4.10 | |
Note: These map to the Native mode R1 response values | |
MMC_CARD_STATUS_MASK = not($0206BF7F);
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MMC_CARD_STATUS_ERROR = (1 shl 19);
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MMC_CARD_STATUS_CURRENT_STATE = ($0F shl 9);
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See MMC_CURRENT_STATE_ definitions below |
MMC_CARD_STATUS_READY_FOR_DATA = (1 shl 8);
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MMC_CARD_STATUS_SWITCH_ERROR = (1 shl 7);
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MMC_CURRENT_STATE_*
From Card Status Register or R1 Response | |
MMC_CURRENT_STATE_IDLE = (0 shl 9);
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MMC_CURRENT_STATE_READY = (1 shl 9);
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MMC_CURRENT_STATE_IDENT = (2 shl 9);
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MMC_CURRENT_STATE_STBY = (3 shl 9);
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MMC_CURRENT_STATE_TRAN = (4 shl 9);
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MMC_CURRENT_STATE_DATA = (5 shl 9);
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MMC_CURRENT_STATE_RCV = (6 shl 9);
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MMC_CURRENT_STATE_PRG = (7 shl 9);
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MMC_CURRENT_STATE_DIS = (8 shl 9);
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MMC_CID_*
See: Section 5.2 of SD Physical Layer Simplified Specification Version 4.10 | |
MMC CID Fields | |
MMC_CID_MID = 1;
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Manufacturer Id |
MMC_CID_OID = 2;
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OEM/Application Id |
MMC_CID_PNM0 = 3;
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Product name (Byte 0) |
MMC_CID_PNM1 = 4;
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Product name (Byte 1) |
MMC_CID_PNM2 = 5;
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Product name (Byte 2) |
MMC_CID_PNM3 = 6;
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Product name (Byte 3) |
MMC_CID_PNM4 = 7;
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Product name (Byte 4) |
MMC_CID_PNM5 = 8;
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Product name (Byte 5) |
MMC_CID_PNM6 = 9;
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Product name (Byte 6) |
MMC_CID_PRV = 10;
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Product revision |
MMC_CID_HRV = 11;
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Hardware revision |
MMC_CID_FRV = 12;
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Firmware revision |
MMC_CID_PSN = 13;
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Product serial number |
MMC_CID_MDT_YEAR = 14;
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Manufacturing year |
MMC_CID_MDT_MONTH = 15;
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Manufacturing month |
MMC_CID_CRC = 16;
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CRC |
MMC_CSD_*
See: Section 5.3 of SD Physical Layer Simplified Specification Version 4.10 | |
MMC CSD Fields | |
MMC_CSD_STRUCTURE = 1;
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MMC_CSD_SPECVER = 2;
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MMC/eMMC Only |
MMC_CSD_TAAC_UNIT = 3;
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MMC_CSD_TAAC_VALUE = 4;
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MMC_CSD_NSAC = 5;
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MMC_CSD_TRAN_SPEED_UNIT = 6;
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MMC_CSD_TRAN_SPEED_VALUE = 37;
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MMC_CSD_CCC = 7;
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MMC_CSD_READ_BL_LEN = 8;
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MMC_CSD_READ_BL_PARTIAL = 9;
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MMC_CSD_WRITE_BLK_MISALIGN = 10;
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MMC_CSD_READ_BLK_MISALIGN = 11;
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MMC_CSD_DSR_IMP = 12;
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MMC_CSD_C_SIZE = 13;
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MMC_CSD_VDD_R_CURR_MIN = 14;
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MMC_CSD_VDD_R_CURR_MAX = 15;
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MMC_CSD_VDD_W_CURR_MIN = 16;
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MMC_CSD_VDD_W_CURR_MAX = 17;
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MMC_CSD_C_SIZE_MULT = 18;
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MMC_CSD_ERASE_BLK_EN = 19;
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SD Specification |
MMC_CSD_SECTOR_SIZE = 20;
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MMC/eMMC Specification/SD Specification |
MMC_CSD_ERASE_GRP_SIZE = 21;
|
MMC/eMMC Specification |
MMC_CSD_ERASE_GRP_MULT = 22;
|
MMC/eMMC Specification |
MMC_CSD_WP_GRP_SIZE = 23;
|
|
MMC_CSD_WP_GRP_ENABLE = 24;
|
|
MMC_CSD_DEFAULT_ECC = 25;
|
MMC/eMMC Only |
MMC_CSD_R2W_FACTOR = 26;
|
|
MMC_CSD_WRITE_BL_LEN = 27;
|
|
MMC_CSD_WRITE_BL_PARTIAL = 28;
|
|
MMC_CSD_CONTENT_PROT_APP = 29;
|
MMC/eMMC Only |
MMC_CSD_FILE_FORMAT_GRP = 30;
|
|
MMC_CSD_COPY = 31;
|
|
MMC_CSD_PERM_WRITE_PROTECT = 32;
|
|
MMC_CSD_TMP_WRITE_PROTECT = 33;
|
|
MMC_CSD_FILE_FORMAT = 34;
|
|
MMC_CSD_ECC = 35;
|
MMC/eMMC Only |
MMC_CSD_CRC = 36;
|
MMC_CSD_STRUCT_*
MMC_CSD_STRUCT_VER_1_0 = 0;
|
Valid for system specification 1.0 - 1.2 |
MMC_CSD_STRUCT_VER_1_1 = 1;
|
Valid for system specification 1.4 - 2.2 |
MMC_CSD_STRUCT_VER_1_2 = 2;
|
Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 |
MMC_CSD_STRUCT_EXT_CSD = 3;
|
Version is coded in CSD_STRUCTURE in EXT_CSD |
MMC_CSD_SPEC_VER_*
MMC_CSD_SPEC_VER_0 = 0;
|
Implements system specification 1.0 - 1.2 |
MMC_CSD_SPEC_VER_1 = 1;
|
Implements system specification 1.4 |
MMC_CSD_SPEC_VER_2 = 2;
|
Implements system specification 2.0 - 2.2 |
MMC_CSD_SPEC_VER_3 = 3;
|
Implements system specification 3.1 - 3.2 - 3.31 |
MMC_CSD_SPEC_VER_4 = 4;
|
Implements system specification 4.0 - 4.1 |
MMC_CSD_TAAC_UNITS*
MMC_CSD_TAAC_UNITS:array[0..7] of LongWord = (
| |
1,
|
|
10,
|
|
100,
|
|
1000,
|
|
10000,
|
|
100000,
|
|
1000000,
|
|
10000000);
|
MMC_CSD_TAAC_VALUES*
MMC_CSD_TAAC_VALUES:array[0..15] of LongWord = (
| |
0,
|
|
10,
|
|
12,
|
|
13,
|
|
15,
|
|
20,
|
|
25,
|
|
30,
|
|
35,
|
|
40,
|
|
45,
|
|
50,
|
|
55,
|
|
60,
|
|
70,
|
|
80);
|
MMC_CCC_*
See: Table 4-21 (Page 68) of SD Physical Layer Simplified Specification V4.10 | |
MMC_CCC_BASIC = (1 shl 0);
|
(Class 0) Basic protocol functions (CMD0,1,2,3,4,7,9,10,12,13,15) (and for SPI, CMD58,59) |
MMC_CCC_STREAM_READ = (1 shl 1);
|
(Class 1) Stream read commands (CMD11) |
MMC_CCC_BLOCK_READ = (1 shl 2);
|
(Class 2) Block read commands (CMD16,17,18) |
MMC_CCC_STREAM_WRITE = (1 shl 3);
|
(Class 3) Stream write commands (CMD20) |
MMC_CCC_BLOCK_WRITE = (1 shl 4);
|
(Class 4) Block write commands (CMD16,24,25,26,27) |
MMC_CCC_ERASE = (1 shl 5);
|
(Class 5) Ability to erase blocks (CMD32,33,34,35,36,37,38,39) |
MMC_CCC_WRITE_PROT = (1 shl 6);
|
(Class 6) Ability to write protect blocks (CMD28,29,30) |
MMC_CCC_LOCK_CARD = (1 shl 7);
|
(Class 7) Ability to lock down card (CMD16,CMD42) |
MMC_CCC_APP_SPEC = (1 shl 8);
|
(Class 8) Application specific (CMD55,56,57,ACMD*) |
MMC_CCC_IO_MODE = (1 shl 9);
|
(Class 9) I/O mode (CMD5,39,40,52,53) |
MMC_CCC_SWITCH = (1 shl 10);
|
(Class 10) High speed switch (CMD6,34,35,36,37,50) |
MMC_CCC_EXTENSION = (1 shl 11);
|
(Class 11) Extension (CMD?) |
MMC_CSD_TRAN_SPEED_UNITS*
MMC_CSD_TRAN_SPEED_UNITS:array[0..7] of LongWord = (
| |
10000,
|
|
100000,
|
|
1000000,
|
|
10000000,
|
|
0,
|
|
0,
|
|
0,
|
|
0);
|
MMC_CSD_TRAN_SPEED_VALUES*
MMC_CSD_TRAN_SPEED_VALUES:array[0..15] of LongWord = (
| |
0,
|
|
10,
|
|
12,
|
|
13,
|
|
15,
|
|
20,
|
|
25,
|
|
30,
|
|
35,
|
|
40,
|
|
45,
|
|
50,
|
|
55,
|
|
60,
|
|
70,
|
|
80);
|
|
SECURE_ERASE = $80000000;
|
Used by MMC_CMD_ERASE |
MMC_VDD_*
MMC_VDD_165_195 = $00000080;
|
VDD voltage 1.65 - 1.95 |
MMC_VDD_20_21 = $00000100;
|
VDD voltage 2.0 ~ 2.1 |
MMC_VDD_21_22 = $00000200;
|
VDD voltage 2.1 ~ 2.2 |
MMC_VDD_22_23 = $00000400;
|
VDD voltage 2.2 ~ 2.3 |
MMC_VDD_23_24 = $00000800;
|
VDD voltage 2.3 ~ 2.4 |
MMC_VDD_24_25 = $00001000;
|
VDD voltage 2.4 ~ 2.5 |
MMC_VDD_25_26 = $00002000;
|
VDD voltage 2.5 ~ 2.6 |
MMC_VDD_26_27 = $00004000;
|
VDD voltage 2.6 ~ 2.7 |
MMC_VDD_27_28 = $00008000;
|
VDD voltage 2.7 ~ 2.8 |
MMC_VDD_28_29 = $00010000;
|
VDD voltage 2.8 ~ 2.9 |
MMC_VDD_29_30 = $00020000;
|
VDD voltage 2.9 ~ 3.0 |
MMC_VDD_30_31 = $00040000;
|
VDD voltage 3.0 ~ 3.1 |
MMC_VDD_31_32 = $00080000;
|
VDD voltage 3.1 ~ 3.2 |
MMC_VDD_32_33 = $00100000;
|
VDD voltage 3.2 ~ 3.3 |
MMC_VDD_33_34 = $00200000;
|
VDD voltage 3.3 ~ 3.4 |
MMC_VDD_34_35 = $00400000;
|
VDD voltage 3.4 ~ 3.5 |
MMC_VDD_35_36 = $00800000;
|
VDD voltage 3.5 ~ 3.6 |
MMC_SWITCH_MODE_*
MMC_SWITCH_MODE_CMD_SET = $00;
|
Change the command set |
MMC_SWITCH_MODE_SET_BITS = $01;
|
Set bits in EXT_CSD byte addressed by index which are 1 in value field |
MMC_SWITCH_MODE_CLEAR_BITS = $02;
|
Clear bits in EXT_CSD byte addressed by index, which are 1 in value field |
MMC_SWITCH_MODE_WRITE_BYTE = $03;
|
Set target byte to value |
EXT_CSD_*
EXT_CSD_CMDQ_MODE_EN = 15;
|
R/W |
EXT_CSD_FLUSH_CACHE = 32;
|
W |
EXT_CSD_CACHE_CTRL = 33;
|
R/W |
EXT_CSD_POWER_OFF_NOTIFICATION = 34;
|
R/W |
EXT_CSD_PACKED_FAILURE_INDEX = 35;
|
RO |
EXT_CSD_PACKED_CMD_STATUS = 36;
|
RO |
EXT_CSD_EXP_EVENTS_STATUS = 54;/code>
|
RO, 2 bytes |
<code>EXT_CSD_EXP_EVENTS_CTRL = 56; | R/W, 2 bytes |
EXT_CSD_DATA_SECTOR_SIZE = 61;
|
R |
EXT_CSD_ENH_START_ADDR = 136;
|
R/W |
EXT_CSD_ENH_SIZE_MULT = 140;
|
R/W |
EXT_CSD_GP_SIZE_MULT = 143;
|
R/W |
EXT_CSD_PARTITION_SETTING_COMPLETED = 155;
|
R/W |
EXT_CSD_PARTITION_ATTRIBUTE = 156;
|
R/W |
EXT_CSD_MAX_ENH_SIZE_MULT = 157;
|
R |
EXT_CSD_PARTITION_SUPPORT = 160;
|
RO |
EXT_CSD_HPI_MGMT = 161;
|
R/W |
EXT_CSD_RST_N_FUNCTION = 162;
|
R/W |
EXT_CSD_BKOPS_EN = 163;
|
R/W |
EXT_CSD_BKOPS_START = 164;
|
W |
EXT_CSD_SANITIZE_START = 165;
|
W |
EXT_CSD_WR_REL_PARAM = 166;
|
RO |
EXT_CSD_WR_REL_SET = 167;
|
R/W |
EXT_CSD_RPMB_MULT = 168;
|
RO |
EXT_CSD_FW_CONFIG = 169;
|
R/W |
EXT_CSD_BOOT_WP = 173;
|
R/W |
EXT_CSD_ERASE_GROUP_DEF = 175;
|
R/W |
EXT_CSD_BOOT_BUS_CONDITIONS = 177;
|
R/W/E |
EXT_CSD_PART_CONFIG = 179;
|
R/W |
EXT_CSD_ERASED_MEM_CONT = 181;
|
RO |
EXT_CSD_BUS_WIDTH = 183;
|
R/W |
EXT_CSD_STROBE_SUPPORT = 184
|
RO |
EXT_CSD_HS_TIMING = 185;
|
R/W |
EXT_CSD_POWER_CLASS = 187;
|
R/W |
EXT_CSD_REV = 192;
|
RO |
EXT_CSD_STRUCTURE = 194;
|
RO |
EXT_CSD_CARD_TYPE = 196;
|
RO |
EXT_CSD_DRIVER_STRENGTH = 197;
|
RO |
EXT_CSD_OUT_OF_INTERRUPT_TIME = 198;
|
RO |
EXT_CSD_PART_SWITCH_TIME = 199;
|
RO |
EXT_CSD_PWR_CL_52_195 = 200;
|
RO |
EXT_CSD_PWR_CL_26_195 = 201;
|
RO |
EXT_CSD_PWR_CL_52_360 = 202;
|
RO |
EXT_CSD_PWR_CL_26_360 = 203;
|
RO |
EXT_CSD_SEC_CNT = 212;
|
RO, 4 bytes |
EXT_CSD_S_A_TIMEOUT = 217;
|
RO |
EXT_CSD_REL_WR_SEC_C = 222;
|
RO |
EXT_CSD_HC_WP_GRP_SIZE = 221;
|
RO |
EXT_CSD_ERASE_TIMEOUT_MULT = 223;
|
RO |
EXT_CSD_HC_ERASE_GRP_SIZE = 224;
|
RO |
EXT_CSD_BOOT_SIZE_MULT = 226;
|
RO |
EXT_CSD_SEC_TRIM_MULT = 229;
|
RO |
EXT_CSD_SEC_ERASE_MULT = 230;
|
RO |
EXT_CSD_SEC_FEATURE_SUPPORT = 231;
|
RO |
EXT_CSD_TRIM_MULT = 232;
|
RO |
EXT_CSD_PWR_CL_200_195 = 236;
|
RO |
EXT_CSD_PWR_CL_200_360 = 237;
|
RO |
EXT_CSD_PWR_CL_DDR_52_195 = 238;
|
RO |
EXT_CSD_PWR_CL_DDR_52_360 = 239;
|
RO |
EXT_CSD_BKOPS_STATUS = 246;
|
RO |
EXT_CSD_POWER_OFF_LONG_TIME = 247;
|
RO |
EXT_CSD_GENERIC_CMD6_TIME = 248;
|
RO |
EXT_CSD_CACHE_SIZE = 249;
|
RO, 4 bytes |
EXT_CSD_PWR_CL_DDR_200_360 = 253;
|
RO |
EXT_CSD_FIRMWARE_VERSION = 254;
|
RO, 8 bytes |
EXT_CSD_PRE_EOL_INFO = 267;
|
RO |
EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A = 268;
|
RO |
EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B = 269;
|
RO |
EXT_CSD_CMDQ_DEPTH = 307;
|
RO |
EXT_CSD_CMDQ_SUPPORT = 308;
|
RO |
EXT_CSD_SUPPORTED_MODE = 493;
|
RO |
EXT_CSD_TAG_UNIT_SIZE = 498;
|
RO |
EXT_CSD_DATA_TAG_SUPPORT = 499;
|
RO |
EXT_CSD_MAX_PACKED_WRITES = 500;
|
RO |
EXT_CSD_MAX_PACKED_READS = 501;
|
RO |
EXT_CSD_BKOPS_SUPPORT = 502;
|
RO |
EXT_CSD_HPI_FEATURES = 503;
|
RO |
EXT_CSD_*
EXT_CSD_WR_REL_PARAM_EN = (1 shl 2);
|
|
EXT_CSD_BOOT_WP_B_PWR_WP_DIS = $40;
|
|
EXT_CSD_BOOT_WP_B_PERM_WP_DIS = $10;
|
|
EXT_CSD_BOOT_WP_B_PERM_WP_EN = $04;
|
|
EXT_CSD_BOOT_WP_B_PWR_WP_EN = $01;
|
|
EXT_CSD_PART_CONFIG_ACC_MASK = $07;
|
|
EXT_CSD_PART_CONFIG_ACC_BOOT0 = $01;
|
|
EXT_CSD_PART_CONFIG_ACC_RPMB = $03;
|
|
EXT_CSD_PART_CONFIG_ACC_GP0 = $04;
|
|
EXT_CSD_PART_SETTING_COMPLETED = $01;
|
|
EXT_CSD_PART_SUPPORT_PART_EN = $01;
|
|
EXT_CSD_CMD_SET_NORMAL = (1 shl 0);
|
|
EXT_CSD_CMD_SET_SECURE = (1 shl 1);
|
|
EXT_CSD_CMD_SET_CPSECURE = (1 shl 2);
|
|
EXT_CSD_CARD_TYPE_HS_26 = (1 shl 0);
|
Card can run at 26MHz |
EXT_CSD_CARD_TYPE_HS_52 = (1 shl 1);
|
Card can run at 52MHz |
EXT_CSD_CARD_TYPE_HS = (EXT_CSD_CARD_TYPE_HS_26 or EXT_CSD_CARD_TYPE_HS_52);
|
|
EXT_CSD_CARD_TYPE_DDR_1_8V = (1 shl 2);
|
Card can run at 52MHz / DDR mode @1.8V or 3V I/O |
EXT_CSD_CARD_TYPE_DDR_1_2V = (1 shl 3);
|
Card can run at 52MHz / DDR mode @1.2V I/O |
EXT_CSD_CARD_TYPE_DDR_52 = (EXT_CSD_CARD_TYPE_DDR_1_8V or EXT_CSD_CARD_TYPE_DDR_1_2V);
|
|
EXT_CSD_CARD_TYPE_HS200_1_8V = (1 shl 4);
|
Card can run at 200MHz |
EXT_CSD_CARD_TYPE_HS200_1_2V = (1 shl 5);
|
Card can run at 200MHz / SDR mode @1.2V I/O |
EXT_CSD_CARD_TYPE_HS200 = (EXT_CSD_CARD_TYPE_HS200_1_8V or EXT_CSD_CARD_TYPE_HS200_1_2V);
|
|
EXT_CSD_CARD_TYPE_HS400_1_8V = (1 shl 6);
|
Card can run at 200MHz DDR, 1.8V |
EXT_CSD_CARD_TYPE_HS400_1_2V = (1 shl 7);
|
Card can run at 200MHz DDR, 1.2V |
EXT_CSD_CARD_TYPE_HS400 = (EXT_CSD_CARD_TYPE_HS400_1_8V or EXT_CSD_CARD_TYPE_HS400_1_2V);
|
|
EXT_CSD_CARD_TYPE_HS400ES = (1 shl 8);
|
Card can run at HS400ES |
EXT_CSD_BUS_WIDTH_1 = 0;
|
Card is in 1 bit mode |
EXT_CSD_BUS_WIDTH_4 = 1;
|
Card is in 4 bit mode |
EXT_CSD_BUS_WIDTH_8 = 2;
|
Card is in 8 bit mode |
EXT_CSD_DDR_BUS_WIDTH_4 = 5;
|
Card is in 4 bit DDR mode |
EXT_CSD_DDR_BUS_WIDTH_8 = 6;
|
Card is in 8 bit DDR mode |
EXT_CSD_BUS_WIDTH_STROBE = 1 shl 7;
|
Enhanced strobe mode |
EXT_CSD_TIMING_BC = 0;
|
Backwards compatility |
EXT_CSD_TIMING_HS = 1;
|
High speed |
EXT_CSD_TIMING_HS200 = 2;
|
HS200 |
EXT_CSD_TIMING_HS400 = 3;
|
HS400 |
EXT_CSD_DRV_STR_SHIFT = 4;
|
Driver Strength shift |
EXT_CSD_SEC_ER_EN = 1 shl 0;
|
|
EXT_CSD_SEC_BD_BLK_EN = 1 shl 2;
|
|
EXT_CSD_SEC_GB_CL_EN = 1 shl 4;
|
|
EXT_CSD_SEC_SANITIZE = 1 shl 6;
|
v4.5 only |
EXT_CSD_RST_N_EN_MASK = $03;
|
|
EXT_CSD_RST_N_ENABLED = 1;
|
RST_n is enabled on card |
EXT_CSD_NO_POWER_NOTIFICATION = 0;
|
|
EXT_CSD_POWER_ON = 1;
|
|
EXT_CSD_POWER_OFF_SHORT = 2;
|
|
EXT_CSD_POWER_OFF_LONG = 3;
|
|
EXT_CSD_PWR_CL_8BIT_MASK = $F0;
|
8 bit PWR CLS |
EXT_CSD_PWR_CL_4BIT_MASK = $0F;
|
8 bit PWR CLS |
EXT_CSD_PWR_CL_8BIT_SHIFT = 4;
|
|
EXT_CSD_PWR_CL_4BIT_SHIFT = 0;
|
|
EXT_CSD_PACKED_EVENT_EN = 1 shl 3;
|
EXT_CSD_*
EXT_CSD_URGENT_BKOPS = 1 shl 0;
|
|
EXT_CSD_DYNCAP_NEEDED = 1 shl 1;
|
|
EXT_CSD_SYSPOOL_EXHAUSTED = 1 shl 2;
|
|
EXT_CSD_PACKED_FAILURE = 1 shl 3;
|
|
EXT_CSD_PACKED_GENERIC_ERROR = 1 shl 0;
|
|
EXT_CSD_PACKED_INDEXED_ERROR = 1 shl 1;
|
EXT_CSD_BKOPS_*
EXT_CSD_BKOPS_LEVEL_2 = $02;
|
EXT_CSD_*_BKOPS_
EXT_CSD_MANUAL_BKOPS_MASK = $01;
|
|
EXT_CSD_AUTO_BKOPS_MASK = $02;
|
EXT_CSD_CMDQ_*
EXT_CSD_CMDQ_MODE_ENABLED = 1 shl 0;
|
|
EXT_CSD_CMDQ_DEPTH_MASK = $1F;
|
|
EXT_CSD_CMDQ_SUPPORTED = 1 shl 0;
|
MMC_HIGH_*
MMC_HIGH_26_MAX_DTR = 26000000;
|
|
MMC_HIGH_52_MAX_DTR = 52000000;
|
|
MMC_HIGH_DDR_MAX_DTR = 52000000;
|
|
MMC_HS200_MAX_DTR = 200000000;
|
MMC_MIN_PART_*
MMC_MIN_PART_SWITCH_TIME = 300;
|
Milliseconds |
MMCPART_*, MMC_MAX_*
MMCPART_NOAVAILABLE = ($ff);
|
|
PART_ACCESS_MASK = ($07);
|
|
PART_SUPPORT = ($01);
|
|
ENHNCD_SUPPORT = ($02);
|
|
PART_ENH_ATTRIB = ($1f);
|
|
Maximum block size for MMC | |
MMC_MAX_BLOCK_LEN = 512;
|
|
Maximum block count for MMC | |
MMC_MAX_BLOCK_COUNT = 65535;
|
|
The number of MMC physical partitions. These consist of: boot partitions (2), general purpose partitions (4) in MMC v4.4. | |
MMC_NUM_BOOT_PARTITION = 2;
|
|
MMC_PART_RPMB = 3;
|
RPMB partition number |
MMC_LOG_*
MMC_LOG_LEVEL_DEBUG = LOG_LEVEL_DEBUG;
|
MMC debugging messages |
MMC_LOG_LEVEL_INFO = LOG_LEVEL_INFO;
|
MMC informational messages, such as a device being attached or detached |
MMC_LOG_LEVEL_WARN = LOG_LEVEL_WARN;
|
MMC warning messages |
MMC_LOG_LEVEL_ERROR = LOG_LEVEL_ERROR;
|
MMC error messages |
MMC_LOG_LEVEL_NONE = LOG_LEVEL_NONE;
|
No MMC messages |
SD_*
SD_DEFAULT_BLOCKSIZE = 512;
|
|
SD_DEFAULT_BLOCKSHIFT = 9;
|
SD_BUS_WIDTH_*
SD_BUS_WIDTH_1 = 0;
|
|
SD_BUS_WIDTH_4 = 2;
|
SD_BUS_SPEED_*
SD_BUS_SPEED_DEFAULT = 25000000;
|
|
SD_BUS_SPEED_HS = 50000000;
|
|
SD_BUS_SPEED_UHS_SDR12 = 25000000;
|
|
SD_BUS_SPEED_UHS_SDR25 = 50000000;
|
|
SD_BUS_SPEED_UHS_DDR50 = 50000000;
|
|
SD_BUS_SPEED_UHS_SDR50 = 100000000;
|
|
SD_BUS_SPEED_UHS_SDR104 = 208000000;
|
SD_CMD_*
From: /include/linux/mmc/sd.h | |
Class 0 | |
SD_CMD_SEND_RELATIVE_ADDR = 3;
|
|
SD_CMD_SEND_IF_COND = 8;
|
|
SD_CMD_SWITCH_VOLTAGE = 11;
|
|
Class 10 | |
SD_CMD_SWITCH = 6;
|
See: 4.3.10 Switch Function Command |
Class 5 | |
SD_CMD_ERASE_WR_BLK_START = 32;
|
|
SD_CMD_ERASE_WR_BLK_END = 33;
|
|
Application commands | |
SD_CMD_APP_SET_BUS_WIDTH = 6;
|
|
SD_CMD_APP_SD_STATUS = 13;
|
|
SD_CMD_APP_SEND_NUM_WR_BLKS = 22;
|
|
SD_CMD_APP_SEND_OP_COND = 41;
|
|
SD_CMD_APP_SEND_SCR = 51;
|
|
SD_CMD_SWITCH argument format: | |
[31] Check (0) or switch (1)
|
|
[30:24] Reserved (0)
|
|
[23:20] Function group 6
|
|
[19:16] Function group 5
|
|
[15:12] Function group 4
|
|
[11:8] Function group 3
|
|
[7:4] Function group 2
|
|
[3:0] Function group 1
|
SD_SWITCH_MODE_*
SD_SWITCH_MODE_CHECK = 0;
|
|
SD_SWITCH_MODE_SWITCH = 1;
|
SD_SWITCH_FUNCTION_GROUP_*
SD_SWITCH_FUNCTION_GROUP_ACCESS = 0;
|
Access Mode |
SD_SWITCH_FUNCTION_GROUP_COMMAND = 1;
|
Command System |
SD_SWITCH_FUNCTION_GROUP_DRIVER = 2;
|
Driver Strength |
SD_SWITCH_FUNCTION_GROUP_POWER = 3;
|
Power Limit |
SD_SWITCH_ACCESS_MODE_*
SD_SWITCH_ACCESS_MODE_DEF = 0;
|
Default SDR12 |
SD_SWITCH_ACCESS_MODE_HS = 1;
|
High Speed SDR25 |
SD_SWITCH_ACCESS_MODE_SDR50 = 2;
|
SDR50 (1.8V only) |
SD_SWITCH_ACCESS_MODE_SDR104 = 3;
|
SDR104 (1.8V only) |
SD_SWITCH_ACCESS_MODE_DDR50 = 4;
|
DDR50 (1.8V only) |
SD_SWITCH_COMMAND_SYSTEM_*
SD_SWITCH_COMMAND_SYSTEM_DEF = 0;
|
Default |
SD_SWITCH_COMMAND_SYSTEM_EC = 1;
|
For eC |
SD_SWITCH_COMMAND_SYSTEM_OTP = 3;
|
OTP |
SD_SWITCH_COMMAND_SYSTEM_ASSD = 4;
|
ASSD |
SD_SWITCH_DRIVER_STRENGTH_*
SD_SWITCH_DRIVER_STRENGTH_DEF = 0;
|
Default Type B |
SD_SWITCH_DRIVER_STRENGTH_TYPE_A = 1;
|
Type A |
SD_SWITCH_DRIVER_STRENGTH_TYPE_C = 2;
|
Type C |
SD_SWITCH_DRIVER_STRENGTH_TYPE_D = 3;
|
Type D |
SD_SWITCH_POWER_LIMIT_*
SD_SWITCH_POWER_LIMIT_DEF = 0;
|
Default 0.72W |
SD_SWITCH_POWER_LIMIT_144 = 1;
|
1.44W |
SD_SWITCH_POWER_LIMIT_216 = 2;
|
2.16W (Embedded only) |
SD_SWITCH_POWER_LIMIT_216 = 2;
|
2.16W (Embedded only) |
SD_SWITCH_POWER_LIMIT_288 = 3;
|
2.88W (Embedded only) |
SD_SWITCH_POWER_LIMIT_180 = 4;
|
1.80W |
SD_SEND_IF_COND_*
SD_SEND_IF_COND_CHECK_PATTERN = $AA;
|
|
SD_SEND_IF_COND_VOLTAGE_MASK = $00FF8000;
|
MMC_VDD_27_28, MMC_VDD_28_29, MMC_VDD_29_30, MMC_VDD_30_31, MMC_VDD_31_32, MMC_VDD_32_33, MMC_VDD_33_34, MMC_VDD_34_35, MMC_VDD_35_36 |
SD_CMD_SEND_IF_COND argument format: | |
[31:12] Reserved (0)
|
|
[11:8] Host Voltage Supply Flags
|
|
[7:0] Check Pattern (0xAA)
|
SD_SEND_OP_COND_*
SD_SEND_OP_COND_VOLTAGE_MASK = $00FF8000;
|
MMC_VDD_27_28, MMC_VDD_28_29, MMC_VDD_29_30, MMC_VDD_30_31, MMC_VDD_31_32, MMC_VDD_32_33, MMC_VDD_33_34, MMC_VDD_34_35, MMC_VDD_35_36 |
SD_OCR_*
See: Section 5.1 of SD Physical Layer Simplified Specification V4.10 | |
SD_OCR_CCS = $40000000;
|
Card Capacity Status - 0 = SDSC/1 = SDHC or SDXC |
SD_OCR_CCS = $40000000;
|
Card Capacity Status - 0 = SDSC/1 = SDHC or SDXC |
SD_OCR_UHS_II = $20000000;
|
UHS-II Card Status - 0 = Non UHS-II Card/1 = UHS-II Card |
SD_OCR_XPC = $10000000;
|
SDXC Power Control |
SD_OCR_S18A = $01000000;
|
1.8V Switching Accepted |
SD_CSD_STRUCT_*
SD_CSD_STRUCT_VER_1_0 = 0;
|
Standard Capacity |
SD_CSD_STRUCT_VER_2_0 = 1;
|
High Capacity and Extended Capacity |
SD_SSR_*
See: Section 4.10.2 of SD Physical Layer Simplified Specification Version 4.10 | |
SD SSR Fields | |
SD_SSR_DAT_BUS_WIDTH = 1;
|
|
SD_SSR_SECURED_MODE = 2;
|
|
SD_SSR_SD_CARD_TYPE = 3;
|
|
SD_SSR_SIZE_OF_PROTECTED_AREA = 4;
|
|
SD_SSR_SPEED_CLASS = 5;
|
|
SD_SSR_PERFORMANCE_MOVE = 6;
|
|
SD_SSR_AU_SIZE = 7;
|
|
SD_SSR_ERASE_SIZE = 8;
|
|
SD_SSR_ERASE_TIMEOUT = 9;
|
|
SD_SSR_ERASE_OFFSET = 10;
|
|
SD_SSR_UHS_SPEED_GRADE = 11;
|
|
SD_SSR_UHS_AU_SIZE = 12;
|
SD_SSR_BUS_WIDTH_*
SD_SSR_BUS_WIDTH_1 = 0;
|
1 (default) |
SD_SSR_BUS_WIDTH_4 = 2;
|
4 bit width |
SD_SSR_CARD_TYPE_*
SD_SSR_CARD_TYPE_RW = $0000;
|
Regular SD RD/WR Card |
SD_SSR_CARD_TYPE_ROM = $0001;
|
SD ROM Card |
SD_SSR_CARD_TYPE_OTP = $0002;
|
OTP |
SD_SSR_SPEED_CLASS_*
SD_SSR_SPEED_CLASS_0 = $00;
|
Class 0 |
SD_SSR_SPEED_CLASS_2 = $01;
|
Class 2 |
SD_SSR_SPEED_CLASS_4 = $02;
|
Class 4 |
SD_SSR_SPEED_CLASS_6 = $03;
|
Class 6 |
SD_SSR_SPEED_CLASS_10 = $04;
|
Class 10 |
SD_SSR_AU_SIZE_*
SD_SSR_AU_SIZE_VALUES:array[0..15] of LongWord = (
| |
0,
|
Not Defined |
$00004000,
|
16 KB |
$00008000,
|
32 KB |
$00010000,
|
64 KB |
$00020000,
|
128 KB |
$00040000,
|
256 KB |
$00080000,
|
512 KB |
$00100000,
|
1 MB |
$00200000,
|
2 MB |
$00400000,
|
4 MB |
$00800000,
|
8 MB |
$00800000 + $00400000,
|
12 MB |
$01000000,
|
16 MB |
$01000000 + $00800000,
|
24 MB |
$02000000,
|
32 MB |
$04000000);
|
64 MB |
SD_SSR_UHS_SPEED_*
SD_SSR_UHS_SPEED_GRADE_0 = 0;
|
Less than 10MB/sec |
SD_SSR_UHS_SPEED_GRADE_1 = 1;
|
10MB/sec and above |
SD_SSR_UHS_AU_SIZE_*
SD_SSR_UHS_AU_SIZE_VALUES:array[0..15] of LongWord = (
| |
0,
|
Not Defined |
0,
|
Not Used |
0,
|
Not Used |
0,
|
Not Used |
0,
|
Not Used |
0,
|
Not Used |
0,
|
Not Used |
$00100000,
|
1 MB |
$00200000,
|
2 MB |
$00400000,
|
4 MB |
$00800000,
|
8 MB |
$00800000 + $00400000,
|
12 MB |
$01000000,
|
16 MB |
$01000000 + $00800000,
|
24 MB |
$02000000,
|
32 MB |
$04000000);
|
64 MB |
SD_SWITCH_*
See: Section 4.3.10 of SD Physical Layer Simplified Specification Version 4.10 | |
SD Switch Fields | |
SD_SWITCH_MAXIMUM_CURRENT = 1;
|
|
SD_SWITCH_GROUP6_SUPPORT = 2;
|
|
SD_SWITCH_GROUP5_SUPPORT = 3;
|
|
SD_SWITCH_GROUP4_SUPPORT = 4;
|
|
SD_SWITCH_GROUP3_SUPPORT = 5;
|
|
SD_SWITCH_GROUP2_SUPPORT = 6;
|
|
SD_SWITCH_GROUP1_SUPPORT = 7;
|
|
SD_SWITCH_GROUP6_SELECTION = 8;
|
|
SD_SWITCH_GROUP5_SELECTION = 9;
|
|
SD_SWITCH_GROUP4_SELECTION = 10;
|
|
SD_SWITCH_GROUP3_SELECTION = 11;
|
|
SD_SWITCH_GROUP2_SELECTION = 12;
|
|
SD_SWITCH_GROUP1_SELECTION = 13;
|
|
SD_SWITCH_STRUCT_VERSION = 14;
|
|
SD_SWITCH_GROUP6_BUSY_STATUS = 15;
|
|
SD_SWITCH_GROUP5_BUSY_STATUS = 16;
|
|
SD_SWITCH_GROUP4_BUSY_STATUS = 17;
|
|
SD_SWITCH_GROUP3_BUSY_STATUS = 18;
|
|
SD_SWITCH_GROUP2_BUSY_STATUS = 19;
|
|
SD_SWITCH_GROUP1_BUSY_STATUS = 20;
|
|
SD Switch Access Mode (Bus Speed) Support (Group 1) | |
SD_SWITCH_GROUP1_SDR12 = (1 shl 0);
|
|
SD_SWITCH_GROUP1_HS = (1 shl 1);
|
|
SD_SWITCH_GROUP1_SDR25 = (1 shl 1);
|
|
SD_SWITCH_GROUP1_SDR50 = (1 shl 2);
|
|
SD_SWITCH_GROUP1_SDR104 = (1 shl 3);
|
|
SD_SWITCH_GROUP1_DDR50 = (1 shl 4);
|
|
SD Switch Driver Strength Support (Group 3) | |
SD_SWITCH_GROUP3_TYPE_B = (1 shl 0);
|
|
SD_SWITCH_GROUP3_TYPE_A = (1 shl 1);
|
|
SD_SWITCH_GROUP3_TYPE_C = (1 shl 2);
|
|
SD_SWITCH_GROUP3_TYPE_D = (1 shl 3);
|
|
SD Switch Structure Versions | |
SD_SWITCH_STRUCT_VER_0 = 0;
|
Bits 511:376 are defined (SD_SWITCH_MAXIMUM_CURRENT to SD_SWITCH_GROUP1_SELECTION) |
SD_SWITCH_STRUCT_VER_1 = 1;
|
Bits 511:272 are defined (SD_SWITCH_MAXIMUM_CURRENT to SD_SWITCH_GROUP1_BUSY_STATUS |
SD_SCR_*
See: Section 5.6 of SD Physical Layer Simplified Specification Version 4.10 | |
SD SCR Fields | |
SD_SCR_STRUCTURE = 1;
|
|
SD_SCR_SD_SPEC = 2;
|
|
SD_SCR_DATA_STAT_AFTER_ERASE = 3;
|
|
SD_SCR_SD_SECURITY = 4;
|
|
SD_SCR_SD_BUS_WIDTHS = 5;
|
|
SD_SCR_SD_SPEC3 = 6;
|
|
SD_SCR_EX_SECURITY = 7;
|
|
SD_SCR_SD_SPEC4 = 8;
|
|
SD_SCR_CMD_SUPPORT = 9;
|
SD_SCR_STRUCT_*
SD_SCR_STRUCT_VER_1_0 = 0;
|
Valid for system specification 1.01 - 4.0 |
SD_SCR_SPEC_VER_*
SD_SCR_SPEC_VER_0 = 0;
|
Implements system specification 1.0 - 1.01 |
SD_SCR_SPEC_VER_1 = 1;
|
Implements system specification 1.10 |
SD_SCR_SPEC_VER_2 = 2;
|
Implements system specification 2.00-4.0X |
SD_SCR_SECURITY_*
SD_SCR_SECURITY_VER_0 = 0;
|
No Security |
SD_SCR_SECURITY_VER_2 = 2;
|
SDSC Card (Security Version 1.01) |
SD_SCR_SECURITY_VER_3 = 3;
|
SDHC Card (Security Version 2.00) |
SD_SCR_SECURITY_VER_4 = 4;
|
SDXC Card (Security Version 3.xx) |
SD_SCR_BUS_WIDTH_*
SD_SCR_BUS_WIDTH_1 = (1 shl 0);
|
1 bit (DAT0) |
SD_SCR_BUS_WIDTH_4 = (1 shl 2); {4 bit (DAT0-3)}
|
4 bit (DAT0-3) |
SD_SCR_EX_SECURITY_*
SD_SCR_EX_SECURITY_VER_0 = 0;
|
Extended Security is not supported |
SD_SCR_*_SUPPORT
SD_SCR_CMD20_SUPPORT = (1 shl 0);
|
Mandatory for SDXC card |
SD_SCR_CMD23_SUPPORT = (1 shl 1);
|
Mandatory for UHS104 card |
SD_SCR_CMD48_49_SUPPORT = (1 shl 2);
|
Optional |
SD_SCR_CMD58_59_SUPPORT = (1 shl 3);
|
Optional (If CMD58/59 is supported, CMD48/49 shall be supported) |
SDIO_STATE_*
SDIO_STATE_DETACHED = 0;
|
|
SDIO_STATE_DETACHING = 1;
|
|
SDIO_STATE_ATTACHING = 2;
|
|
SDIO_STATE_ATTACHED = 3;
|
|
SDIO_STATE_MAX = 3;
|
|
SDIO_STATE_NAMES:array[SDIO_STATE_DETACHED..SDIO_STATE_MAX] of String = ('SDIO_STATE_DETACHED', 'SDIO_STATE_DETACHING', 'SDIO_STATE_ATTACHING', 'SDIO_STATE_ATTACHED');
|
SDIO_STATUS_*
SDIO_STATUS_UNBOUND = 0;
|
|
SDIO_STATUS_BOUND = 1;
|
|
SDIO_STATUS_MAX = 1;
|
|
SDIO_STATUS_NAMES:array[SDIO_STATUS_UNBOUND..SDIO_STATUS_MAX] of String = ('SDIO_STATUS_UNBOUND', 'SDIO_STATUS_BOUND');
|
SDIO_CMD_*
From: /include/linux/mmc/sdio.h | |
SDIO_CMD_SEND_OP_COND = 5;
|
|
SDIO_CMD_RW_DIRECT = 52;
|
|
SDIO_CMD_RW_EXTENDED = 53;
|
|
SDIO_CMD_RW_DIRECT argument format: | |
[31] R/W flag
|
|
[30:28] Function number
|
|
[27] RAW flag
|
|
[25:9] Register address
|
|
[7:0] Data
|
|
SDIO_CMD_RW_EXTENDED argument format: | |
[31] R/W flag
|
|
[30:28] Function number
|
|
[27] Block mode
|
|
[26] Increment address
|
|
[25:9] Register address
|
|
[8:0] Byte/block count
|
SDIO_RSP_*
From: /include/linux/mmc/sdio.h | |
R4 | |
SDIO_RSP_R4_18V_PRESENT = (1 shl 24);
|
|
SDIO_RSP_R4_MEMORY_PRESENT = (1 shl 27);
|
|
R5 | |
SDIO_RSP_R5_COM_CRC_ERROR = (1 shl 15);
|
|
SDIO_RSP_R5_ILLEGAL_COMMAND = (1 shl 14);
|
|
SDIO_RSP_R5_ERROR = (1 shl 11);
|
|
SDIO_RSP_R5_FUNCTION_NUMBER = (1 shl 9);
|
|
SDIO_RSP_R5_OUT_OF_RANGE = (1 shl 8);
|
SDIO_CCCR_*
SDIO_CCCR_CCCR = $00;
|
|
SDIO_CCCR_SD = $01;
|
|
SDIO_CCCR_IOEx = $02;
|
|
SDIO_CCCR_IORx = $03;
|
|
SDIO_CCCR_IENx = $04;
|
Function/Master Interrupt Enable |
SDIO_CCCR_INTx = $05;
|
Function Interrupt Pending |
SDIO_CCCR_ABORT = $06;
|
function abort/card reset |
SDIO_CCCR_IF = $07;
|
bus interface controls |
SDIO_CCCR_CAPS = $08;
|
|
SDIO_CCCR_CIS = $09;
|
common CIS pointer (3 bytes) |
Following 4 regs are valid only if SBS is set | |
SDIO_CCCR_SUSPEND = $0c;
|
|
SDIO_CCCR_SELx = $0d;
|
|
SDIO_CCCR_EXECx = $0e;
|
|
SDIO_CCCR_READYx = $0f;
|
|
SDIO_CCCR_BLKSIZE = $10;
|
|
SDIO_CCCR_POWER = $12;
|
|
SDIO_CCCR_SPEED = $13;
|
|
SDIO_CCCR_UHS = $14;
|
|
SDIO_CCCR_DRIVE_STRENGTH = $15;
|
SDIO_*_REV_*
SDIO CCCR Register values | |
SDIO_CCCR_REV_1_00 = 0;
|
CCCR/FBR Version 1.00 |
SDIO_CCCR_REV_1_10 = 1;
|
CCCR/FBR Version 1.10 |
SDIO_CCCR_REV_1_20 = 2;
|
CCCR/FBR Version 1.20 |
SDIO_CCCR_REV_3_00 = 3;
|
CCCR/FBR Version 3.00 |
SDIO_SDIO_REV_1_00 = 0;
|
SDIO Spec Version 1.00 |
SDIO_SDIO_REV_1_10 = 1;
|
SDIO Spec Version 1.10 |
SDIO_SDIO_REV_1_20 = 2;
|
SDIO Spec Version 1.20 |
SDIO_SDIO_REV_2_00 = 3;
|
SDIO Spec Version 2.00 |
SDIO_SDIO_REV_3_00 = 4;
|
SDIO Spec Version 3.00 |
SDIO CCCR SD Register values | |
SDIO_SD_REV_1_01 = 0;
|
SD Physical Spec Version 1.01 |
SDIO_SD_REV_1_10 = 1;
|
SD Physical Spec Version 1.10 |
SDIO_SD_REV_2_00 = 2;
|
SD Physical Spec Version 2.00 |
SDIO_SD_REV_3_00 = 3;
|
SD Physical Spev Version 3.00 |
SDIO_BUS_*
SDIO CCCR IF Register values | |
SDIO_BUS_WIDTH_MASK = $03;
|
data bus width setting |
SDIO_BUS_WIDTH_1BIT = $00;
|
|
SDIO_BUS_WIDTH_RESERVED = $01;
|
|
SDIO_BUS_WIDTH_4BIT = $02;
|
|
SDIO_BUS_ECSI = $20;
|
Enable continuous SPI interrupt |
SDIO_BUS_SCSI = $40;
|
Support continuous SPI interrupt |
SDIO_BUS_ASYNC_INT = $20;
|
|
SDIO_BUS_CD_DISABLE = $80;
|
disable pull-up on DAT3 (pin 1) |
SDIO_CCCR_CAP_*
SDIO_CCCR_CAP_SDC = $01;
|
can do CMD52 while data transfer |
SDIO_CCCR_CAP_SMB = $02;
|
can do multi-block xfers (CMD53) |
SDIO_CCCR_CAP_SRW = $04;
|
supports read-wait protocol |
SDIO_CCCR_CAP_SBS = $08;
|
supports suspend/resume |
SDIO_CCCR_CAP_S4MI = $10;
|
interrupt during 4-bit CMD53 |
SDIO_CCCR_CAP_E4MI = $20;
|
enable ints during 4-bit CMD53 |
SDIO_CCCR_CAP_LSC = $40;
|
low speed card |
SDIO_CCCR_CAP_4BLS = $80;
|
4 bit low speed card |
SDIO_POWER_*
SDIO_POWER_SMPC = $01;
|
Supports Master Power Control |
SDIO_POWER_EMPC = $02;
|
Enable Master Power Control |
SDIO_SPEED_*
SDIO_SPEED_SHS = $01;
|
Supports High-Speed mode |
SDIO_SPEED_BSS_SHIFT = 1;
|
|
SDIO_SPEED_BSS_MASK = (7 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR12 = (0 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR25 = (1 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR50 = (2 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR104 = (3 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_DDR50 = (4 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_EHS = SDIO_SPEED_SDR25;
|
Enable High-Speed |
SDIO_UHS_*
SDIO_UHS_SDR50 = $01;
|
|
SDIO_UHS_SDR104 = $02;
|
|
SDIO_UHS_DDR50 = $04;
|
SDIO_DRIVE_*
SDIO_SDTx_MASK = $07;
|
|
SDIO_DRIVE_SDTA = (1 shl 0);
|
|
SDIO_DRIVE_SDTC = (1 shl 1);
|
|
SDIO_DRIVE_SDTD = (1 shl 2);
|
|
SDIO_DRIVE_DTSx_MASK = $03;
|
|
SDIO_DRIVE_DTSx_SHIFT = 4;
|
|
SDIO_DTSx_SET_TYPE_B = (0 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
SDIO_DTSx_SET_TYPE_A = (1 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
SDIO_DTSx_SET_TYPE_C = (2 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
SDIO_DTSx_SET_TYPE_D = (3 shl SDIO_DRIVE_DTSx_SHIFT);
|
SDIO_FBR_*
SDIO_FBR_BASE(f) ((f) * $100)
|
base of function f's FBRs |
SDIO_FBR_STD_IF = $00;
|
|
SDIO_FBR_STD_IF_EXT = $01;
|
|
SDIO_FBR_POWER = $02;
|
|
SDIO_FBR_CIS = $09;
|
CIS pointer (3 bytes) |
SDIO_FBR_CSA = $0C;
|
CSA pointer (3 bytes) |
SDIO_FBR_BLKSIZE = $10;
|
block size (2 bytes) |
SDIO FBR IF Register values | |
SDIO_FBR_SUPPORTS_CSA = $40;
|
supports Code Storage Area |
SDIO_FBR_ENABLE_CSA = $80;
|
enable Code Storage Area |
SDIO FBR POWER Register values | |
SDIO_FBR_POWER_SPS = $01;
|
Supports Power Selection |
SDIO_FBR_POWER_EPS = $02;
|
Enable (low) Power Selection |
SDHCI_*
SDHCI_NAME_PREFIX = 'SDHCI';
|
Name prefix for SDHCI Devices |
SDHCI_TYPE_*
SDHCI_TYPE_NONE = 0;
|
|
SDHCI_TYPE_MMC = 1;
|
An MMC specification host controller |
SDHCI_TYPE_SD = 2;
|
An SD specification host controller |
SDHCI_TYPE_MMCI = 3;
|
An MMCI specification host controller |
SDHCI_TYPE_MAX = 3;
|
|
SDHCI Type Names | |
SDHCI_TYPE_NAMES:array[SDHCI_TYPE_NONE..SDHCI_TYPE_MAX] of String = (
| |
'SDHCI_TYPE_NONE',
|
|
'SDHCI_TYPE_MMC',
|
|
'SDHCI_TYPE_SD',
|
|
'SDHCI_TYPE_MMCI');
|
SDHCI_STATE_*
SDHCI_STATE_DISABLED = 0;
|
|
SDHCI_STATE_ENABLED = 1;
|
|
SDHCI_STATE_MAX = 1;
|
|
SDHCI State Names | |
SDHCI_STATE_NAMES:array[SDHCI_STATE_DISABLED..SDHCI_STATE_MAX] of String = (
| |
'SDHCI_STATE_DISABLED',
|
|
'SDHCI_STATE_ENABLED');
|
SDHCI_FLAG_*
SDHCI_FLAG_NONE = $00000000;
|
|
SDHCI_FLAG_SDMA = $00000001;
|
Host Controller supports SDMA specification |
SDHCI_FLAG_ADMA = $00000002;
|
Host Controller supports ADMA specification |
SDHCI_FLAG_SPI = $00000004;
|
Host Controller uses SPI interface |
SDHCI_FLAG_CRC_ENABLE = $00000008;
|
|
SDHCI_FLAG_NON_STANDARD = $00000010;
|
Host Controller uses a non standard interface (not supporting SDHCI register layout) |
SDHCI_FLAG_AUTO_CMD12 = $00000020;
|
Host Controller supports Auto CMD12 (Stop Transmission) |
SDHCI_FLAG_AUTO_CMD23 = $00000040;
|
Host Controller supports Auto CMD23 (Set Block Count) |
SDHCI_FLAG_64_BIT_DMA = $00000080;
|
Host Controller supports 64-bit ADMA |
SDHCI_FLAG_EXTERNAL_DMA = $00000100;
|
Host Controller requires external DMA engine to perform transfers |
SDHCI_DMA_*, SDHCI_BLOCK_*
SDHCI_DMA_ADDRESS = $00;
|
|
SDHCI_BLOCK_SIZE = $04;
|
|
SDHCI_BLOCK_COUNT = $06;
|
|
SDHCI_ARGUMENT = $08;
|
|
SDHCI_TRANSFER_MODE = $0C;
|
|
SDHCI_COMMAND = $0E;
|
|
SDHCI_RESPONSE = $10;
|
|
SDHCI_BUFFER = $20;
|
|
SDHCI_PRESENT_STATE = $24;
|
|
SDHCI_HOST_CONTROL = $28;
|
|
SDHCI_POWER_CONTROL = $29;
|
|
SDHCI_BLOCK_GAP_CONTROL = $2A;
|
|
SDHCI_WAKE_UP_CONTROL = $2B;
|
|
SDHCI_CLOCK_CONTROL = $2C;
|
|
SDHCI_TIMEOUT_CONTROL = $2E;
|
|
SDHCI_SOFTWARE_RESET = $2F;
|
|
SDHCI_INT_STATUS = $30;
|
|
SDHCI_INT_ENABLE = $34;
|
|
SDHCI_SIGNAL_ENABLE = $38;
|
|
SDHCI_ACMD12_ERR = $3C;
|
|
3E-3F reserved | |
SDHCI_CAPABILITIES = $40;
|
|
SDHCI_CAPABILITIES_1 = $44;
|
|
SDHCI_MAX_CURRENT = $48;
|
|
4C-4F reserved for more max current | |
SDHCI_SET_ACMD12_ERROR = $50;
|
|
SDHCI_SET_INT_ERROR = $52;
|
|
SDHCI_ADMA_ERROR = $54;
|
|
55-57 reserved | |
SDHCI_ADMA_ADDRESS = $58;
|
|
60-FB reserved | |
SDHCI_SLOT_INT_STATUS = $FC;
|
|
SDHCI_HOST_VERSION = $FE;
|
SDHCI_TRNS_*
SDHCI_TRNS_DMA = $01;
|
|
SDHCI_TRNS_BLK_CNT_EN = $02;
|
|
SDHCI_TRNS_AUTO_CMD12 = $04;
|
SDHCI_TRNS_ACMD12 |
SDHCI_TRNS_AUTO_CMD23 = $08;
|
|
SDHCI_TRNS_READ = $10;
|
|
SDHCI_TRNS_MULTI = $20;
|
SDHCI_CMD_*
SDHCI_CMD_RESP_MASK = $03;
|
|
SDHCI_CMD_CRC = $08;
|
|
SDHCI_CMD_INDEX = $10;
|
|
SDHCI_CMD_DATA = $20;
|
|
SDHCI_CMD_ABORTCMD = $C0;
|
SDHCI_CMD_RESP_*
SDHCI_CMD_RESP_NONE = $00;
|
|
SDHCI_CMD_RESP_LONG = $01;
|
|
SDHCI_CMD_RESP_SHORT = $02;
|
|
SDHCI_CMD_RESP_SHORT_BUSY = $03;
|
SDHCI_DATA_*, SDHCI_CARD_*
SDHCI_CMD_INHIBIT = $00000001;
|
|
SDHCI_DATA_INHIBIT = $00000002;
|
|
SDHCI_DOING_WRITE = $00000100;
|
|
SDHCI_DOING_READ = $00000200;
|
|
SDHCI_SPACE_AVAILABLE = $00000400;
|
|
SDHCI_DATA_AVAILABLE = $00000800;
|
|
SDHCI_CARD_PRESENT = $00010000;
|
|
SDHCI_CARD_STATE_STABLE = $00020000;
|
|
SDHCI_CARD_DETECT_PIN_LEVEL = $00040000;
|
|
SDHCI_WRITE_PROTECT = $00080000;
|
Set if Write Enabled/Clear if Write Protected |
SDHCI_CTRL_*
SDHCI_CTRL_LED = $01;
|
|
SDHCI_CTRL_4BITBUS = $02;
|
|
SDHCI_CTRL_HISPD = $04;
|
|
SDHCI_CTRL_DMA_MASK = $18;
|
|
SDHCI_CTRL_SDMA = $00;
|
|
SDHCI_CTRL_ADMA1 = $08;
|
|
SDHCI_CTRL_ADMA32 = $10;
|
|
SDHCI_CTRL_ADMA64 = $18;
|
|
SDHCI_CTRL_8BITBUS = $20;
|
|
SDHCI_CTRL_CD_TEST_INS = $40;
|
|
SDHCI_CTRL_CD_TEST = $80;
|
SDHCI_POWER_*
SDHCI_POWER_ON = $01;
|
|
SDHCI_POWER_180 = $0A;
|
|
SDHCI_POWER_300 = $0C;
|
|
SDHCI_POWER_330 = $0E;
|
SDHCI_WAKE_*
SDHCI_WAKE_ON_INT = $01;
|
|
SDHCI_WAKE_ON_INSERT = $02;
|
|
SDHCI_WAKE_ON_REMOVE = $04;
|
SDHCI_CLOCK_*
SDHCI_DIVIDER_SHIFT = 8;
|
|
SDHCI_DIVIDER_HI_SHIFT = 6;
|
|
SDHCI_DIV_MASK = $FF;
|
|
SDHCI_DIV_MASK_LEN = 8;
|
|
SDHCI_DIV_HI_MASK = $0300;
|
|
SDHCI_CLOCK_CARD_EN = $0004;
|
|
SDHCI_CLOCK_INT_STABLE = $0002;
|
|
SDHCI_CLOCK_INT_EN = $0001;
|
SDHCI_RESET_*
SDHCI_RESET_ALL = $01;
|
|
SDHCI_RESET_CMD = $02;
|
|
SDHCI_RESET_DATA = $04;
|
SDHCI_INT_*
SDHCI_INT_RESPONSE = $00000001;
|
|
SDHCI_INT_DATA_END = $00000002;
|
|
SDHCI_INT_BLK_GAP = $00000004;
|
|
SDHCI_INT_DMA_END = $00000008;
|
|
SDHCI_INT_SPACE_AVAIL = $00000010;
|
|
SDHCI_INT_DATA_AVAIL = $00000020;
|
|
SDHCI_INT_CARD_INSERT = $00000040;
|
|
SDHCI_INT_CARD_REMOVE = $00000080;
|
|
SDHCI_INT_CARD_INT = $00000100;
|
|
SDHCI_INT_ERROR = $00008000;
|
|
SDHCI_INT_TIMEOUT = $00010000;
|
|
SDHCI_INT_CRC = $00020000;
|
|
SDHCI_INT_END_BIT = $00040000;
|
|
SDHCI_INT_INDEX = $00080000;
|
|
SDHCI_INT_DATA_TIMEOUT = $00100000;
|
|
SDHCI_INT_DATA_CRC = $00200000;
|
|
SDHCI_INT_DATA_END_BIT = $00400000;
|
|
SDHCI_INT_BUS_POWER = $00800000;
|
|
SDHCI_INT_ACMD12ERR = $01000000;
|
|
SDHCI_INT_ADMA_ERROR = $02000000;
|
|
SDHCI_INT_NORMAL_MASK = $00007FFF;
|
|
SDHCI_INT_ERROR_MASK = $FFFF8000;
|
|
SDHCI_INT_CMD_MASK = (SDHCI_INT_RESPONSE or SDHCI_INT_TIMEOUT or SDHCI_INT_CRC or SDHCI_INT_END_BIT or SDHCI_INT_INDEX);
| |
SDHCI_INT_DATA_MASK = (SDHCI_INT_DATA_END or SDHCI_INT_DMA_END or SDHCI_INT_DATA_AVAIL or SDHCI_INT_SPACE_AVAIL or SDHCI_INT_DATA_TIMEOUT or SDHCI_INT_DATA_CRC or SDHCI_INT_DATA_END_BIT or SDHCI_INT_ADMA_ERROR or SDHCI_INT_BLK_GAP);
| |
SDHCI_INT_ALL_MASK = (LongWord(-1));
|
SDHCI_*_MASK*, SDHCI_*SHIFT
SDHCI_TIMEOUT_CLK_MASK = $0000003F;
|
|
SDHCI_TIMEOUT_CLK_SHIFT = 0;
|
|
SDHCI_TIMEOUT_CLK_UNIT = $00000080;
|
|
SDHCI_CLOCK_BASE_MASK = $00003F00;
|
|
SDHCI_CLOCK_V3_BASE_MASK = $0000FF00;
|
|
SDHCI_CLOCK_BASE_SHIFT = 8;
|
|
SDHCI_CLOCK_BASE_MULTIPLIER = 1000000;
|
|
SDHCI_MAX_BLOCK_MASK = $00030000;
|
|
SDHCI_MAX_BLOCK_SHIFT = 16;
|
|
SDHCI_CAN_DO_8BIT = $00040000;
|
|
SDHCI_CAN_DO_ADMA2 = $00080000;
|
|
SDHCI_CAN_DO_ADMA1 = $00100000;
|
|
SDHCI_CAN_DO_HISPD = $00200000;
|
|
SDHCI_CAN_DO_SDMA = $00400000;
|
|
SDHCI_CAN_VDD_330 = $01000000;
|
|
SDHCI_CAN_VDD_300 = $02000000;
|
|
SDHCI_CAN_VDD_180 = $04000000;
|
|
SDHCI_CAN_64BIT_V4 = $08000000;
|
|
SDHCI_CAN_64BIT = $10000000;
|
SDHCI_*_VER_*
SDHCI_VENDOR_VER_MASK = $FF00;
|
|
SDHCI_VENDOR_VER_SHIFT = 8;
|
|
SDHCI_SPEC_VER_MASK = $00FF;
|
|
SDHCI_SPEC_VER_SHIFT = 0;
|
|
SDHCI_SPEC_100 = 0;
|
|
SDHCI_SPEC_200 = 1;
|
|
SDHCI_SPEC_300 = 2;
|
|
SDHCI_SPEC_400 = 3;
|
|
SDHCI_SPEC_410 = 4;
|
|
SDHCI_SPEC_420 = 5;
|
SDHCI_MAX_CLOCK_DIV_*
SDHCI_MAX_CLOCK_DIV_SPEC_200 = 256;
|
|
SDHCI_MAX_CLOCK_DIV_SPEC_300 = 2046;
|
SDHCI_QUIRK*
From Linux /include/linux/mmc/sdhci.h | |
SDHCI_QUIRK_CLOCK_BEFORE_RESET = (1 shl 0);
|
Controller doesn't honor resets unless we touch the clock register |
SDHCI_QUIRK_FORCE_DMA = (1 shl 1);
|
Controller has bad caps bits, but really supports DMA |
SDHCI_QUIRK_NO_CARD_NO_RESET = (1 shl 2);
|
Controller doesn't like to be reset when there is no card inserted |
SDHCI_QUIRK_SINGLE_POWER_WRITE = (1 shl 3);
|
Controller doesn't like clearing the power reg before a change |
SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS = (1 shl 4);
|
Controller has flaky internal state so reset it on each ios change |
SDHCI_QUIRK_BROKEN_DMA = (1 shl 5);
|
Controller has an unusable DMA engine |
SDHCI_QUIRK_BROKEN_ADMA = (1 shl 6);
|
Controller has an unusable ADMA engine |
SDHCI_QUIRK_32BIT_DMA_ADDR = (1 shl 7);
|
Controller can only DMA from 32-bit aligned addresses |
SDHCI_QUIRK_32BIT_DMA_SIZE = (1 shl 8);
|
Controller can only DMA chunk sizes that are a multiple of 32 bits |
SDHCI_QUIRK_32BIT_ADMA_SIZE = (1 shl 9);
|
Controller can only ADMA chunks that are a multiple of 32 bits |
SDHCI_QUIRK_RESET_AFTER_REQUEST = (1 shl 10);
|
Controller needs to be reset after each request to stay stable |
SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER = (1 shl 11);
|
Controller needs voltage and power writes to happen separately |
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL = (1 shl 12);
|
Controller provides an incorrect timeout value for transfers |
SDHCI_QUIRK_BROKEN_SMALL_PIO = (1 shl 13);
|
Controller has an issue with buffer bits for small transfers |
SDHCI_QUIRK_NO_BUSY_IRQ = (1 shl 14);
|
Controller does not provide transfer-complete interrupt when not busy |
SDHCI_QUIRK_BROKEN_CARD_DETECTION = (1 shl 15);
|
Controller has unreliable card detection |
SDHCI_QUIRK_INVERTED_WRITE_PROTECT = (1 shl 16);
|
Controller reports inverted write-protect state |
SDHCI_QUIRK_PIO_NEEDS_DELAY = (1 shl 18);
|
Controller does not like fast PIO transfers |
SDHCI_QUIRK_FORCE_BLK_SZ_2048 = (1 shl 20);
|
Controller has to be forced to use block size of 2048 bytes |
SDHCI_QUIRK_NO_MULTIBLOCK = (1 shl 21);
|
Controller cannot do multi-block transfers |
SDHCI_QUIRK_FORCE_1_BIT_DATA = (1 shl 22);
|
Controller can only handle 1-bit data transfers |
SDHCI_QUIRK_DELAY_AFTER_POWER = (1 shl 23);
|
Controller needs 10ms delay between applying power and clock |
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK = (1 shl 24);
|
Controller uses SDCLK instead of TMCLK for data timeouts |
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN = (1 shl 25);
|
Controller reports wrong base clock capability |
SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC = (1 shl 26);
|
Controller cannot support End Attribute in NOP ADMA descriptor |
SDHCI_QUIRK_MISSING_CAPS = (1 shl 27);
|
Controller is missing device caps. Use caps provided by host |
SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 = (1 shl 28);
|
Controller uses Auto CMD12 command to stop the transfer |
SDHCI_QUIRK_NO_HISPD_BIT = (1 shl 29);
|
Controller doesn't have HISPD bit field in HI-SPEED SD card |
SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC = (1 shl 30);
|
Controller treats ADMA descriptors with length 0000h incorrectly |
SDHCI_QUIRK_UNSTABLE_RO_DETECT = (1 shl 31);
|
The read-only detection via SDHCI_PRESENT_STATE register is unstable |
SDHCI_QUIRK2_HOST_OFF_CARD_ON = (1 shl 0);
|
|
SDHCI_QUIRK2_HOST_NO_CMD23 = (1 shl 1);
|
|
SDHCI_QUIRK2_NO_1_8_V = (1 shl 2);
|
The system physically doesn't support 1.8v, even if the host does |
SDHCI_QUIRK2_PRESET_VALUE_BROKEN = (1 shl 3);
|
|
SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON = (1 shl 4);
|
|
SDHCI_QUIRK2_BROKEN_HOST_CONTROL = (1 shl 5);
|
Controller has a non-standard host control register |
SDHCI_QUIRK2_BROKEN_HS200 = (1 shl 6);
|
Controller does not support HS200 |
SDHCI_QUIRK2_BROKEN_DDR50 = (1 shl 7);
|
Controller does not support DDR50 |
SDHCI_QUIRK2_STOP_WITH_TC = (1 shl 8);
|
Stop command(CMD12) can set Transfer Complete when not using MMC_RSP_BUSY |
SDHCI_QUIRK2_BROKEN_64_BIT_DMA = (1 shl 9);
|
Controller does not support 64-bit DMA |
SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD = (1 shl 10);
|
Need clear transfer mode register before send cmd |
SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 = (1 shl 11);
|
Capability register bit-63 indicates HS400 support |
SDHCI_QUIRK2_TUNING_WORK_AROUND = (1 shl 12);
|
Forced tuned clock |
SDHCI_QUIRK2_SUPPORT_SINGLE = (1 shl 13);
|
Disable the block count for single block transactions |
SDHCI_QUIRK2_ACMD23_BROKEN = (1 shl 14);
|
Controller broken with using ACMD23 |
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN = (1 shl 15);
|
Broken Clock divider zero in controller |
SDHCI_QUIRK2_RSP_136_HAS_CRC = (1 shl 16);
|
Controller has CRC in 136 bit Command Response |
SDHCI_QUIRK2_DISABLE_HW_TIMEOUT = (1 shl 17);
|
Disable HW timeout if the requested timeout is more than the maximum obtainable timeout |
SDHCI_QUIRK2_USE_32BIT_BLK_CNT = (1 shl 18);
|
32-bit block count may not support eMMC where upper bits of CMD23 are used for other purposes. Support 16-bit block count by default otherwise, SDHCI_QUIRK2_USE_32BIT_BLK_CNT can be selected to use 32-bit block count |
SDHCI_DEFAULT_BOUNDARY_*
Valid values from 4K to 512K in powers of 2 | |
SDHCI_DEFAULT_BOUNDARY_SIZE = (512 * 1024);
|
|
SDHCI_DEFAULT_BOUNDARY_ARG = (7);
|
SDHCI_TIMEOUT_VALUE*
SDHCI_TIMEOUT_VALUE = $0E;
|
Type definitions
MMC command
PMMCCommand = ^TMMCCommand;
TMMCCommand = record
Command Properties | |
Command:Word;
|
|
Argument:LongWord;
|
|
ResponseType:LongWord;
|
|
Response:array[0..3] of LongWord;
|
|
Status:LongWord;
|
|
Data:PMMCData;
|
|
Host Properties | |
DataCompleted:Boolean;
|
|
BusyCompleted:Boolean;
|
|
TuningCompleted:Boolean;
|
|
CommandCompleted:Boolean;
|
MMC data
PMMCData = ^TMMCData;
TMMCData = record
Data Properties | |
Data:Pointer;
|
|
Flags:LongWord;
|
|
BlockSize:LongWord;
|
|
BlockCount:LongWord;
|
|
Host Properties | |
BlockOffset:LongWord;
|
|
BlocksRemaining:LongWord;
|
|
BytesRemaining:LongWord;
|
|
BytesTransfered:LongWord;
|
MMC card identification data (CID)
PMMCCardIdentificationData = ^TMMCCardIdentificationData;
TMMCCardIdentificationData = record
Note: See: Section 5.2 of SD Physical Layer Simplified Specification Version 4.10 | |
ManufacturerId:Byte;
|
|
OEMId:Word;
|
|
ProductName:array[0..7] of Char;
|
Max 0 to 6, 1 extra for null terminator |
ProductRevision:Byte;
|
|
HardwareRevision:Byte;
|
|
FirmwareRevision:Byte;
|
|
ProductSerialNumber:LongWord;
|
|
ManufacturingMonth:Byte;
|
|
ManufacturingYear:Word;
|
|
CRC:Byte;
|
CRC7 checksum |
MMC card specific erase data (CSD)
TMMCCardSpecificSDEraseData = record
Note: See: Section 5.3 of SD Physical Layer Simplified Specification Version 4.10 (Defined here for CSD) | |
EraseBlockEnable:Boolean;
|
Erase single block enable |
SectorSize:Byte;
|
Erase sector size |
MMC card specific MMC22 erase data
TMMCCardSpecificMMC22EraseData = record
SectorSize:Byte;
|
Erase sector size |
EraseGroupSize:Byte;
|
Erase group size |
MMC card specific MMC31 erase data
TMMCCardSpecificMMC31EraseData = record
EraseGroupSize:Byte;
|
Erase group size |
EraseGroupMultiplier:Byte;
|
Erase group size multiplier |
MMC card specific erase data
TMMCCardSpecificEraseData = record
case Integer of
|
|
0:(MMC22:TMMCCardSpecificMMC22EraseData);
|
|
1:(MMC31:TMMCCardSpecificMMC31EraseData);
|
|
2:(SD:TMMCCardSpecificSDEraseData);
|
MMC card specific data
PMMCCardSpecificData = ^TMMCCardSpecificData;
TMMCCardSpecificData = record
Card Values | |
CSDStructure:Byte;
|
CSD structure version |
SpecVersion:Byte;
|
System specification version (MMC/eMMC Only) |
TAAC:Byte;
|
Data read access-time-1 |
NSAC:Byte;
|
Data read access-time-2 in CLK cycles (NSAC*100) |
TransferSpeed:Byte;
|
Max. data transfer rate |
CCC:Word;
|
Card command classes |
ReadBlockLength:Byte;
|
Max. read data block length |
ReadBlockPartial:Boolean;
|
Partial blocks for read allowed |
WriteBlockMisalign:Boolean;
|
Write block misalignment |
ReadBlockMisalign:Boolean;
|
Read block misalignment |
DSRImplemented:Boolean;
|
DSR implemented |
DeviceSize:Word;
|
Device size |
VDDReadCurrentMin:Byte;
|
Max. read current @VDD min |
VDDReadCurrentMax:Byte;
|
Max. read current @VDD max |
VDDWriteCurrentMin:Byte;
|
Max. write current @VDD min |
VDDWriteCurrentMax:Byte;
|
Max. write current @VDD max |
DeviceSizeMultiplier:Byte;
|
Device size multiplier |
Erase:TMMCCardSpecificEraseData;
|
Erase group details |
WriteProtectGroupSize:Byte;
|
Write protect group size |
WriteProtectGroupEnable:Boolean;
|
Write protect group enable |
DefaultECC:Byte;
|
Manufacturer default ECC (MMC/eMMC Only) |
ReadToWriteFactor:Byte;
|
Write speed factor |
WriteBlockLength:Byte;
|
Max. write data block length |
WriteBlockPartial:Boolean;
|
Partial blocks for write allowed |
ContentProtectApplication:Boolean;
|
Content protection application (MMC/eMMC Only) |
FileFormatGroup:Byte;
|
File format group |
CopyFlag:Boolean;
|
Copy flag |
PermanentWriteProtect:Boolean;
|
Permanent write protection |
TemporaryWriteProtect:Boolean;
|
Temporary write protection |
FileFormat:Byte;
|
File format |
ECC:Byte;
|
ECC code (MMC/eMMC Only) |
CRC:Byte;
|
CRC |
Calculated Values | |
DataAccessTime:LongWord;
|
In Nanoseconds |
DataAccessClocks:Word;
|
In Clock cycles |
DataTransferRate:LongWord;
|
In Hz |
EraseSize:LongWord;
|
In Sectors |
BlockSize:LongWord;
|
"Normalized" Block Size |
BlockCount:LongWord;
|
In "Normalized" Blocks |
BlockShift:LongWord;
|
"Normalized" Block Shift |
MMC extended card specific data
PMMCExtendedCardSpecificData = ^TMMCExtendedCardSpecificData;
TMMCExtendedCardSpecificData = record
Card Values | |
Revision:Byte;
|
Extended CSD revision (192) |
PartitionSupport:Byte;
|
Partitioning Support (160) |
EraseGroupDef:Byte;
|
High-density erase group definition (175) |
PartConfig:Byte;
|
Partition configuration (179) |
StrobeSupport:Byte;
|
Strobe Support (184) |
CSDStructure:Byte;
|
CSD STRUCTURE (194) |
CardType:Byte;
|
Device type (196) |
DriverStrength:Byte;
|
I/O Driver Strength (197) |
SectorCount:array[0..3] of Byte;
|
Sector Count (212 - 4 bytes) |
SATimeout:Byte;
|
Sleep/awake timeout (217) |
HCEraseGapSize:Byte;
|
High-capacity write protect group size (221) |
ReliableSectors:Byte;
|
Reliable write sector count (222) |
EraseTimeoutMult:Byte;
|
High-capacity erase timeout (223) |
HCEraseGrpSize:Byte;
|
High-capacity erase unit size (224) |
SecTRIMMult:Byte;
|
Secure TRIM Multiplier (229) |
SecEraseMult:Byte;
|
Secure Erase Multiplier (230) |
SecFeatureSupport:Byte;
|
Secure Feature support (231) |
TRIMMult:Byte;
|
TRIM Multiplier (232) |
Calculated Values | |
Sectors:LongWord;
|
|
SleepAwakeTime:LongWord;
|
100ns |
PartitionSwitchTime:LongWord;
|
ms |
HCEraseSize:LongWord;
|
Sectors |
HCEraseTimeout:LongWord;
|
Milliseconds |
DataSectorSize:LongWord;
|
512 bytes or 4KB |
SD status data (SSR)
PSDStatusData = ^TSDStatusData;
TSDStatusData = record
Note: See: Section 4.10.2 of SD Physical Layer Simplified Specification Version 4.10 (Defined here for MMC Device) | |
Card Values | |
BusWidth:Byte;
|
Shows the currently defined data bus width that was defined by SET_BUS_WIDTH command |
SecuredMode:Boolean;
|
Card is in Secured Mode of operation (refer to the "Part 3 Security Specification") |
CardType:Word;
|
In the future, the 8 LSBs will be used to define different variations of an SD Memory Card (Each bit will define different SD Types). The 8 MSBs will be used to define SD Cards that do not comply with the Physical Layer Specification |
ProtectedSize:LongWord;
|
Size of protected area |
SpeedClass:Byte;
|
Speed Class of the card |
PerformanceMove:Byte;
|
Performance of move indicated by 1 [MB/s] step |
EraseSize:Word;
|
Number of AUs to be erased at a time |
EraseTimeout:Byte;
|
Timeout value for erasing areas specified by UNIT_OF_ERASE_AU |
EraseOffset:Byte;
|
Fixed offset value added to erase time |
UHSSpeedGrade:Byte;
|
Speed Grade for UHS mode |
Calculated Values | |
AllocationUnitSize:Byte;
|
Size of Allocation Unit |
UHSAllocationUnitSize:Byte;
|
Size of Allocation Unit for UHS mode |
SD switch data
PSDSwitchData = ^TSDSwitchData;
TSDSwitchData = record
Note: See: Section 4.3.10 of SD Physical Layer Simplified Specification Version 4.10 | |
Card Values | |
MaximumCurrent:Word;
|
Maximum Current/Power Consumption |
Group6Support:Word;
|
Support Bits of Functions in Function Group 6 |
Group5Support:Word;
|
Support Bits of Functions in Function Group 5 |
Group4Support:Word;
|
Support Bits of Functions in Function Group 4 |
Group3Support:Word;
|
Support Bits of Functions in Function Group 3 |
Group2Support:Word;
|
Support Bits of Functions in Function Group 2 |
Group1Support:Word;
|
Support Bits of Functions in Function Group 1 |
Group6Selection:Byte;
|
Function Selection of Function Group 6 |
Group5Selection:Byte;
|
Function Selection of Function Group 5 |
Group4Selection:Byte;
|
Function Selection of Function Group 4 |
Group3Selection:Byte;
|
Function Selection of Function Group 3 |
Group2Selection:Byte;
|
Function Selection of Function Group 2 |
Group1Selection:Byte;
|
Function Selection of Function Group 1 |
StructureVersion:Byte;
|
Data Structure Version |
Group6BusyStatus:Word;
|
Busy Status of functions in group 6 |
Group5BusyStatus:Word;
|
Busy Status of functions in group 5 |
Group4BusyStatus:Word;
|
Busy Status of functions in group 4 |
Group3BusyStatus:Word;
|
Busy Status of functions in group 3 |
Group2BusyStatus:Word;
|
Busy Status of functions in group 2 |
Group1BusyStatus:Word;
|
Busy Status of functions in group 1 |
SD configuration data (SCR)
PSDConfigurationData = ^TSDConfigurationData;
TSDConfigurationData = record
Note: See: Section 5.6 of SD Physical Layer Simplified Specification Version 4.10 (Defined here for MMC Device) | |
Card Values | |
SCRStructure:Byte;
|
SCR Structure version |
SpecVersion:Byte;
|
SD Memory Card - Spec. Version |
DataAfterErase:Byte;
|
Data status after erases |
Security:Byte;
|
CPRM Security Support |
SpecVersion3:Boolean;
|
Spec. Version 3.00 or higher |
ExtendedSecurity:Byte;
|
Extended Security Support |
SpecVersion4:Boolean;
|
Spec. Version 4.00 or higher |
CommandSupport:Byte;
|
Command Support bits |
Calculated Values | |
ErasedByte:Byte;
|
Value after Erase |
MMC enumeration callback
TMMCEnumerate = function(MMC:PMMCDevice; Data:Pointer):LongWord;
|
MMC notification callback
TMMCNotification = function(Device:PDevice; Data:Pointer; Notification:LongWord):LongWord;
|
MMC device initialize
TMMCDeviceInitialize = function(MMC:PMMCDevice):LongWord;
|
MMC device deinitialize
TMMCDeviceDeinitialize = function(MMC:PMMCDevice):LongWord;
|
MMC device get card detect
TMMCDeviceGetCardDetect = function(MMC:PMMCDevice):LongWord;
|
MMC device get write protect
TMMCDeviceGetWriteProtect = function(MMC:PMMCDevice):LongWord;
|
MMC device send command
TMMCDeviceSendCommand = function(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
|
MMC device set IOS
TMMCDeviceSetIOS = function(MMC:PMMCDevice):LongWord;
|
MMC device types
PMMCDevice = ^TMMCDevice;
TMMCDevice = record
Device Properties | |
Device:TDevice;
|
The Device entry for this MMC |
MMC Properties | |
MMCId:LongWord;
|
Unique Id of this MMC in the MMC table |
MMCState:LongWord;
|
MMC state (eg MMC_STATE_INSERTED) |
DeviceInitialize:TMMCDeviceInitialize;
|
A Device specific DeviceInitialize method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceDeinitialize:TMMCDeviceDeinitialize;
|
A Device specific DeviceDeinitialize method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceGetCardDetect:TMMCDeviceGetCardDetect;
|
A Device specific DeviceGetCardDetect method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceGetWriteProtect:TMMCDeviceGetWriteProtect;
|
A Device specific DeviceGetWriteProtect method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceSendCommand:TMMCDeviceSendCommand;
|
A Device specific DeviceSendCommand method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceSetIOS:TMMCDeviceSetIOS;
|
A Device specific DeviceSetIOS method implementing a standard MMC device interface (Or nil if the default method is suitable) |
Statistics Properties | |
CommandCount:LongWord;
|
|
CommandErrors:LongWord;
|
|
Driver Properties | |
Lock:TMutexHandle;
|
Device lock |
Version:LongWord;
|
|
Clock:LongWord;
|
|
Timing:LongWord;
|
|
BusWidth:LongWord;
|
|
Voltages:LongWord;
|
|
Capabilities:LongWord;
|
|
Register Properties | |
See: Table 3-2: SD Memory Card Registers of SD Physical Layer Simplified Specification Version 4.10 | |
InterfaceCondition:LongWord;
|
Interface Condition Result |
OperationCondition:LongWord;
|
Operation Condition Register (OCR) See: Section 5.1 of SD Physical Layer Simplified Specification Version 4.10 |
RelativeCardAddress:LongWord;
|
Relative Card Address (RCA) (Word) See: Section 5.4 of SD Physical Layer Simplified Specification Version 4.10 |
CardSpecific:array[0..3] of LongWord;
|
Card Specific Data (CSD) See: Section 5.3 of SD Physical Layer Simplified Specification Version 4.10 |
CardIdentification:array[0..3] of LongWord;
|
Card Identification Data (CID) See: Section 5.2 of SD Physical Layer Simplified Specification Version 4.10 |
ExtendedCardSpecific:PByte;
|
Extended Card Specific Data (EXTCSD) See: Section 7.4 of Embedded Multi-Media Card (eMMC) Electrical Standard 5.1 |
CardStatus:LongWord;
|
Card Status Register (CSR) See: Section 4.10.1 of SD Physical Layer Simplified Specification Version 4.10 |
DriverStage:LongWord;
|
Driver Stage Register (DSR) (Word) See: Section 5.5 of SD Physical Layer Simplified Specification Version 4.10 |
SDStatus:array[0..15] of LongWord;
|
SD Status Register (SSR) See: Section 4.10.2 of SD Physical Layer Simplified Specification Version 4.10 |
SDSwitch:array[0..15] of LongWord;
|
SD Switch Status See: Section 4.3.10 of SD Physical Layer Simplified Specification Version 4.10 |
SDConfiguration:array[0..1] of LongWord;
|
SD Configuration Register (SCR) See: Section 5.6 of SD Physical Layer Simplified Specification Version 4.10 |
Configuration Properties | |
CardSpecificData:TMMCCardSpecificData;
|
|
CardIdentificationData:TMMCCardIdentificationData;
|
|
ExtendedCardSpecificData:TMMCExtendedCardSpecificData;
|
|
SDStatusData:TSDStatusData;
|
|
SDSwitchData:TSDSwitchData;
|
|
SDConfigurationData:TSDConfigurationData;
|
|
Storage Properties | |
Storage:PStorageDevice;
|
The Storage entry for this MMC (Where Applicable) |
Internal Properties | |
Prev:PMMCDevice;
|
Previous entry in MMC table |
Next:PMMCDevice;
|
Next entry in MMC table |
SDIO driver
PSDIODriver = ^TSDIODriver;
TSDIODriver = record
Driver Properties | |
Driver:TDriver;
|
The Driver entry for this SDIO Driver |
SDIO Properties | |
DriverBind:TSDIODriverBind;
|
A Driver specific DriverBind method implementing the standard SDIO driver interface |
DriverUnbind:TSDIODriverUnbind;
|
A Driver specific DriverUnbind method implementing the standard SDIO driver interface |
Interface Properties | |
Lock:TMutexHandle;
|
Driver lock |
Internal Properties | |
Prev:PSDIODriver;
|
Previous entry in Driver table |
Next:PSDIODriver;
|
Next entry in Driver table |
SDIO driver enumeration callback
TSDIODriverEnumerate = function(Driver:PSDIODriver;Data:Pointer):LongWord;
|
SDIO driver bind callback
TSDIODriverBind = function(Device:PSDIODevice):LongWord;
|
SDIO driver unbind callback
TSDIODriverUnbind = function(Device:PSDIODevice):LongWord;
|
SDIO device
PSDIODevice = ^TSDIODevice;
TSDIODevice = record
MMC Properties | |
MMC:TMMCDevice;
|
The MMC device entry for this SDIO device |
SDIO Properties | |
SDIOState:LongWord;
|
SDIO device state (eg SDIO_STATE_ATTACHED) |
SDIOStatus:LongWord;
|
SDIO device status (eg SDIO_STATUS_BOUND) |
Host:PDevice;
|
Host controller this SDIO device is connected to |
Driver:PSDIODriver;
|
Driver this SDIO device is bound to, if any. |
SDIO device bind callback
TSDIODeviceBind = function(Device:PSDIODevice):LongWord;
|
SDIO device unbind callback
TSDIODeviceUnbind = function(Device:PSDIODevice; Driver:PSDIODriver):LongWord;
|
SDIO device enumeration callback
TSDIODeviceEnumerate = function(Device:PSDIODevice; Data:Pointer):LongWord;
|
SDIO device notification callback
TSDIODeviceNotification = function(Device:PDevice; Data:Pointer; Notification:LongWord):LongWord;
|
SDHCI enumeration callback
TSDHCIEnumerate = function(SDHCI:PSDHCIHost; Data:Pointer):LongWord;
|
SDHCI notification callback
TSDHCINotification = function(Device:PDevice; Data:Pointer; Notification:LongWord):LongWord;
|
SDHCI host start
TSDHCIHostStart = function(SDHCI:PSDHCIHost):LongWord;
|
SDHCI host stop
TSDHCIHostStop = function(SDHCI:PSDHCIHost):LongWord;
|
SDHCI host read byte
TSDHCIHostReadByte = function(SDHCI:PSDHCIHost; Reg:LongWord):Byte;
|
SDHCI host read word
TSDHCIHostReadWord = function(SDHCI:PSDHCIHost; Reg:LongWord):Word;
|
SDHCI host read long
TSDHCIHostReadLong = function(SDHCI:PSDHCIHost; Reg:LongWord):LongWord;
|
SDHCI host write byte
TSDHCIHostWriteByte = procedure(SDHCI:PSDHCIHost; Reg:LongWord; Value:Byte);
|
SDHCI host write word
TSDHCIHostWriteWord = procedure(SDHCI:PSDHCIHost; Reg:LongWord; Value:Word);
|
SDHCI host write long
TSDHCIHostWriteLong = procedure(SDHCI:PSDHCIHost; Reg:LongWord; Value:LongWord);
|
SDHCI host reset
TSDHCIHostReset = function(SDHCI:PSDHCIHost; Mask:Byte):LongWord;
|
SDHCI host hardware reset
TSDHCIHostHardwareReset = function(SDHCI:PSDHCIHost):LongWord;
|
SDHCI host set power
TSDHCIHostSetPower = function(SDHCI:PSDHCIHost; Power:Word):LongWord;
|
SDHCI host set clock
TSDHCIHostSetClock = function(SDHCI:PSDHCIHost; Clock:LongWord):LongWord;
|
SDHCI host set clock divider
TSDHCIHostSetClockDivider = function(SDHCI:PSDHCIHost; Index:Integer; Divider:LongWord):LongWord;
|
SDHCI host set control register
TSDHCIHostSetControlRegister = function(SDHCI:PSDHCIHost):LongWord;
|
SDHCI host types
PSDHCIHost = ^TSDHCIHost;
TSDHCIHost = record
Device Properties | |
Device:TDevice;
|
The Device entry for this SDHCI |
SDHCI Properties | |
SDHCIId:LongWord;
|
Unique Id of this SDHCI in the SDHCI table |
SDHCIState:LongWord;
|
SDHCI state (eg SDHCI_STATE_ENABLED) |
HostStart:TSDHCIHostStart;
|
A Host specific HostStart method implementing a standard SDHCI host interface |
HostStop:TSDHCIHostStop;
|
A Host specific HostStop method implementing a standard SDHCI host interface |
HostReadByte:TSDHCIHostReadByte;
|
A Host specific HostReadByte method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostReadWord:TSDHCIHostReadWord;
|
A Host specific HostReadWord method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostReadLong:TSDHCIHostReadLong;
|
A Host specific HostReadLong method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostWriteByte:TSDHCIHostWriteByte;
|
A Host specific HostWriteByte method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostWriteWord:TSDHCIHostWriteWord;
|
A Host specific HostWriteWord method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostWriteLong:TSDHCIHostWriteLong;
|
A Host specific HostWriteLong method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostReset:TSDHCIHostReset;
|
A Host specific HostReset method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostHardwareReset:TSDHCIHostHardwareReset;
|
A Host specific HostHardwareReset method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostSetPower:TSDHCIHostSetPower;
|
A Host specific HostSetPower method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostSetClock:TSDHCIHostSetClock;
|
A Host specific HostSetClock method implementing a standard SDHCI host interface (Or nil if the default method is suitable) |
HostSetClockDivider:TSDHCIHostSetClockDivider;
|
|
HostSetControlRegister:TSDHCIHostSetControlRegister;
|
|
DeviceInitialize:TMMCDeviceInitialize;
|
A Device specific DeviceInitialize method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceDeinitialize:TMMCDeviceDeinitialize;
|
A Device specific DeviceDeinitialize method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceGetCardDetect:TMMCDeviceGetCardDetect;
|
A Device specific DeviceGetCardDetect method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceGetWriteProtect:TMMCDeviceGetWriteProtect;
|
A Device specific DeviceGetWriteProtect method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceSendCommand:TMMCDeviceSendCommand;
|
A Device specific DeviceSendCommand method implementing a standard MMC device interface (Or nil if the default method is suitable) |
DeviceSetIOS:TMMCDeviceSetIOS;
|
A Device specific DeviceSetIOS method implementing a standard MMC device interface (Or nil if the default method is suitable) |
Driver Properties | |
Lock:TMutexHandle;
|
Host lock |
Address:Pointer;
|
Host register base address |
Version:LongWord;
|
Host version information |
Quirks:LongWord;
|
Host quirks/bugs flags |
Quirks2:LongWord;
|
Host additional quirks/bugs flags |
Clock:LongWord;
|
Host current clock |
BusWidth:LongWord;
|
Host current bus width |
Interrupts:LongWord;
|
Host interrupts to be handled |
Voltages:LongWord;
|
Host configured voltage flags |
Capabilities:LongWord;
|
Host configured capabilities flags |
MinimumFrequency:LongWord;
|
Host configured minimum frequency |
MaximumFrequency:LongWord;
|
Host configured maximum frequency |
MaximumBlockCount:LongWord;
|
Host configured maximum block count |
Command:PMMCCommand;
|
Currently processing command |
Wait:TSemaphoreHandle;
|
Command completed semaphore |
Configuration Properties | |
PresetVoltages:LongWord;
|
Host predefined voltage flags |
PresetCapabilities:LongWord;
|
Host predefined capabilities flags |
ClockMinimum:LongWord;
|
Host predefined minimum clock frequency |
ClockMaximum:LongWord;
|
Host predefined maximum clock frequency |
DriverStageRegister:LongWord;
|
Host predefined driver stage register (DSR) |
Statistics Properties | |
InterruptCount:LongWord;
|
Number of interrupt requests received by the host |
Internal Properties | |
Prev:PSDHCIHost;
|
Previous entry in SDHCI table |
Next:PSDHCIHost;
|
Next entry in SDHCI table |
Public variables
MMC logging
MMC_DEFAULT_LOG_LEVEL:LongWord = MMC_LOG_LEVEL_DEBUG;
|
Minimum level for MMC messages. Only messages with level greater than or equal to this will be printed. |
MMC_LOG_ENABLED:Boolean;
|
Function declarations
Initialization functions
procedure MMCInit;
Note | None documented |
---|
function MMCStart:LongWord;
Note | None documented |
---|
function MMCStop:LongWord;
Note | None documented |
---|
procedure MMCAsyncStart(SDHCI:PSDHCIHost);
Note | None documented |
---|
MMC functions
function MMCDeviceReadBlocks(MMC:PMMCDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Note | None documented |
---|
function MMCDeviceWriteBlocks(MMC:PMMCDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Note | None documented |
---|
function MMCDeviceEraseBlocks(MMC:PMMCDevice; const Start,Count:Int64):LongWord;
Note | None documented |
---|
function MMCDeviceGoIdle(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSetClock(MMC:PMMCDevice; Clock:LongWord):LongWord;
Note | None documented |
---|
function MMCDeviceSetBusWidth(MMC:PMMCDevice; Width:LongWord):LongWord;
Reference | Section 3.4 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf |
---|
function MMCDeviceSetBlockLength(MMC:PMMCDevice; Length:LongWord):LongWord;
Note | None documented |
---|
function MMCDeviceSetBlockCount(MMC:PMMCDevice; Count:LongWord; Relative:Boolean):LongWord;
Note | None documented |
---|
function MMCDeviceSetDriverStage(MMC:PMMCDevice; DriverStage:LongWord):LongWord;
Note | None documented |
---|
function MMCDeviceStopTransmission(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSelectCard(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceDeselectCard(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSwitch(MMC:PMMCDevice; Setting,Index,Value:Byte):LongWord;
Note | None documented |
---|
function MMCDeviceSendCardStatus(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSendOperationCondition(MMC:PMMCDevice; Probe:Boolean):LongWord;
Note | None documented |
---|
function MMCDeviceSendCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceDecodeCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSendCardIdentification(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSendAllCardIdentification(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceDecodeCardIdentification(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceGetExtendedCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSendExtendedCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceDecodeExtendedCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSetRelativeAddress(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSPISetCRC(MMC:PMMCDevice; Enable:Boolean):LongWord;
Note | None documented |
---|
function MMCDeviceSPIReadOperationCondition(MMC:PMMCDevice; HighCapacity:Boolean):LongWord;
Note | None documented |
---|
function MMCDeviceInsert(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceRemove(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceInitialize(MMC:PMMCDevice):LongWord;
Reference | Section 3.6 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf |
---|
function MMCDeviceDeinitialize(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceGetCardDetect(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceGetWriteProtect(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceSendCommand(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
Note | None documented |
---|
function MMCDeviceSetIOS(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceCreate:PMMCDevice;
Return | Pointer to new MMC entry or nil if MMC could not be created |
---|
function MMCDeviceCreateEx(Size:LongWord):PMMCDevice;
Size | Size in bytes to allocate for new MMC (Including the MMC entry) |
---|---|
Return | Pointer to new MMC entry or nil if MMC could not be created |
function MMCDeviceDestroy(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceRegister(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceDeregister(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function MMCDeviceFind(MMCId:LongWord):PMMCDevice;
Note | None documented |
---|
function MMCDeviceFindByDevice(Device:PDevice):PMMCDevice;
Device | The device entry to match with the DeviceData value |
---|---|
Return | The MMC/SD device matched or nil if none found |
function MMCDeviceFindByName(const Name:String):PMMCDevice; inline;
Note | None documented |
---|
function MMCDeviceFindByDescription(const Description:String):PMMCDevice; inline;
Note | None documented |
---|
function MMCDeviceEnumerate(Callback:TMMCEnumerate; Data:Pointer):LongWord;
Note | None documented |
---|
function MMCDeviceNotification(MMC:PMMCDevice; Callback:TMMCNotification; Data:Pointer; Notification,Flags:LongWord):LongWord;
Note | None documented |
---|
SD functions
function SDDeviceSwitch(MMC:PMMCDevice; Mode,Group:Integer; Value:Byte; Buffer:Pointer):LongWord;
Buffer | Buffer must point to a 64 byte buffer for Switch Status information |
---|---|
Note | See 4.3.10 of SD Physical Layer Simplified Specification V4.10 |
function SDDeviceSwitchHighspeed(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceSetBusSpeed(MMC:PMMCDevice; Speed:LongWord):LongWord;
Note | None documented |
---|
function SDDeviceSetBusWidth(MMC:PMMCDevice; Width:LongWord):LongWord;
Note | See Table 4-30 in Section 4.7.4 of SD Physical Layer Simplified Specification V4.10 |
---|
function SDDeviceSendInterfaceCondition(MMC:PMMCDevice):LongWord;
Note | See 4.3.13 of SD Physical Layer Simplified Specification V4.10.
CMD8 (SEND_IF_COND) must be invoked to support SD 2.0 cards. The card must be in Idle State before issuing this command. This command will fail harmlessly for SD 1.0 cards. |
---|
function SDDeviceSendOperationCondition(MMC:PMMCDevice; Probe:Boolean):LongWord;
Note | See 4.2.3.1 of SD Physical Layer Simplified Specification V4.10 |
---|
function SDDeviceGetCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceDecodeCardSpecific(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceGetCardIdentification(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceDecodeCardIdentification(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceSendSDStatus(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceDecodeSDStatus(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceSendSDSwitch(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceDecodeSDSwitch(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceSendSDConfiguration(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceDecodeSDConfiguration(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceSendRelativeAddress(MMC:PMMCDevice):LongWord;
Note | None documented |
---|
function SDDeviceSendApplicationCommand(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
Note | None documented |
---|
SDIO functions
function SDIODeviceReset(MMC:PMMCDevice):LongWord;
Note | See SDIO Simplified Specification V2.0, 4.4 Reset for SDIO |
---|
function SDIODeviceSendOperationCondition(MMC:PMMCDevice; Probe:Boolean):LongWord;
Note | None documented |
---|
function SDIODeviceReadWriteDirect(MMC:PMMCDevice; Write:Boolean; Operation,Address:LongWord; Input:Byte; Output:PByte):LongWord;
Note | None documented |
---|
function SDIODeviceReadWriteExtended(MMC:PMMCDevice; Write:Boolean; Operation,Address:LongWord; Increment:Boolean; Buffer:Pointer; BlockCount,BlockSize:LongWord):LongWord;
Note | None documented |
---|
SDHCI functions
function SDHCIHostReset(SDHCI:PSDHCIHost; Mask:Byte):LongWord;
Reference | Section 3.3 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf |
---|
function SDHCIHostSetPower(SDHCI:PSDHCIHost; Power:Word):LongWord;
Reference | Section 3.3 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf |
---|
function SDHCIHostSetClock(SDHCI:PSDHCIHost; Clock:LongWord):LongWord;
Reference | Section 3.2 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf |
---|
function SDHCIHostTransferPIO(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostTransferDMA(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostFinishCommand(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostFinishData(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostCommandInterrupt(SDHCI:PSDHCIHost; InterruptMask:LongWord; var ReturnMask:LongWord):LongWord;
Note | None documented |
---|
function SDHCIHostDataInterrupt(SDHCI:PSDHCIHost; InterruptMask:LongWord):LongWord;
Note | None documented |
---|
function SDHCIHostStart(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostStop(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostReadByte(SDHCI:PSDHCIHost; Reg:LongWord):Byte; inline;
Note | None documented |
---|
function SDHCIHostReadWord(SDHCI:PSDHCIHost; Reg:LongWord):Word; inline;
Note | None documented |
---|
function SDHCIHostReadLong(SDHCI:PSDHCIHost; Reg:LongWord):LongWord; inline;
Note | None documented |
---|
procedure SDHCIHostWriteByte(SDHCI:PSDHCIHost; Reg:LongWord; Value:Byte); inline;
Note | None documented |
---|
procedure SDHCIHostWriteWord(SDHCI:PSDHCIHost; Reg:LongWord; Value:Word); inline;
Note | None documented |
---|
procedure SDHCIHostWriteLong(SDHCI:PSDHCIHost; Reg:LongWord; Value:LongWord); inline;
Note | None documented |
---|
function SDHCIHostSetClockDivider(SDHCI:PSDHCIHost; Index:Integer; Divider:LongWord):LongWord;
Note | None documented |
---|
function SDHCIHostSetControlRegister(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostCreate:PSDHCIHost;
Return | Pointer to new SDHCI entry or nil if SDHCI could not be created |
---|
function SDHCIHostCreateEx(Size:LongWord):PSDHCIHost;
Size | Size in bytes to allocate for new SDHCI (Including the SDHCI entry) |
---|---|
Return | Pointer to new SDHCI entry or nil if SDHCI could not be created |
function SDHCIHostDestroy(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostRegister(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostDeregister(SDHCI:PSDHCIHost):LongWord;
Note | None documented |
---|
function SDHCIHostFind(SDHCIId:LongWord):PSDHCIHost;
Note | None documented |
---|
function SDHCIHostEnumerate(Callback:TSDHCIEnumerate; Data:Pointer):LongWord;
Note | None documented |
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function SDHCIHostNotification(SDHCI:PSDHCIHost; Callback:TSDHCINotification; Data:Pointer; Notification,Flags:LongWord):LongWord;
Note | None documented |
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MMC helper functions
function MMCGetCount:LongWord; inline;
Note | None documented |
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function MMCDeviceCheck(MMC:PMMCDevice):PMMCDevice;
Note | None documented |
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function MMCIsSD(MMC:PMMCDevice):Boolean;
Note | None documented |
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function MMCGetCIDValue(MMC:PMMCDevice; Version,Value:LongWord):LongWord;
Note | None documented |
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function MMCGetCSDValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Note | None documented |
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function MMCGetExtendedCSDValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Note | None documented |
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function MMCExtractBits(Buffer:Pointer; Start,Size:LongWord):LongWord;
Start | Start is the starting bit to extract |
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Size | Size is the number of bits to extract |
Note | Start is the LSB so to extract 8 bits from 127 to 120 then Start would be 120 and Size would be 8 |
function MMCExtractBitsEx(Buffer:Pointer; Length,Start,Size:LongWord):LongWord;
Length | Length is the size of the buffer in LongWords |
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Start | Start is the starting bit to extract |
Size | Size is the number of bits to extract |
Note | Start is the LSB so to extract 8 bits from 127 to 120 then Start would be 120 and Size would be 8. For a 128 bit buffer (16 bytes) Length would be 4. For a 512 bit buffer (64 bytes) Length would be 16. |
function MMCIsMultiCommand(Command:Word):Boolean;
Note | None documented |
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function MMCStatusToString(Status:LongWord):String;
Note | None documented |
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function MMCDeviceTypeToString(MMCType:LongWord):String;
Note | None documented |
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function MMCDeviceStateToString(MMCState:LongWord):String;
Note | None documented |
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procedure MMCLog(Level:LongWord; MMC:PMMCDevice; const AText:String);
Note | None documented |
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procedure MMCLogInfo(MMC:PMMCDevice; const AText:String); inline;
Note | None documented |
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procedure MMCLogWarn(MMC:PMMCDevice; const AText:String); inline;
Note | None documented |
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procedure MMCLogError(MMC:PMMCDevice; const AText:String); inline;
Note | None documented |
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procedure MMCLogDebug(MMC:PMMCDevice; const AText:String); inline;
Note | None documented |
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SD helper functions
function SDGetMaxClock(MMC:PMMCDevice):LongWord;
Note | None documented |
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function SDGetCIDValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Note | None documented |
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function SDGetCSDValue(MMC:PMMCDevice; Version,Value:LongWord):LongWord;
Note | None documented |
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function SDGetSCRValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Note | None documented |
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function SDGetSSRValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Note | None documented |
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function SDGetSwitchValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Note | None documented |
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SDHCI helper functions
function SDHCIGetCount:LongWord; inline;
Note | None documented |
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function SDHCIHostCheck(SDHCI:PSDHCIHost):PSDHCIHost;
Note | None documented |
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function SDHCIIsSPI(SDHCI:PSDHCIHost):Boolean;
Note | None documented |
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function SDHCIGetVersion(SDHCI:PSDHCIHost):Word;
Note | None documented |
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function SDHCIGetCommand(Command:Word):Word;
Note | None documented |
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function SDHCIMakeCommand(Command,Flags:Word):Word;
Note | None documented |
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function SDHCIMakeBlockSize(DMA,BlockSize:Word):Word;
Note | None documented |
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function SDHCIDeviceTypeToString(SDHCIType:LongWord):String;
Note | None documented |
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function SDHCIDeviceStateToString(SDHCIState:LongWord):String;
Note | None documented |
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MMC storage functions
function MMCStorageDeviceRead(Storage:PStorageDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Note | None documented |
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function MMCStorageDeviceWrite(Storage:PStorageDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Note | None documented |
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function MMCStorageDeviceErase(Storage:PStorageDevice; const Start,Count:Int64):LongWord;
Note | None documented |
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function MMCStorageDeviceControl(Storage:PStorageDevice; Request:Integer; Argument1:LongWord; var Argument2:LongWord):LongWord;
Note | None documented |
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