Return to Unit Reference
Description
Ultibo MMC/SD interface unit
This unit implements the standards based part of the SD/MMC specification including the standard SDHCI interfaces.
For each platform a SDHCI module needs to be provided that implements the platform specific parts of the SDHCI interface.
This is similar in model to USB and other interfaces in Ultibo, where the generic interface unit requires a platform specific module to register with it in order to communicate with platform specific devices.
The SD/MMC interfaces are 2 tier (ie Host and Device) whereas the USB interface is 3 tier (Host, Device and Driver).
Constants
[Expand]
MMC specific constants MMC_*
MMC_NAME_PREFIX = 'MMC';
|
Name prefix for MMC Devices
|
|
|
MMC_DEVICE_DESCRIPTION = 'MMC/SD Device';
|
Description of MMC/SD device
|
MMC_STORAGE_DESCRIPTION = 'MMC/SD Storage Device';
|
Description of MMC/SD storage device
|
|
|
MMC_STATUS_TIMER_INTERVAL = 1000;
|
|
|
|
MMC_DEFAULT_BLOCKSIZE = 512;
|
|
MMC_DEFAULT_BLOCKSHIFT = 9;
|
|
[Expand]
MMC device type MMC_TYPE_*
MMC_TYPE_NONE = 0;
|
|
MMC_TYPE_MMC = 1;
|
An MMC specification card
|
MMC_TYPE_SD = 2;
|
An SD specification card
|
MMC_TYPE_SDIO = 3;
|
An SDIO specification card
|
MMC_TYPE_SD_COMBO = 4;
|
An SD/SDIO combination card
|
|
|
MMC_TYPE_MAX = 4;
|
|
[Expand]
MMC device state MMC_STATE_*
MMC_STATE_EJECTED = 0;
|
|
MMC_STATE_INSERTED = 1;
|
|
|
|
MMC_STATE_MAX = 1;
|
|
[Expand]
MMC device flag MMC_FLAG_*
MMC_FLAG_NONE = $00000000;
|
|
MMC_FLAG_CARD_PRESENT = $00000001;
|
|
MMC_FLAG_WRITE_PROTECT = $00000002;
|
|
MMC_FLAG_HIGH_CAPACITY = $00000004;
|
High Capacity (SDHC)
|
MMC_FLAG_EXT_CAPACITY = $00000008;
|
Extended Capacity (SDXC)
|
MMC_FLAG_UHS_I = $00000010;
|
Ultra High Speed (UHS-I)
|
MMC_FLAG_UHS_II = $00000020;
|
Ultra High Speed (UHS-II)
|
MMC_FLAG_BLOCK_ADDRESSED = $00000040;
|
Block Addressed (SDHC/SDXC and others)
|
MMC_FLAG_AUTO_BLOCK_COUNT = $00000080;
|
Auto CMD23 (Set Block Count)
|
MMC_FLAG_AUTO_COMMAND_STOP = $00000100;
|
Auto CMD12 (Stop Transmission)
|
MMC_FLAG_DDR_MODE = $00000200;
|
|
[Expand]
MMC/SD status code MMC_STATUS_*
MMC_STATUS_SUCCESS = 0;
|
Function successful
|
MMC_STATUS_TIMEOUT = 1;
|
The operation timed out
|
MMC_STATUS_NO_MEDIA = 2;
|
No media present in device
|
MMC_STATUS_HARDWARE_ERROR = 3;
|
Hardware error of some form occurred
|
MMC_STATUS_INVALID_DATA = 4;
|
Invalid data was received
|
MMC_STATUS_INVALID_PARAMETER = 5;
|
An invalid parameter was passed to the function
|
MMC_STATUS_INVALID_SEQUENCE = 6;
|
Invalid sequence encountered
|
MMC_STATUS_OUT_OF_MEMORY = 7;
|
No memory available for operation
|
MMC_STATUS_UNSUPPORTED_REQUEST = 8;
|
The request is unsupported
|
MMC_STATUS_NOT_PROCESSED = 9;
|
The MMC transfer has not yet been processed
|
[Expand]
MMC/SD version SD_VERSION_*, MMC_VERSION_*
SD_VERSION_SD = $00020000;
|
|
SD_VERSION_1_0 = (SD_VERSION_SD or $0100);
|
|
SD_VERSION_1_10 = (SD_VERSION_SD or $010a);
|
|
SD_VERSION_2 = (SD_VERSION_SD or $0200);
|
|
SD_VERSION_3 = (SD_VERSION_SD or $0300);
|
|
SD_VERSION_4 = (SD_VERSION_SD or $0400);
|
|
|
|
MMC_VERSION_MMC = $00010000;
|
|
MMC_VERSION_1_2 = (MMC_VERSION_MMC or $0102);
|
|
MMC_VERSION_1_4 = (MMC_VERSION_MMC or $0104);
|
|
MMC_VERSION_2_2 = (MMC_VERSION_MMC or $0202);
|
|
MMC_VERSION_3 = (MMC_VERSION_MMC or $0300);
|
|
MMC_VERSION_4 = (MMC_VERSION_MMC or $0400);
|
|
MMC_VERSION_4_1 = (MMC_VERSION_MMC or $0401);
|
|
MMC_VERSION_4_2 = (MMC_VERSION_MMC or $0402);
|
|
MMC_VERSION_4_3 = (MMC_VERSION_MMC or $0403);
|
|
MMC_VERSION_4_41 = (MMC_VERSION_MMC or $0429);
|
|
MMC_VERSION_4_5 = (MMC_VERSION_MMC or $0405);
|
|
MMC_VERSION_5_0 = (MMC_VERSION_MMC or $0500);
|
|
MMC_VERSION_UNKNOWN = (MMC_VERSION_MMC);
|
|
[Expand]
MMC/SD mode MMC_MODE_*
MMC_MODE_HS = (1 shl 0);
|
|
MMC_MODE_HS_52MHz = (1 shl 1);
|
|
MMC_MODE_4BIT = (1 shl 2);
|
|
MMC_MODE_8BIT = (1 shl 3);
|
|
MMC_MODE_SPI = (1 shl 4);
|
|
MMC_MODE_HC = (1 shl 5);
|
|
MMC_MODE_DDR_52MHz = (1 shl 6);
|
|
[Expand]
MMC/SD capabilities MMC_CAP_*
| From: /include/linux/mmc/host.h
|
|
|
MMC_CAP_CMD23 = (1 shl 30);
|
CMD23 supported
|
[Expand]
MMC/SD direction MMC_DATA_*
MMC_DATA_READ = 1;
|
|
MMC_DATA_WRITE = 2;
|
|
[Expand]
MMC/SD bus width MMC_BUS_WIDTH_*
MMC_BUS_WIDTH_1 = 0;
|
|
MMC_BUS_WIDTH_4 = 2;
|
|
MMC_BUS_WIDTH_8 = 3;
|
|
[Expand]
MMC bus speed (Hz) MMC_BUS_SPEED_*
MMC_BUS_SPEED_DEFAULT = 0;
|
|
MMC_BUS_SPEED_HS26 = 26000000;
|
|
MMC_BUS_SPEED_HS52 = 52000000;
|
|
MMC_BUS_SPEED_DDR = 52000000;
|
|
MMC_BUS_SPEED_HS200 = 200000000;
|
|
[Expand]
MMC/SD timing MMC_TIMING_*
| From: /include/linux/mmc/host.h
|
|
|
MMC_TIMING_LEGACY = 0;
|
|
MMC_TIMING_MMC_HS = 1;
|
|
MMC_TIMING_SD_HS = 2;
|
|
MMC_TIMING_UHS_SDR12 = 3;
|
|
MMC_TIMING_UHS_SDR25 = 4;
|
|
MMC_TIMING_UHS_SDR50 = 5;
|
|
MMC_TIMING_UHS_SDR104 = 6;
|
|
MMC_TIMING_UHS_DDR50 = 7;
|
|
MMC_TIMING_MMC_DDR52 = 8;
|
|
MMC_TIMING_MMC_HS200 = 9;
|
|
MMC_TIMING_MMC_HS400 = 10;
|
|
[Expand]
MMC command MMC_CMD_*
| From: /include/linux/mmc/mmc.h
|
|
|
| Class 1
|
MMC_CMD_GO_IDLE_STATE = 0;
|
|
MMC_CMD_SEND_OP_COND = 1;
|
|
MMC_CMD_ALL_SEND_CID = 2;
|
|
MMC_CMD_SET_RELATIVE_ADDR = 3;
|
|
MMC_CMD_SET_DSR = 4;
|
|
MMC_CMD_SLEEP_AWAKE = 5;
|
|
MMC_CMD_SWITCH = 6;
|
|
MMC_CMD_SELECT_CARD = 7;
|
|
MMC_CMD_SEND_EXT_CSD = 8;
|
|
MMC_CMD_SEND_CSD = 9;
|
|
MMC_CMD_SEND_CID = 10;
|
|
MMC_CMD_READ_DAT_UNTIL_STOP = 11;
|
|
MMC_CMD_STOP_TRANSMISSION = 12;
|
|
MMC_CMD_SEND_STATUS = 13;
|
|
MMC_CMD_BUS_TEST_R = 14;
|
|
MMC_CMD_GO_INACTIVE_STATE = 15;
|
|
MMC_CMD_BUS_TEST_W = 19;
|
|
MMC_CMD_SPI_READ_OCR = 58;
|
|
MMC_CMD_SPI_CRC_ON_OFF = 59;
|
|
|
|
| Class 2
|
MMC_CMD_SET_BLOCKLEN = 16;
|
|
MMC_CMD_READ_SINGLE_BLOCK = 17;
|
|
MMC_CMD_READ_MULTIPLE_BLOCK = 18;
|
|
MMC_CMD_SEND_TUNING_BLOCK = 19;
|
|
MMC_CMD_SEND_TUNING_BLOCK_HS200 = 21;
|
|
|
|
| Class 3
|
MMC_CMD_WRITE_DAT_UNTIL_STOP = 20;
|
|
|
|
| Class 4
|
MMC_CMD_SET_BLOCK_COUNT = 23;
|
|
MMC_CMD_WRITE_SINGLE_BLOCK = 24;
|
|
MMC_CMD_WRITE_MULTIPLE_BLOCK = 25;
|
|
MMC_CMD_PROGRAM_CID = 26;
|
|
MMC_CMD_PROGRAM_CSD = 27;
|
|
|
|
| Class 6
|
MMC_CMD_SET_WRITE_PROT = 28;
|
|
MMC_CMD_CLR_WRITE_PROT = 29;
|
|
MMC_CMD_SEND_WRITE_PROT = 30;
|
|
|
|
| Class 5
|
MMC_CMD_ERASE_GROUP_START = 35;
|
|
MMC_CMD_ERASE_GROUP_END = 36;
|
|
MMC_CMD_ERASE = 38;
|
|
|
|
| Class 9
|
MMC_CMD_FAST_IO = 39;
|
|
MMC_CMD_GO_IRQ_STATE = 40;
|
|
|
|
| Class 7
|
MMC_CMD_LOCK_UNLOCK = 42;
|
|
|
|
| Class 8
|
MMC_CMD_APP_CMD = 55;
|
|
MMC_CMD_GEN_CMD = 56;
|
|
MMC_CMD_RES_MAN = 62;
|
|
|
|
MMC_CMD62_ARG1 = $EFAC62EC;
|
|
MMC_CMD62_ARG2 = $00CBAEA7;
|
|
[Expand]
MMC response type MMC_RSP_*
| From: /include/linux/mmc/mmc.h
|
|
|
| Native
|
MMC_RSP_PRESENT = (1 shl 0);
|
|
MMC_RSP_136 = (1 shl 1);
|
136 bit response
|
MMC_RSP_CRC = (1 shl 2);
|
Expect valid crc
|
MMC_RSP_BUSY = (1 shl 3);
|
Card may send busy
|
MMC_RSP_OPCODE = (1 shl 4);
|
Response contains opcode
|
|
|
| These are the native response types, and correspond to valid bit patterns of the above flags. One additional valid pattern is all zeros, which means we don't expect a response.
|
MMC_RSP_NONE = (0);
|
|
MMC_RSP_R1 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
|
|
MMC_RSP_R1B = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE or MMC_RSP_BUSY);
|
|
MMC_RSP_R2 = (MMC_RSP_PRESENT or MMC_RSP_136 or MMC_RSP_CRC);
|
|
MMC_RSP_R3 = (MMC_RSP_PRESENT);
|
|
MMC_RSP_R4 = (MMC_RSP_PRESENT);
|
|
MMC_RSP_R5 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
|
|
MMC_RSP_R6 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
|
|
MMC_RSP_R7 = (MMC_RSP_PRESENT or MMC_RSP_CRC or MMC_RSP_OPCODE);
|
|
|
|
| SPI
|
MMC_RSP_SPI_S1 = (1 shl 7);
|
One status byte
|
MMC_RSP_SPI_S2 = (1 shl 8);
|
Second byte
|
MMC_RSP_SPI_B4 = (1 shl 9);
|
Four data bytes
|
MMC_RSP_SPI_BUSY = (1 shl 10);
|
Card may send busy
|
|
|
| These are the SPI response types for MMC, SD, and SDIO cards. Commands return R1, with maybe more info. Zero is an error type, callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
|
MMC_RSP_SPI_R1 = (MMC_RSP_SPI_S1);
|
|
MMC_RSP_SPI_R1B = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_BUSY);
|
|
MMC_RSP_SPI_R2 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_S2);
|
|
MMC_RSP_SPI_R3 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_B4);
|
|
MMC_RSP_SPI_R4 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_B4);
|
|
MMC_RSP_SPI_R5 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_S2);
|
|
MMC_RSP_SPI_R7 = (MMC_RSP_SPI_S1 or MMC_RSP_SPI_B4);
|
|
[Expand]
MMC response value MMC_RSP_R1_*, MMC_RSP_R2_*
| R1 - MMC status in R1, for native mode (SPI bits are different)
|
MMC_RSP_R1_OUT_OF_RANGE = (1 shl 31);
|
|
MMC_RSP_R1_ADDRESS_ERROR = (1 shl 30);
|
|
MMC_RSP_R1_BLOCK_LEN_ERROR = (1 shl 29);
|
|
MMC_RSP_R1_ERASE_SEQ_ERROR = (1 shl 28);
|
|
MMC_RSP_R1_ERASE_PARAM = (1 shl 27);
|
|
MMC_RSP_R1_WP_VIOLATION = (1 shl 26);
|
|
MMC_RSP_R1_CARD_IS_LOCKED = (1 shl 25);
|
|
MMC_RSP_R1_LOCK_UNLOCK_FAILED = (1 shl 24);
|
|
MMC_RSP_R1_COM_CRC_ERROR = (1 shl 23);
|
|
MMC_RSP_R1_ILLEGAL_COMMAND = (1 shl 22);
|
|
MMC_RSP_R1_CARD_ECC_FAILED = (1 shl 21);
|
|
MMC_RSP_R1_CC_ERROR = (1 shl 20);
|
|
MMC_RSP_R1_ERROR = (1 shl 19);
|
|
MMC_RSP_R1_UNDERRUN = (1 shl 18);
|
|
MMC_RSP_R1_OVERRUN = (1 shl 17);
|
|
MMC_RSP_R1_CID_CSD_OVERWRITE = (1 shl 16);
|
|
MMC_RSP_R1_WP_ERASE_SKIP = (1 shl 15);
|
|
MMC_RSP_R1_CARD_ECC_DISABLED = (1 shl 14);
|
|
MMC_RSP_R1_ERASE_RESET = (1 shl 13);
|
|
MMC_RSP_R1_READY_FOR_DATA = (1 shl 8);
|
|
MMC_RSP_R1_SWITCH_ERROR = (1 shl 7);
|
|
MMC_RSP_R1_EXCEPTION_EVENT = (1 shl 6);
|
|
MMC_RSP_R1_APP_CMD = (1 shl 5);
|
|
MMC_RSP_R1_AKE_SEQ_ERROR = (1 shl 3);
|
|
|
|
| R1 SPI - MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS. R1 is the low order byte, R2 is the next highest byte, when present.
|
MMC_RSP_R1_SPI_IDLE = (1 shl 0);
|
|
MMC_RSP_R1_SPI_ERASE_RESET = (1 shl 1);
|
|
MMC_RSP_R1_SPI_ILLEGAL_COMMAND = (1 shl 2);
|
|
MMC_RSP_R1_SPI_COM_CRC = (1 shl 3);
|
|
MMC_RSP_R1_SPI_ERASE_SEQ = (1 shl 4);
|
|
MMC_RSP_R1_SPI_ADDRESS = (1 shl 5);
|
|
MMC_RSP_R1_SPI_PARAMETER = (1 shl 6);
|
|
| R1 bit 7 is always zero
|
|
|
| R2 SPI - See above
|
MMC_RSP_R2_SPI_CARD_LOCKED = (1 shl 8);
|
|
MMC_RSP_R2_SPI_WP_ERASE_SKIP = (1 shl 9);
|
Or lock/unlock fail
|
MMC_RSP_R2_SPI_LOCK_UNLOCK_FAIL = MMC_RSP_R2_SPI_WP_ERASE_SKIP;
|
|
MMC_RSP_R2_SPI_ERROR = (1 shl 10);
|
|
MMC_RSP_R2_SPI_CC_ERROR = (1 shl 11);
|
|
MMC_RSP_R2_SPI_CARD_ECC_ERROR = (1 shl 12);
|
|
MMC_RSP_R2_SPI_WP_VIOLATION = (1 shl 13);
|
|
MMC_RSP_R2_SPI_ERASE_PARAM = (1 shl 14);
|
|
MMC_RSP_R2_SPI_OUT_OF_RANGE = (1 shl 15);
|
Or CSD overwrite
|
MMC_RSP_R2_SPI_CSD_OVERWRITE = MMC_RSP_R2_SPI_OUT_OF_RANGE;
|
|
[Expand]
MMC operation condition register (OCR) value MMC_OCR_*
| See: Section 5.1 of SD Physical Layer Simplified Specification V4.10
|
|
|
MMC_OCR_BUSY = $80000000;
|
Busy Status - 0 = Initializing/1 = Initialization Complete
|
MMC_OCR_HCS = $40000000;
|
Card Capacity Status - 0 = SDSC/1 = SDHC or SDXC
|
MMC_OCR_UHS_II = $20000000;
|
UHS-II Card Status - 0 = Non UHS-II Card/1 = UHS-II Card
|
MMC_OCR_S18A = $01000000;
|
Switching to 1.8V Accepted - 0 = Continue current voltage signaling/1 = Ready for switching signal voltage
|
MMC_OCR_VOLTAGE_MASK = $007FFF80;
|
|
MMC_OCR_ACCESS_MODE = $60000000;
|
|
[Expand]
MMC card status register (CSR) value MMC_CARD_STATUS_*
| See: Section 4.10.1 of SD Physical Layer Simplified Specification Version 4.10
|
| Note: These map to the Native mode R1 response values
|
|
|
MMC_CARD_STATUS_MASK = not($0206BF7F);
|
|
MMC_CARD_STATUS_ERROR = (1 shl 19);
|
|
MMC_CARD_STATUS_CURRENT_STATE = ($0F shl 9);
|
See MMC_CURRENT_STATE_ definitions below
|
MMC_CARD_STATUS_READY_FOR_DATA = (1 shl 8);
|
|
MMC_CARD_STATUS_SWITCH_ERROR = (1 shl 7);
|
|
[Expand]
MMC current state value MMC_CURRENT_STATE_*
| From Card Status Register or R1 Response
|
|
|
MMC_CURRENT_STATE_IDLE = (0 shl 9);
|
|
MMC_CURRENT_STATE_READY = (1 shl 9);
|
|
MMC_CURRENT_STATE_IDENT = (2 shl 9);
|
|
MMC_CURRENT_STATE_STBY = (3 shl 9);
|
|
MMC_CURRENT_STATE_TRAN = (4 shl 9);
|
|
MMC_CURRENT_STATE_DATA = (5 shl 9);
|
|
MMC_CURRENT_STATE_RCV = (6 shl 9);
|
|
MMC_CURRENT_STATE_PRG = (7 shl 9);
|
|
MMC_CURRENT_STATE_DIS = (8 shl 9);
|
|
[Expand]
MMC card identification data (CID) value MMC_CID_*
| See: Section 5.2 of SD Physical Layer Simplified Specification Version 4.10
|
|
|
| MMC CID Fields
|
MMC_CID_MID = 1;
|
Manufacturer Id
|
MMC_CID_OID = 2;
|
OEM/Application Id
|
MMC_CID_PNM0 = 3;
|
Product name (Byte 0)
|
MMC_CID_PNM1 = 4;
|
Product name (Byte 1)
|
MMC_CID_PNM2 = 5;
|
Product name (Byte 2)
|
MMC_CID_PNM3 = 6;
|
Product name (Byte 3)
|
MMC_CID_PNM4 = 7;
|
Product name (Byte 4)
|
MMC_CID_PNM5 = 8;
|
Product name (Byte 5)
|
MMC_CID_PNM6 = 9;
|
Product name (Byte 6)
|
MMC_CID_PRV = 10;
|
Product revision
|
MMC_CID_HRV = 11;
|
Hardware revision
|
MMC_CID_FRV = 12;
|
Firmware revision
|
MMC_CID_PSN = 13;
|
Product serial number
|
MMC_CID_MDT_YEAR = 14;
|
Manufacturing year
|
MMC_CID_MDT_MONTH = 15;
|
Manufacturing month
|
MMC_CID_CRC = 16;
|
CRC
|
[Expand]
MMC card specific data (CSD) value MMC_CSD_*
| See: Section 5.3 of SD Physical Layer Simplified Specification Version 4.10
|
|
|
| MMC CSD Fields
|
MMC_CSD_STRUCTURE = 1;
|
|
MMC_CSD_SPECVER = 2;
|
MMC/eMMC Only
|
MMC_CSD_TAAC_UNIT = 3;
|
|
MMC_CSD_TAAC_VALUE = 4;
|
|
MMC_CSD_NSAC = 5;
|
|
MMC_CSD_TRAN_SPEED_UNIT = 6;
|
|
MMC_CSD_TRAN_SPEED_VALUE = 37;
|
|
MMC_CSD_CCC = 7;
|
|
MMC_CSD_READ_BL_LEN = 8;
|
|
MMC_CSD_READ_BL_PARTIAL = 9;
|
|
MMC_CSD_WRITE_BLK_MISALIGN = 10;
|
|
MMC_CSD_READ_BLK_MISALIGN = 11;
|
|
MMC_CSD_DSR_IMP = 12;
|
|
MMC_CSD_C_SIZE = 13;
|
|
MMC_CSD_VDD_R_CURR_MIN = 14;
|
|
MMC_CSD_VDD_R_CURR_MAX = 15;
|
|
MMC_CSD_VDD_W_CURR_MIN = 16;
|
|
MMC_CSD_VDD_W_CURR_MAX = 17;
|
|
MMC_CSD_C_SIZE_MULT = 18;
|
|
MMC_CSD_ERASE_BLK_EN = 19;
|
SD Specification
|
MMC_CSD_SECTOR_SIZE = 20;
|
MMC/eMMC Specification/SD Specification
|
MMC_CSD_ERASE_GRP_SIZE = 21;
|
MMC/eMMC Specification
|
MMC_CSD_ERASE_GRP_MULT = 22;
|
MMC/eMMC Specification
|
MMC_CSD_WP_GRP_SIZE = 23;
|
|
MMC_CSD_WP_GRP_ENABLE = 24;
|
|
MMC_CSD_DEFAULT_ECC = 25;
|
MMC/eMMC Only
|
MMC_CSD_R2W_FACTOR = 26;
|
|
MMC_CSD_WRITE_BL_LEN = 27;
|
|
MMC_CSD_WRITE_BL_PARTIAL = 28;
|
|
MMC_CSD_CONTENT_PROT_APP = 29;
|
MMC/eMMC Only
|
MMC_CSD_FILE_FORMAT_GRP = 30;
|
|
MMC_CSD_COPY = 31;
|
|
MMC_CSD_PERM_WRITE_PROTECT = 32;
|
|
MMC_CSD_TMP_WRITE_PROTECT = 33;
|
|
MMC_CSD_FILE_FORMAT = 34;
|
|
MMC_CSD_ECC = 35;
|
MMC/eMMC Only
|
MMC_CSD_CRC = 36;
|
|
[Expand]
MMC CSD structure value MMC_CSD_STRUCT_*
MMC_CSD_STRUCT_VER_1_0 = 0;
|
Valid for system specification 1.0 - 1.2
|
MMC_CSD_STRUCT_VER_1_1 = 1;
|
Valid for system specification 1.4 - 2.2
|
MMC_CSD_STRUCT_VER_1_2 = 2;
|
Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1
|
MMC_CSD_STRUCT_EXT_CSD = 3;
|
Version is coded in CSD_STRUCTURE in EXT_CSD
|
[Expand]
MMC CSD spec version value MMC_CSD_SPEC_VER_*
MMC_CSD_SPEC_VER_0 = 0;
|
Implements system specification 1.0 - 1.2
|
MMC_CSD_SPEC_VER_1 = 1;
|
Implements system specification 1.4
|
MMC_CSD_SPEC_VER_2 = 2;
|
Implements system specification 2.0 - 2.2
|
MMC_CSD_SPEC_VER_3 = 3;
|
Implements system specification 3.1 - 3.2 - 3.31
|
MMC_CSD_SPEC_VER_4 = 4;
|
Implements system specification 4.0 - 4.1
|
[Expand]
MMC CSD TAAC time unit MMC_CSD_TAAC_UNITS*
MMC_CSD_TAAC_UNITS:array[0..7] of LongWord = (
|
1,
|
|
10,
|
|
100,
|
|
1000,
|
|
10000,
|
|
100000,
|
|
1000000,
|
|
10000000);
|
|
[Expand]
MMC CSD TAAC time value MMC_CSD_TAAC_VALUES*
MMC_CSD_TAAC_VALUES:array[0..15] of LongWord = (
|
0,
|
|
10,
|
|
12,
|
|
13,
|
|
15,
|
|
20,
|
|
25,
|
|
30,
|
|
35,
|
|
40,
|
|
45,
|
|
50,
|
|
55,
|
|
60,
|
|
70,
|
|
80);
|
|
[Expand]
MMC CSD card command class (CCC) value MMC_CCC_*
| See: Table 4-21 (Page 68) of SD Physical Layer Simplified Specification V4.10
|
|
|
MMC_CCC_BASIC = (1 shl 0);
|
(Class 0) Basic protocol functions (CMD0,1,2,3,4,7,9,10,12,13,15) (and for SPI, CMD58,59)
|
MMC_CCC_STREAM_READ = (1 shl 1);
|
(Class 1) Stream read commands (CMD11)
|
MMC_CCC_BLOCK_READ = (1 shl 2);
|
(Class 2) Block read commands (CMD16,17,18)
|
MMC_CCC_STREAM_WRITE = (1 shl 3);
|
(Class 3) Stream write commands (CMD20)
|
MMC_CCC_BLOCK_WRITE = (1 shl 4);
|
(Class 4) Block write commands (CMD16,24,25,26,27)
|
MMC_CCC_ERASE = (1 shl 5);
|
(Class 5) Ability to erase blocks (CMD32,33,34,35,36,37,38,39)
|
MMC_CCC_WRITE_PROT = (1 shl 6);
|
(Class 6) Ability to write protect blocks (CMD28,29,30)
|
MMC_CCC_LOCK_CARD = (1 shl 7);
|
(Class 7) Ability to lock down card (CMD16,CMD42)
|
MMC_CCC_APP_SPEC = (1 shl 8);
|
(Class 8) Application specific (CMD55,56,57,ACMD*)
|
MMC_CCC_IO_MODE = (1 shl 9);
|
(Class 9) I/O mode (CMD5,39,40,52,53)
|
MMC_CCC_SWITCH = (1 shl 10);
|
(Class 10) High speed switch (CMD6,34,35,36,37,50)
|
MMC_CCC_EXTENSION = (1 shl 11);
|
(Class 11) Extension (CMD?)
|
[Expand]
MMC CSD transfer speed rate unit MMC_CSD_TRAN_SPEED_UNITS*
MMC_CSD_TRAN_SPEED_UNITS:array[0..7] of LongWord = (
|
10000,
|
|
100000,
|
|
1000000,
|
|
10000000,
|
|
0,
|
|
0,
|
|
0,
|
|
0);
|
|
[Expand]
MMC CSD transfer speed time value MMC_CSD_TRAN_SPEED_VALUES*
MMC_CSD_TRAN_SPEED_VALUES:array[0..15] of LongWord = (
|
0,
|
|
10,
|
|
12,
|
|
13,
|
|
15,
|
|
20,
|
|
25,
|
|
30,
|
|
35,
|
|
40,
|
|
45,
|
|
50,
|
|
55,
|
|
60,
|
|
70,
|
|
80);
|
|
|
|
SECURE_ERASE = $80000000;
|
Used by MMC_CMD_ERASE
|
[Expand]
MMC voltage value MMC_VDD_*
MMC_VDD_165_195 = $00000080;
|
VDD voltage 1.65 - 1.95
|
MMC_VDD_20_21 = $00000100;
|
VDD voltage 2.0 ~ 2.1
|
MMC_VDD_21_22 = $00000200;
|
VDD voltage 2.1 ~ 2.2
|
MMC_VDD_22_23 = $00000400;
|
VDD voltage 2.2 ~ 2.3
|
MMC_VDD_23_24 = $00000800;
|
VDD voltage 2.3 ~ 2.4
|
MMC_VDD_24_25 = $00001000;
|
VDD voltage 2.4 ~ 2.5
|
MMC_VDD_25_26 = $00002000;
|
VDD voltage 2.5 ~ 2.6
|
MMC_VDD_26_27 = $00004000;
|
VDD voltage 2.6 ~ 2.7
|
MMC_VDD_27_28 = $00008000;
|
VDD voltage 2.7 ~ 2.8
|
MMC_VDD_28_29 = $00010000;
|
VDD voltage 2.8 ~ 2.9
|
MMC_VDD_29_30 = $00020000;
|
VDD voltage 2.9 ~ 3.0
|
MMC_VDD_30_31 = $00040000;
|
VDD voltage 3.0 ~ 3.1
|
MMC_VDD_31_32 = $00080000;
|
VDD voltage 3.1 ~ 3.2
|
MMC_VDD_32_33 = $00100000;
|
VDD voltage 3.2 ~ 3.3
|
MMC_VDD_33_34 = $00200000;
|
VDD voltage 3.3 ~ 3.4
|
MMC_VDD_34_35 = $00400000;
|
VDD voltage 3.4 ~ 3.5
|
MMC_VDD_35_36 = $00800000;
|
VDD voltage 3.5 ~ 3.6
|
[Expand]
MMC switch mode value MMC_SWITCH_MODE_*
MMC_SWITCH_MODE_CMD_SET = $00;
|
Change the command set
|
MMC_SWITCH_MODE_SET_BITS = $01;
|
Set bits in EXT_CSD byte addressed by index which are 1 in value field
|
MMC_SWITCH_MODE_CLEAR_BITS = $02;
|
Clear bits in EXT_CSD byte addressed by index, which are 1 in value field
|
MMC_SWITCH_MODE_WRITE_BYTE = $03;
|
Set target byte to value
|
[Expand]
MMC EXT_CSD field EXT_CSD_*
EXT_CSD_ENH_START_ADDR = 136;
|
R/W
|
EXT_CSD_ENH_SIZE_MULT = 140;
|
R/W
|
EXT_CSD_GP_SIZE_MULT = 143;
|
R/W
|
EXT_CSD_PARTITION_SETTING = 155;
|
R/W
|
EXT_CSD_PARTITIONS_ATTRIBUTE = 156;
|
R/W
|
EXT_CSD_MAX_ENH_SIZE_MULT = 157;
|
R
|
EXT_CSD_PARTITIONING_SUPPORT = 160;
|
RO
|
EXT_CSD_RST_N_FUNCTION = 162;
|
R/W
|
EXT_CSD_WR_REL_PARAM = 166;
|
R
|
EXT_CSD_WR_REL_SET = 167;
|
R/W
|
EXT_CSD_RPMB_MULT = 168;
|
RO
|
EXT_CSD_ERASE_GROUP_DEF = 175;
|
R/W
|
EXT_CSD_BOOT_BUS_WIDTH = 177;
|
|
EXT_CSD_PART_CONF = 179;
|
R/W
|
EXT_CSD_BUS_WIDTH = 183;
|
R/W
|
EXT_CSD_HS_TIMING = 185;
|
R/W
|
EXT_CSD_REV = 192;
|
RO
|
EXT_CSD_CARD_TYPE = 196;
|
RO
|
EXT_CSD_SEC_CNT = 212;
|
RO, 4 bytes
|
EXT_CSD_HC_WP_GRP_SIZE = 221;
|
RO
|
EXT_CSD_HC_ERASE_GRP_SIZE = 224;
|
RO
|
EXT_CSD_BOOT_MULT = 226;
|
RO
|
[Expand]
MMC EXT_CSD field definition EXT_CSD_*
EXT_CSD_CMD_SET_NORMAL = (1 shl 0);
|
|
EXT_CSD_CMD_SET_SECURE = (1 shl 1);
|
|
EXT_CSD_CMD_SET_CPSECURE = (1 shl 2);
|
|
|
|
EXT_CSD_CARD_TYPE_26 = (1 shl 0);
|
Card can run at 26MHz
|
EXT_CSD_CARD_TYPE_52 = (1 shl 1);
|
Card can run at 52MHz
|
EXT_CSD_CARD_TYPE_DDR_1_8V = (1 shl 2);
|
|
EXT_CSD_CARD_TYPE_DDR_1_2V = (1 shl 3);
|
|
EXT_CSD_CARD_TYPE_DDR_52 = (EXT_CSD_CARD_TYPE_DDR_1_8V or EXT_CSD_CARD_TYPE_DDR_1_2V);
|
|
|
|
EXT_CSD_BUS_WIDTH_1 = 0;
|
Card is in 1 bit mode
|
EXT_CSD_BUS_WIDTH_4 = 1;
|
Card is in 4 bit mode
|
EXT_CSD_BUS_WIDTH_8 = 2;
|
Card is in 8 bit mode
|
EXT_CSD_DDR_BUS_WIDTH_4 = 5;
|
Card is in 4 bit DDR mode
|
EXT_CSD_DDR_BUS_WIDTH_8 = 6;
|
Card is in 8 bit DDR mode
|
|
|
EXT_CSD_BOOT_ACK_ENABLE = (1 shl 6);
|
|
EXT_CSD_BOOT_PARTITION_ENABLE = (1 shl 3);
|
|
EXT_CSD_PARTITION_ACCESS_ENABLE = (1 shl 0);
|
|
EXT_CSD_PARTITION_ACCESS_DISABLE = (0 shl 0);
|
|
|
|
EXT_CSD_PARTITION_SETTING_COMPLETED = (1 shl 0);
|
|
|
|
EXT_CSD_ENH_USR = (1 shl 0);
|
user data area is enhanced
|
|
|
EXT_CSD_HS_CTRL_REL = (1 shl 0);
|
host controlled WR_REL_SET
|
|
|
EXT_CSD_WR_DATA_REL_USR = (1 shl 0);
|
user data area WR_REL
|
[Expand]
MMC miscellaneous MMCPART_*, MMC_MAX_*
MMCPART_NOAVAILABLE = ($ff);
|
|
PART_ACCESS_MASK = ($07);
|
|
PART_SUPPORT = ($01);
|
|
ENHNCD_SUPPORT = ($02);
|
|
PART_ENH_ATTRIB = ($1f);
|
|
|
|
| Maximum block size for MMC
|
MMC_MAX_BLOCK_LEN = 512;
|
|
|
|
| Maximum block count for MMC
|
MMC_MAX_BLOCK_COUNT = 65535;
|
|
|
|
| The number of MMC physical partitions. These consist of: boot partitions (2), general purpose partitions (4) in MMC v4.4.
|
MMC_NUM_BOOT_PARTITION = 2;
|
|
MMC_PART_RPMB = 3;
|
RPMB partition number
|
[Expand]
MMC logging MMC_LOG_*
MMC_LOG_LEVEL_DEBUG = LOG_LEVEL_DEBUG;
|
MMC debugging messages
|
MMC_LOG_LEVEL_INFO = LOG_LEVEL_INFO;
|
MMC informational messages, such as a device being attached or detached
|
MMC_LOG_LEVEL_WARN = LOG_LEVEL_WARN;
|
MMC warning messages
|
MMC_LOG_LEVEL_ERROR = LOG_LEVEL_ERROR;
|
MMC error messages
|
MMC_LOG_LEVEL_NONE = LOG_LEVEL_NONE;
|
No MMC messages
|
[Expand]
SD specific constants SD_*
SD_DEFAULT_BLOCKSIZE = 512;
|
|
SD_DEFAULT_BLOCKSHIFT = 9;
|
|
[Expand]
SD bus width SD_BUS_WIDTH_*
SD_BUS_WIDTH_1 = 0;
|
|
SD_BUS_WIDTH_4 = 2;
|
|
[Expand]
SD bus speed (Hz) SD_BUS_SPEED_*
SD_BUS_SPEED_DEFAULT = 25000000;
|
|
SD_BUS_SPEED_HS = 50000000;
|
|
SD_BUS_SPEED_UHS_SDR12 = 25000000;
|
|
SD_BUS_SPEED_UHS_SDR25 = 50000000;
|
|
SD_BUS_SPEED_UHS_DDR50 = 50000000;
|
|
SD_BUS_SPEED_UHS_SDR50 = 100000000;
|
|
SD_BUS_SPEED_UHS_SDR104 = 208000000;
|
|
[Expand]
SD command SD_CMD_*
| From: /include/linux/mmc/sd.h
|
|
|
| Class 0
|
SD_CMD_SEND_RELATIVE_ADDR = 3;
|
|
SD_CMD_SEND_IF_COND = 8;
|
|
SD_CMD_SWITCH_VOLTAGE = 11;
|
|
|
|
| Class 10
|
SD_CMD_SWITCH = 6;
|
See: 4.3.10 Switch Function Command
|
|
|
| Class 5
|
SD_CMD_ERASE_WR_BLK_START = 32;
|
|
SD_CMD_ERASE_WR_BLK_END = 33;
|
|
|
|
| Application commands
|
SD_CMD_APP_SET_BUS_WIDTH = 6;
|
|
SD_CMD_APP_SD_STATUS = 13;
|
|
SD_CMD_APP_SEND_NUM_WR_BLKS = 22;
|
|
SD_CMD_APP_SEND_OP_COND = 41;
|
|
SD_CMD_APP_SEND_SCR = 51;
|
|
|
|
| SD_CMD_SWITCH argument format:
|
[31] Check (0) or switch (1)
|
|
[30:24] Reserved (0)
|
|
[23:20] Function group 6
|
|
[19:16] Function group 5
|
|
[15:12] Function group 4
|
|
[11:8] Function group 3
|
|
[7:4] Function group 2
|
|
[3:0] Function group 1
|
|
[Expand]
SD switch mode value SD_SWITCH_MODE_*
SD_SWITCH_MODE_CHECK = 0;
|
|
SD_SWITCH_MODE_SWITCH = 1;
|
|
[Expand]
SD switch function group SD_SWITCH_FUNCTION_GROUP_*
SD_SWITCH_FUNCTION_GROUP_ACCESS = 0;
|
Access Mode
|
SD_SWITCH_FUNCTION_GROUP_COMMAND = 1;
|
Command System
|
SD_SWITCH_FUNCTION_GROUP_DRIVER = 2;
|
Driver Strength
|
SD_SWITCH_FUNCTION_GROUP_POWER = 3;
|
Power Limit
|
[Expand]
SD switch access mode SD_SWITCH_ACCESS_MODE_*
SD_SWITCH_ACCESS_MODE_DEF = 0;
|
Default SDR12
|
SD_SWITCH_ACCESS_MODE_HS = 1;
|
High Speed SDR25
|
SD_SWITCH_ACCESS_MODE_SDR50 = 2;
|
SDR50 (1.8V only)
|
SD_SWITCH_ACCESS_MODE_SDR104 = 3;
|
SDR104 (1.8V only)
|
SD_SWITCH_ACCESS_MODE_DDR50 = 4;
|
DDR50 (1.8V only)
|
[Expand]
SD switch command system SD_SWITCH_COMMAND_SYSTEM_*
SD_SWITCH_COMMAND_SYSTEM_DEF = 0;
|
Default
|
SD_SWITCH_COMMAND_SYSTEM_EC = 1;
|
For eC
|
SD_SWITCH_COMMAND_SYSTEM_OTP = 3;
|
OTP
|
SD_SWITCH_COMMAND_SYSTEM_ASSD = 4;
|
ASSD
|
[Expand]
SD switch driver strength SD_SWITCH_DRIVER_STRENGTH_*
SD_SWITCH_DRIVER_STRENGTH_DEF = 0;
|
Default Type B
|
SD_SWITCH_DRIVER_STRENGTH_TYPE_A = 1;
|
Type A
|
SD_SWITCH_DRIVER_STRENGTH_TYPE_C = 2;
|
Type C
|
SD_SWITCH_DRIVER_STRENGTH_TYPE_D = 3;
|
Type D
|
[Expand]
SD switch power limit SD_SWITCH_POWER_LIMIT_*
SD_SWITCH_POWER_LIMIT_DEF = 0;
|
Default 0.72W
|
SD_SWITCH_POWER_LIMIT_144 = 1;
|
1.44W
|
SD_SWITCH_POWER_LIMIT_216 = 2;
|
2.16W (Embedded only)
|
SD_SWITCH_POWER_LIMIT_216 = 2;
|
2.16W (Embedded only)
|
SD_SWITCH_POWER_LIMIT_288 = 3;
|
2.88W (Embedded only)
|
SD_SWITCH_POWER_LIMIT_180 = 4;
|
1.80W
|
[Expand]
SD send interface condition value SD_SEND_IF_COND_*
SD_SEND_IF_COND_CHECK_PATTERN = $AA;
|
|
SD_SEND_IF_COND_VOLTAGE_MASK = $00FF8000;
|
MMC_VDD_27_28, MMC_VDD_28_29, MMC_VDD_29_30, MMC_VDD_30_31, MMC_VDD_31_32, MMC_VDD_32_33, MMC_VDD_33_34, MMC_VDD_34_35, MMC_VDD_35_36
|
|
|
| SD_CMD_SEND_IF_COND argument format:
|
[31:12] Reserved (0)
|
|
[11:8] Host Voltage Supply Flags
|
|
[7:0] Check Pattern (0xAA)
|
|
[Expand]
SD send operation condition value SD_SEND_OP_COND_*
SD_SEND_OP_COND_VOLTAGE_MASK = $00FF8000;
|
MMC_VDD_27_28, MMC_VDD_28_29, MMC_VDD_29_30, MMC_VDD_30_31, MMC_VDD_31_32, MMC_VDD_32_33, MMC_VDD_33_34, MMC_VDD_34_35, MMC_VDD_35_36
|
[Expand]
SD operation condition register value SD_OCR_*
| See: Section 5.1 of SD Physical Layer Simplified Specification V4.10
|
|
|
SD_OCR_CCS = $40000000;
|
Card Capacity Status - 0 = SDSC/1 = SDHC or SDXC
|
SD_OCR_CCS = $40000000;
|
Card Capacity Status - 0 = SDSC/1 = SDHC or SDXC
|
SD_OCR_UHS_II = $20000000;
|
UHS-II Card Status - 0 = Non UHS-II Card/1 = UHS-II Card
|
SD_OCR_XPC = $10000000;
|
SDXC Power Control
|
SD_OCR_S18A = $01000000;
|
1.8V Switching Accepted
|
[Expand]
SD CSD structure value SD_CSD_STRUCT_*
SD_CSD_STRUCT_VER_1_0 = 0;
|
Standard Capacity
|
SD_CSD_STRUCT_VER_2_0 = 1;
|
High Capacity and Extended Capacity
|
[Expand]
SD status register (SSR) value SD_SSR_*
| See: Section 4.10.2 of SD Physical Layer Simplified Specification Version 4.10
|
|
|
| SD SSR Fields
|
SD_SSR_DAT_BUS_WIDTH = 1;
|
|
SD_SSR_SECURED_MODE = 2;
|
|
SD_SSR_SD_CARD_TYPE = 3;
|
|
SD_SSR_SIZE_OF_PROTECTED_AREA = 4;
|
|
SD_SSR_SPEED_CLASS = 5;
|
|
SD_SSR_PERFORMANCE_MOVE = 6;
|
|
SD_SSR_AU_SIZE = 7;
|
|
SD_SSR_ERASE_SIZE = 8;
|
|
SD_SSR_ERASE_TIMEOUT = 9;
|
|
SD_SSR_ERASE_OFFSET = 10;
|
|
SD_SSR_UHS_SPEED_GRADE = 11;
|
|
SD_SSR_UHS_AU_SIZE = 12;
|
|
[Expand]
SD SSR bus width value SD_SSR_BUS_WIDTH_*
SD_SSR_BUS_WIDTH_1 = 0;
|
1 (default)
|
SD_SSR_BUS_WIDTH_4 = 2;
|
4 bit width
|
[Expand]
SD SSR card type value SD_SSR_CARD_TYPE_*
SD_SSR_CARD_TYPE_RW = $0000;
|
Regular SD RD/WR Card
|
SD_SSR_CARD_TYPE_ROM = $0001;
|
SD ROM Card
|
SD_SSR_CARD_TYPE_OTP = $0002;
|
OTP
|
[Expand]
SD SSR speed class value SD_SSR_SPEED_CLASS_*
SD_SSR_SPEED_CLASS_0 = $00;
|
Class 0
|
SD_SSR_SPEED_CLASS_2 = $01;
|
Class 2
|
SD_SSR_SPEED_CLASS_4 = $02;
|
Class 4
|
SD_SSR_SPEED_CLASS_6 = $03;
|
Class 6
|
SD_SSR_SPEED_CLASS_10 = $04;
|
Class 10
|
[Expand]
SD SSR AU size value SD_SSR_AU_SIZE_*
SD_SSR_AU_SIZE_VALUES:array[0..15] of LongWord = (
|
0,
|
Not Defined
|
$00004000,
|
16 KB
|
$00008000,
|
32 KB
|
$00010000,
|
64 KB
|
$00020000,
|
128 KB
|
$00040000,
|
256 KB
|
$00080000,
|
512 KB
|
$00100000,
|
1 MB
|
$00200000,
|
2 MB
|
$00400000,
|
4 MB
|
$00800000,
|
8 MB
|
$00800000 + $00400000,
|
12 MB
|
$01000000,
|
16 MB
|
$01000000 + $00800000,
|
24 MB
|
$02000000,
|
32 MB
|
$04000000);
|
64 MB
|
[Expand]
SD SSR UHS speed grade value SD_SSR_UHS_SPEED_*
SD_SSR_UHS_SPEED_GRADE_0 = 0;
|
Less than 10MB/sec
|
SD_SSR_UHS_SPEED_GRADE_1 = 1;
|
10MB/sec and above
|
[Expand]
SD SSR UHS AU size value SD_SSR_UHS_AU_SIZE_*
SD_SSR_UHS_AU_SIZE_VALUES:array[0..15] of LongWord = (
|
0,
|
Not Defined
|
0,
|
Not Used
|
0,
|
Not Used
|
0,
|
Not Used
|
0,
|
Not Used
|
0,
|
Not Used
|
0,
|
Not Used
|
$00100000,
|
1 MB
|
$00200000,
|
2 MB
|
$00400000,
|
4 MB
|
$00800000,
|
8 MB
|
$00800000 + $00400000,
|
12 MB
|
$01000000,
|
16 MB
|
$01000000 + $00800000,
|
24 MB
|
$02000000,
|
32 MB
|
$04000000);
|
64 MB
|
[Expand]
SD switch status value SD_SWITCH_*
| See: Section 4.3.10 of SD Physical Layer Simplified Specification Version 4.10
|
|
|
| SD Switch Fields
|
SD_SWITCH_MAXIMUM_CURRENT = 1;
|
|
SD_SWITCH_GROUP6_SUPPORT = 2;
|
|
SD_SWITCH_GROUP5_SUPPORT = 3;
|
|
SD_SWITCH_GROUP4_SUPPORT = 4;
|
|
SD_SWITCH_GROUP3_SUPPORT = 5;
|
|
SD_SWITCH_GROUP2_SUPPORT = 6;
|
|
SD_SWITCH_GROUP1_SUPPORT = 7;
|
|
SD_SWITCH_GROUP6_SELECTION = 8;
|
|
SD_SWITCH_GROUP5_SELECTION = 9;
|
|
SD_SWITCH_GROUP4_SELECTION = 10;
|
|
SD_SWITCH_GROUP3_SELECTION = 11;
|
|
SD_SWITCH_GROUP2_SELECTION = 12;
|
|
SD_SWITCH_GROUP1_SELECTION = 13;
|
|
SD_SWITCH_STRUCT_VERSION = 14;
|
|
SD_SWITCH_GROUP6_BUSY_STATUS = 15;
|
|
SD_SWITCH_GROUP5_BUSY_STATUS = 16;
|
|
SD_SWITCH_GROUP4_BUSY_STATUS = 17;
|
|
SD_SWITCH_GROUP3_BUSY_STATUS = 18;
|
|
SD_SWITCH_GROUP2_BUSY_STATUS = 19;
|
|
SD_SWITCH_GROUP1_BUSY_STATUS = 20;
|
|
|
|
| SD Switch Access Mode (Bus Speed) Support (Group 1)
|
SD_SWITCH_GROUP1_SDR12 = (1 shl 0);
|
|
SD_SWITCH_GROUP1_HS = (1 shl 1);
|
|
SD_SWITCH_GROUP1_SDR25 = (1 shl 1);
|
|
SD_SWITCH_GROUP1_SDR50 = (1 shl 2);
|
|
SD_SWITCH_GROUP1_SDR104 = (1 shl 3);
|
|
SD_SWITCH_GROUP1_DDR50 = (1 shl 4);
|
|
|
|
| SD Switch Driver Strength Support (Group 3)
|
SD_SWITCH_GROUP3_TYPE_B = (1 shl 0);
|
|
SD_SWITCH_GROUP3_TYPE_A = (1 shl 1);
|
|
SD_SWITCH_GROUP3_TYPE_C = (1 shl 2);
|
|
SD_SWITCH_GROUP3_TYPE_D = (1 shl 3);
|
|
|
|
| SD Switch Structure Versions
|
SD_SWITCH_STRUCT_VER_0 = 0;
|
Bits 511:376 are defined (SD_SWITCH_MAXIMUM_CURRENT to SD_SWITCH_GROUP1_SELECTION)
|
SD_SWITCH_STRUCT_VER_1 = 1;
|
Bits 511:272 are defined (SD_SWITCH_MAXIMUM_CURRENT to SD_SWITCH_GROUP1_BUSY_STATUS
|
[Expand]
SD configuration register (SCR) value SD_SCR_*
| See: Section 5.6 of SD Physical Layer Simplified Specification Version 4.10
|
|
|
| SD SCR Fields
|
SD_SCR_STRUCTURE = 1;
|
|
SD_SCR_SD_SPEC = 2;
|
|
SD_SCR_DATA_STAT_AFTER_ERASE = 3;
|
|
SD_SCR_SD_SECURITY = 4;
|
|
SD_SCR_SD_BUS_WIDTHS = 5;
|
|
SD_SCR_SD_SPEC3 = 6;
|
|
SD_SCR_EX_SECURITY = 7;
|
|
SD_SCR_SD_SPEC4 = 8;
|
|
SD_SCR_CMD_SUPPORT = 9;
|
|
[Expand]
SD SCR structure value SD_SCR_STRUCT_*
SD_SCR_STRUCT_VER_1_0 = 0;
|
Valid for system specification 1.01 - 4.0
|
[Expand]
SD SCR spec version value SD_SCR_SPEC_VER_*
SD_SCR_SPEC_VER_0 = 0;
|
Implements system specification 1.0 - 1.01
|
SD_SCR_SPEC_VER_1 = 1;
|
Implements system specification 1.10
|
SD_SCR_SPEC_VER_2 = 2;
|
Implements system specification 2.00-4.0X
|
[Expand]
SD SCR security value SD_SCR_SECURITY_*
SD_SCR_SECURITY_VER_0 = 0;
|
No Security
|
SD_SCR_SECURITY_VER_2 = 2;
|
SDSC Card (Security Version 1.01)
|
SD_SCR_SECURITY_VER_3 = 3;
|
SDHC Card (Security Version 2.00)
|
SD_SCR_SECURITY_VER_4 = 4;
|
SDXC Card (Security Version 3.xx)
|
[Expand]
SD SCR bus width value SD_SCR_BUS_WIDTH_*
SD_SCR_BUS_WIDTH_1 = (1 shl 0);
|
1 bit (DAT0)
|
SD_SCR_BUS_WIDTH_4 = (1 shl 2); {4 bit (DAT0-3)}
|
4 bit (DAT0-3)
|
[Expand]
SD SCR extended security value SD_SCR_EX_SECURITY_*
SD_SCR_EX_SECURITY_VER_0 = 0;
|
Extended Security is not supported
|
[Expand]
SD SCR command support value SD_SCR_*_SUPPORT
SD_SCR_CMD20_SUPPORT = (1 shl 0);
|
Mandatory for SDXC card
|
SD_SCR_CMD23_SUPPORT = (1 shl 1);
|
Mandatory for UHS104 card
|
SD_SCR_CMD48_49_SUPPORT = (1 shl 2);
|
Optional
|
SD_SCR_CMD58_59_SUPPORT = (1 shl 3);
|
Optional (If CMD58/59 is supported, CMD48/49 shall be supported)
|
[Expand]
SDIO command SDIO_CMD_*
| From: /include/linux/mmc/sdio.h
|
|
|
SDIO_CMD_SEND_OP_COND = 5;
|
|
SDIO_CMD_RW_DIRECT = 52;
|
|
SDIO_CMD_RW_EXTENDED = 53;
|
|
|
|
| SDIO_CMD_RW_DIRECT argument format:
|
[31] R/W flag
|
|
[30:28] Function number
|
|
[27] RAW flag
|
|
[25:9] Register address
|
|
[7:0] Data
|
|
|
|
| SDIO_CMD_RW_EXTENDED argument format:
|
[31] R/W flag
|
|
[30:28] Function number
|
|
[27] Block mode
|
|
[26] Increment address
|
|
[25:9] Register address
|
|
[8:0] Byte/block count
|
|
[Expand]
SDIO response value SDIO_RSP_*
| From: /include/linux/mmc/sdio.h
|
|
|
| R4
|
SDIO_RSP_R4_18V_PRESENT = (1 shl 24);
|
|
SDIO_RSP_R4_MEMORY_PRESENT = (1 shl 27);
|
|
|
|
| R5
|
SDIO_RSP_R5_COM_CRC_ERROR = (1 shl 15);
|
|
SDIO_RSP_R5_ILLEGAL_COMMAND = (1 shl 14);
|
|
SDIO_RSP_R5_ERROR = (1 shl 11);
|
|
SDIO_RSP_R5_FUNCTION_NUMBER = (1 shl 9);
|
|
SDIO_RSP_R5_OUT_OF_RANGE = (1 shl 8);
|
|
[Expand]
SDIO card common control registers (CCCR) SDIO_CCCR_*
SDIO_CCCR_CCCR = $00;
|
|
SDIO_CCCR_SD = $01;
|
|
SDIO_CCCR_IOEx = $02;
|
|
SDIO_CCCR_IORx = $03;
|
|
SDIO_CCCR_IENx = $04;
|
Function/Master Interrupt Enable
|
SDIO_CCCR_INTx = $05;
|
Function Interrupt Pending
|
SDIO_CCCR_ABORT = $06;
|
function abort/card reset
|
SDIO_CCCR_IF = $07;
|
bus interface controls
|
SDIO_CCCR_CAPS = $08;
|
|
SDIO_CCCR_CIS = $09;
|
common CIS pointer (3 bytes)
|
| Following 4 regs are valid only if SBS is set
|
SDIO_CCCR_SUSPEND = $0c;
|
|
SDIO_CCCR_SELx = $0d;
|
|
SDIO_CCCR_EXECx = $0e;
|
|
SDIO_CCCR_READYx = $0f;
|
|
SDIO_CCCR_BLKSIZE = $10;
|
|
SDIO_CCCR_POWER = $12;
|
|
SDIO_CCCR_SPEED = $13;
|
|
SDIO_CCCR_UHS = $14;
|
|
SDIO_CCCR_DRIVE_STRENGTH = $15;
|
|
[Expand]
SDIO revision SDIO_*_REV_*
| SDIO CCCR Register values
|
SDIO_CCCR_REV_1_00 = 0;
|
CCCR/FBR Version 1.00
|
SDIO_CCCR_REV_1_10 = 1;
|
CCCR/FBR Version 1.10
|
SDIO_CCCR_REV_1_20 = 2;
|
CCCR/FBR Version 1.20
|
SDIO_CCCR_REV_3_00 = 3;
|
CCCR/FBR Version 3.00
|
|
|
SDIO_SDIO_REV_1_00 = 0;
|
SDIO Spec Version 1.00
|
SDIO_SDIO_REV_1_10 = 1;
|
SDIO Spec Version 1.10
|
SDIO_SDIO_REV_1_20 = 2;
|
SDIO Spec Version 1.20
|
SDIO_SDIO_REV_2_00 = 3;
|
SDIO Spec Version 2.00
|
SDIO_SDIO_REV_3_00 = 4;
|
SDIO Spec Version 3.00
|
|
|
| SDIO CCCR SD Register values
|
SDIO_SD_REV_1_01 = 0;
|
SD Physical Spec Version 1.01
|
SDIO_SD_REV_1_10 = 1;
|
SD Physical Spec Version 1.10
|
SDIO_SD_REV_2_00 = 2;
|
SD Physical Spec Version 2.00
|
SDIO_SD_REV_3_00 = 3;
|
SD Physical Spev Version 3.00
|
[Expand]
SDIO bus width SDIO_BUS_*
| SDIO CCCR IF Register values
|
SDIO_BUS_WIDTH_MASK = $03;
|
data bus width setting
|
SDIO_BUS_WIDTH_1BIT = $00;
|
|
SDIO_BUS_WIDTH_RESERVED = $01;
|
|
SDIO_BUS_WIDTH_4BIT = $02;
|
|
SDIO_BUS_ECSI = $20;
|
Enable continuous SPI interrupt
|
SDIO_BUS_SCSI = $40;
|
Support continuous SPI interrupt
|
|
|
SDIO_BUS_ASYNC_INT = $20;
|
|
|
|
SDIO_BUS_CD_DISABLE = $80;
|
disable pull-up on DAT3 (pin 1)
|
[Expand]
SDIO CCCR caps register value SDIO_CCCR_CAP_*
SDIO_CCCR_CAP_SDC = $01;
|
can do CMD52 while data transfer
|
SDIO_CCCR_CAP_SMB = $02;
|
can do multi-block xfers (CMD53)
|
SDIO_CCCR_CAP_SRW = $04;
|
supports read-wait protocol
|
SDIO_CCCR_CAP_SBS = $08;
|
supports suspend/resume
|
SDIO_CCCR_CAP_S4MI = $10;
|
interrupt during 4-bit CMD53
|
SDIO_CCCR_CAP_E4MI = $20;
|
enable ints during 4-bit CMD53
|
SDIO_CCCR_CAP_LSC = $40;
|
low speed card
|
SDIO_CCCR_CAP_4BLS = $80;
|
4 bit low speed card
|
[Expand]
SDIO CCCR power register value SDIO_POWER_*
SDIO_POWER_SMPC = $01;
|
Supports Master Power Control
|
SDIO_POWER_EMPC = $02;
|
Enable Master Power Control
|
[Expand]
SDIO CCCR speed register value SDIO_SPEED_*
SDIO_SPEED_SHS = $01;
|
Supports High-Speed mode
|
SDIO_SPEED_BSS_SHIFT = 1;
|
|
SDIO_SPEED_BSS_MASK = (7 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR12 = (0 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR25 = (1 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR50 = (2 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_SDR104 = (3 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_DDR50 = (4 shl SDIO_SPEED_BSS_SHIFT);
|
|
SDIO_SPEED_EHS = SDIO_SPEED_SDR25;
|
Enable High-Speed
|
[Expand]
SDIO CCCR UHS register value SDIO_UHS_*
SDIO_UHS_SDR50 = $01;
|
|
SDIO_UHS_SDR104 = $02;
|
|
SDIO_UHS_DDR50 = $04;
|
|
[Expand]
SDIO CCCR drive strength register value SDIO_DRIVE_*
SDIO_SDTx_MASK = $07;
|
|
SDIO_DRIVE_SDTA = (1 shl 0);
|
|
SDIO_DRIVE_SDTC = (1 shl 1);
|
|
SDIO_DRIVE_SDTD = (1 shl 2);
|
|
SDIO_DRIVE_DTSx_MASK = $03;
|
|
SDIO_DRIVE_DTSx_SHIFT = 4;
|
|
SDIO_DTSx_SET_TYPE_B = (0 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
SDIO_DTSx_SET_TYPE_A = (1 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
SDIO_DTSx_SET_TYPE_C = (2 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
SDIO_DTSx_SET_TYPE_D = (3 shl SDIO_DRIVE_DTSx_SHIFT);
|
|
[Expand]
SDIO function basic register (FBR) SDIO_FBR_*
SDIO_FBR_BASE(f) ((f) * $100)
|
base of function f's FBRs
|
SDIO_FBR_STD_IF = $00;
|
|
SDIO_FBR_STD_IF_EXT = $01;
|
|
SDIO_FBR_POWER = $02;
|
|
SDIO_FBR_CIS = $09;
|
CIS pointer (3 bytes)
|
SDIO_FBR_CSA = $0C;
|
CSA pointer (3 bytes)
|
SDIO_FBR_BLKSIZE = $10;
|
block size (2 bytes)
|
|
|
| SDIO FBR IF Register values
|
SDIO_FBR_SUPPORTS_CSA = $40;
|
supports Code Storage Area
|
SDIO_FBR_ENABLE_CSA = $80;
|
enable Code Storage Area
|
|
|
| SDIO FBR POWER Register values
|
SDIO_FBR_POWER_SPS = $01;
|
Supports Power Selection
|
SDIO_FBR_POWER_EPS = $02;
|
Enable (low) Power Selection
|
[Expand]
SDHCI specific constants SDHCI_*
SDHCI_NAME_PREFIX = 'SDHCI';
|
Name prefix for SDHCI Devices
|
[Expand]
SDHCI host type SDHCI_TYPE_*
SDHCI_TYPE_NONE = 0;
|
|
SDHCI_TYPE_MMC = 1;
|
An MMC specification host controller
|
SDHCI_TYPE_SD = 2;
|
An SD specification host controller
|
SDHCI_TYPE_MMCI = 3;
|
An MMCI specification host controller
|
|
|
SDHCI_TYPE_MAX = 3;
|
|
|
|
| SDHCI Type Names
|
SDHCI_TYPE_NAMES:array[SDHCI_TYPE_NONE..SDHCI_TYPE_MAX] of String = (
|
'SDHCI_TYPE_NONE',
|
|
'SDHCI_TYPE_MMC',
|
|
'SDHCI_TYPE_SD',
|
|
'SDHCI_TYPE_MMCI');
|
|
[Expand]
SDHCI host state SDHCI_STATE_*
SDHCI_STATE_DISABLED = 0;
|
|
SDHCI_STATE_ENABLED = 1;
|
|
|
|
SDHCI_STATE_MAX = 1;
|
|
|
|
| SDHCI State Names
|
SDHCI_STATE_NAMES:array[SDHCI_STATE_DISABLED..SDHCI_STATE_MAX] of String = (
|
'SDHCI_STATE_DISABLED',
|
|
'SDHCI_STATE_ENABLED');
|
|
[Expand]
SDHCI host flag SDHCI_FLAG_*
SDHCI_FLAG_NONE = $00000000;
|
|
SDHCI_FLAG_SDMA = $00000001;
|
|
SDHCI_FLAG_ADMA = $00000002;
|
|
SDHCI_FLAG_SPI = $00000004;
|
|
SDHCI_FLAG_CRC_ENABLE = $00000008;
|
|
SDHCI_FLAG_NON_STANDARD = $00000010;
|
Host Controller uses a non standard interface (not supporting SDHCI register layout)
|
SDHCI_FLAG_AUTO_CMD12 = $00000020;
|
Host Controller supports Auto CMD12 (Stop Transmission)
|
SDHCI_FLAG_AUTO_CMD23 = $00000040;
|
Host Controller supports Auto CMD23 (Set Block Count)
|
[Expand]
SDHCI controller register SDHCI_DMA_*, SDHCI_BLOCK_*
SDHCI_DMA_ADDRESS = $00;
|
|
SDHCI_BLOCK_SIZE = $04;
|
|
SDHCI_BLOCK_COUNT = $06;
|
|
SDHCI_ARGUMENT = $08;
|
|
SDHCI_TRANSFER_MODE = $0C;
|
|
SDHCI_COMMAND = $0E;
|
|
SDHCI_RESPONSE = $10;
|
|
SDHCI_BUFFER = $20;
|
|
SDHCI_PRESENT_STATE = $24;
|
|
SDHCI_HOST_CONTROL = $28;
|
|
SDHCI_POWER_CONTROL = $29;
|
|
SDHCI_BLOCK_GAP_CONTROL = $2A;
|
|
SDHCI_WAKE_UP_CONTROL = $2B;
|
|
SDHCI_CLOCK_CONTROL = $2C;
|
|
SDHCI_TIMEOUT_CONTROL = $2E;
|
|
SDHCI_SOFTWARE_RESET = $2F;
|
|
SDHCI_INT_STATUS = $30;
|
|
SDHCI_INT_ENABLE = $34;
|
|
SDHCI_SIGNAL_ENABLE = $38;
|
|
SDHCI_ACMD12_ERR = $3C;
|
|
| 3E-3F reserved
|
SDHCI_CAPABILITIES = $40;
|
|
SDHCI_CAPABILITIES_1 = $44;
|
|
SDHCI_MAX_CURRENT = $48;
|
|
| 4C-4F reserved for more max current
|
SDHCI_SET_ACMD12_ERROR = $50;
|
|
SDHCI_SET_INT_ERROR = $52;
|
|
SDHCI_ADMA_ERROR = $54;
|
|
| 55-57 reserved
|
SDHCI_ADMA_ADDRESS = $58;
|
|
| 60-FB reserved
|
SDHCI_SLOT_INT_STATUS = $FC;
|
|
SDHCI_HOST_VERSION = $FE;
|
|
[Expand]
SDHCI transfer mode SDHCI_TRNS_*
SDHCI_TRNS_DMA = $01;
|
|
SDHCI_TRNS_BLK_CNT_EN = $02;
|
|
SDHCI_TRNS_AUTO_CMD12 = $04;
|
SDHCI_TRNS_ACMD12
|
SDHCI_TRNS_AUTO_CMD23 = $08;
|
|
SDHCI_TRNS_READ = $10;
|
|
SDHCI_TRNS_MULTI = $20;
|
|
[Expand]
SDHCI command value SDHCI_CMD_*
SDHCI_CMD_RESP_MASK = $03;
|
|
SDHCI_CMD_CRC = $08;
|
|
SDHCI_CMD_INDEX = $10;
|
|
SDHCI_CMD_DATA = $20;
|
|
SDHCI_CMD_ABORTCMD = $C0;
|
|
[Expand]
SDHCI command response value SDHCI_CMD_RESP_*
SDHCI_CMD_RESP_NONE = $00;
|
|
SDHCI_CMD_RESP_LONG = $01;
|
|
SDHCI_CMD_RESP_SHORT = $02;
|
|
SDHCI_CMD_RESP_SHORT_BUSY = $03;
|
|
[Expand]
SDHCI present state value SDHCI_DATA_*, SDHCI_CARD_*
SDHCI_CMD_INHIBIT = $00000001;
|
|
SDHCI_DATA_INHIBIT = $00000002;
|
|
SDHCI_DOING_WRITE = $00000100;
|
|
SDHCI_DOING_READ = $00000200;
|
|
SDHCI_SPACE_AVAILABLE = $00000400;
|
|
SDHCI_DATA_AVAILABLE = $00000800;
|
|
SDHCI_CARD_PRESENT = $00010000;
|
|
SDHCI_CARD_STATE_STABLE = $00020000;
|
|
SDHCI_CARD_DETECT_PIN_LEVEL = $00040000;
|
|
SDHCI_WRITE_PROTECT = $00080000;
|
Set if Write Enabled/Clear if Write Protected
|
[Expand]
SDHCI host control value SDHCI_CTRL_*
SDHCI_CTRL_LED = $01;
|
|
SDHCI_CTRL_4BITBUS = $02;
|
|
SDHCI_CTRL_HISPD = $04;
|
|
SDHCI_CTRL_DMA_MASK = $18;
|
|
SDHCI_CTRL_SDMA = $00;
|
|
SDHCI_CTRL_ADMA1 = $08;
|
|
SDHCI_CTRL_ADMA32 = $10;
|
|
SDHCI_CTRL_ADMA64 = $18;
|
|
SDHCI_CTRL_8BITBUS = $20;
|
|
SDHCI_CTRL_CD_TEST_INS = $40;
|
|
SDHCI_CTRL_CD_TEST = $80;
|
|
[Expand]
SDHCI power control value SDHCI_POWER_*
SDHCI_POWER_ON = $01;
|
|
SDHCI_POWER_180 = $0A;
|
|
SDHCI_POWER_300 = $0C;
|
|
SDHCI_POWER_330 = $0E;
|
|
[Expand]
SDHCI wakeup control value SDHCI_WAKE_*
SDHCI_WAKE_ON_INT = $01;
|
|
SDHCI_WAKE_ON_INSERT = $02;
|
|
SDHCI_WAKE_ON_REMOVE = $04;
|
|
[Expand]
SDHCI clock control value SDHCI_CLOCK_*
SDHCI_DIVIDER_SHIFT = 8;
|
|
SDHCI_DIVIDER_HI_SHIFT = 6;
|
|
SDHCI_DIV_MASK = $FF;
|
|
SDHCI_DIV_MASK_LEN = 8;
|
|
SDHCI_DIV_HI_MASK = $0300;
|
|
SDHCI_CLOCK_CARD_EN = $0004;
|
|
SDHCI_CLOCK_INT_STABLE = $0002;
|
|
SDHCI_CLOCK_INT_EN = $0001;
|
|
[Expand]
SDHCI software reset value SDHCI_RESET_*
SDHCI_RESET_ALL = $01;
|
|
SDHCI_RESET_CMD = $02;
|
|
SDHCI_RESET_DATA = $04;
|
|
[Expand]
SDHCI interrupt value SDHCI_INT_*
SDHCI_INT_RESPONSE = $00000001;
|
|
SDHCI_INT_DATA_END = $00000002;
|
|
SDHCI_INT_BLK_GAP = $00000004;
|
|
SDHCI_INT_DMA_END = $00000008;
|
|
SDHCI_INT_SPACE_AVAIL = $00000010;
|
|
SDHCI_INT_DATA_AVAIL = $00000020;
|
|
SDHCI_INT_CARD_INSERT = $00000040;
|
|
SDHCI_INT_CARD_REMOVE = $00000080;
|
|
SDHCI_INT_CARD_INT = $00000100;
|
|
SDHCI_INT_ERROR = $00008000;
|
|
SDHCI_INT_TIMEOUT = $00010000;
|
|
SDHCI_INT_CRC = $00020000;
|
|
SDHCI_INT_END_BIT = $00040000;
|
|
SDHCI_INT_INDEX = $00080000;
|
|
SDHCI_INT_DATA_TIMEOUT = $00100000;
|
|
SDHCI_INT_DATA_CRC = $00200000;
|
|
SDHCI_INT_DATA_END_BIT = $00400000;
|
|
SDHCI_INT_BUS_POWER = $00800000;
|
|
SDHCI_INT_ACMD12ERR = $01000000;
|
|
SDHCI_INT_ADMA_ERROR = $02000000;
|
|
|
|
SDHCI_INT_NORMAL_MASK = $00007FFF;
|
|
SDHCI_INT_ERROR_MASK = $FFFF8000;
|
|
|
|
SDHCI_INT_CMD_MASK = (SDHCI_INT_RESPONSE or SDHCI_INT_TIMEOUT or SDHCI_INT_CRC or SDHCI_INT_END_BIT or SDHCI_INT_INDEX);
|
SDHCI_INT_DATA_MASK = (SDHCI_INT_DATA_END or SDHCI_INT_DMA_END or SDHCI_INT_DATA_AVAIL or SDHCI_INT_SPACE_AVAIL or SDHCI_INT_DATA_TIMEOUT or SDHCI_INT_DATA_CRC or SDHCI_INT_DATA_END_BIT or SDHCI_INT_ADMA_ERROR or SDHCI_INT_BLK_GAP);
|
SDHCI_INT_ALL_MASK = (LongWord(-1));
|
|
[Expand]
SDHCI capabilities value SDHCI_*_MASK*, SDHCI_*SHIFT
SDHCI_TIMEOUT_CLK_MASK = $0000003F;
|
|
SDHCI_TIMEOUT_CLK_SHIFT = 0;
|
|
SDHCI_TIMEOUT_CLK_UNIT = $00000080;
|
|
SDHCI_CLOCK_BASE_MASK = $00003F00;
|
|
SDHCI_CLOCK_V3_BASE_MASK = $0000FF00;
|
|
SDHCI_CLOCK_BASE_SHIFT = 8;
|
|
SDHCI_CLOCK_BASE_MULTIPLIER = 1000000;
|
|
SDHCI_MAX_BLOCK_MASK = $00030000;
|
|
SDHCI_MAX_BLOCK_SHIFT = 16;
|
|
SDHCI_CAN_DO_8BIT = $00040000;
|
|
SDHCI_CAN_DO_ADMA2 = $00080000;
|
|
SDHCI_CAN_DO_ADMA1 = $00100000;
|
|
SDHCI_CAN_DO_HISPD = $00200000;
|
|
SDHCI_CAN_DO_SDMA = $00400000;
|
|
SDHCI_CAN_VDD_330 = $01000000;
|
|
SDHCI_CAN_VDD_300 = $02000000;
|
|
SDHCI_CAN_VDD_180 = $04000000;
|
|
SDHCI_CAN_64BIT = $10000000;
|
|
[Expand]
SDHCI host version value SDHCI_*_VER_*
SDHCI_VENDOR_VER_MASK = $FF00;
|
|
SDHCI_VENDOR_VER_SHIFT = 8;
|
|
SDHCI_SPEC_VER_MASK = $00FF;
|
|
SDHCI_SPEC_VER_SHIFT = 0;
|
|
SDHCI_SPEC_100 = 0;
|
|
SDHCI_SPEC_200 = 1;
|
|
SDHCI_SPEC_300 = 2;
|
|
[Expand]
SDHCI clock divider SDHCI_MAX_CLOCK_DIV_*
SDHCI_MAX_CLOCK_DIV_SPEC_200 = 256;
|
|
SDHCI_MAX_CLOCK_DIV_SPEC_300 = 2046;
|
|
[Expand]
SDHCI quirks/bug SDHCI_QUIRK*
| From: U-Boot sdhci.h
|
|
|
*SDHCI_QUIRK_32BIT_DMA_ADDR = (1 shl 0);
|
See: SDHCI_QUIRK_32BIT_DMA_ADDR below
|
SDHCI_QUIRK_REG32_RW = (1 shl 1);
|
|
SDHCI_QUIRK_BROKEN_R1B = (1 shl 2);
|
|
SDHCI_QUIRK_NO_HISPD_BIT = (1 shl 3);
|
See: SDHCI_QUIRK_NO_HISPD_BIT below
|
SDHCI_QUIRK_BROKEN_VOLTAGE = (1 shl 4);
|
Use SDHCI_QUIRK_MISSING_CAPS instead
|
SDHCI_QUIRK_NO_CD = (1 shl 5);
|
See: SDHCI_QUIRK_BROKEN_CARD_DETECTION below
|
SDHCI_QUIRK_WAIT_SEND_CMD = (1 shl 6);
|
|
SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER = (1 shl 7);
|
See: SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER below
|
SDHCI_QUIRK_USE_WIDE8 = (1 shl 8);
|
|
SDHCI_QUIRK_MISSING_CAPS = (1 shl 9);
|
See: SDHCI_QUIRK_MISSING_CAPS below*
|
|
|
| From Linux /include/linux/mmc/sdhci.h
|
SDHCI_QUIRK_CLOCK_BEFORE_RESET = (1 shl 0);
|
Controller doesn't honor resets unless we touch the clock register
|
SDHCI_QUIRK_FORCE_DMA = (1 shl 1);
|
Controller has bad caps bits, but really supports DMA
|
SDHCI_QUIRK_NO_CARD_NO_RESET = (1 shl 2);
|
Controller doesn't like to be reset when there is no card inserted
|
SDHCI_QUIRK_SINGLE_POWER_WRITE = (1 shl 3);
|
Controller doesn't like clearing the power reg before a change
|
SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS = (1 shl 4);
|
Controller has flaky internal state so reset it on each ios change
|
SDHCI_QUIRK_BROKEN_DMA = (1 shl 5);
|
Controller has an unusable DMA engine
|
SDHCI_QUIRK_BROKEN_ADMA = (1 shl 6);
|
Controller has an unusable ADMA engine
|
SDHCI_QUIRK_32BIT_DMA_ADDR = (1 shl 7);
|
Controller can only DMA from 32-bit aligned addresses
|
SDHCI_QUIRK_32BIT_DMA_SIZE = (1 shl 8);
|
Controller can only DMA chunk sizes that are a multiple of 32 bits
|
SDHCI_QUIRK_32BIT_ADMA_SIZE = (1 shl 9);
|
Controller can only ADMA chunks that are a multiple of 32 bits
|
SDHCI_QUIRK_RESET_AFTER_REQUEST = (1 shl 10);
|
Controller needs to be reset after each request to stay stable
|
SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER = (1 shl 11);
|
Controller needs voltage and power writes to happen separately
|
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL = (1 shl 12);
|
Controller provides an incorrect timeout value for transfers
|
SDHCI_QUIRK_BROKEN_SMALL_PIO = (1 shl 13);
|
Controller has an issue with buffer bits for small transfers
|
SDHCI_QUIRK_NO_BUSY_IRQ = (1 shl 14);
|
Controller does not provide transfer-complete interrupt when not busy
|
SDHCI_QUIRK_BROKEN_CARD_DETECTION = (1 shl 15);
|
Controller has unreliable card detection
|
SDHCI_QUIRK_INVERTED_WRITE_PROTECT = (1 shl 16);
|
Controller reports inverted write-protect state
|
SDHCI_QUIRK_PIO_NEEDS_DELAY = (1 shl 18);
|
Controller does not like fast PIO transfers
|
SDHCI_QUIRK_FORCE_BLK_SZ_2048 = (1 shl 20);
|
Controller has to be forced to use block size of 2048 bytes
|
SDHCI_QUIRK_NO_MULTIBLOCK = (1 shl 21);
|
Controller cannot do multi-block transfers
|
SDHCI_QUIRK_FORCE_1_BIT_DATA = (1 shl 22);
|
Controller can only handle 1-bit data transfers
|
SDHCI_QUIRK_DELAY_AFTER_POWER = (1 shl 23);
|
Controller needs 10ms delay between applying power and clock
|
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK = (1 shl 24);
|
Controller uses SDCLK instead of TMCLK for data timeouts
|
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN = (1 shl 25);
|
Controller reports wrong base clock capability
|
SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC = (1 shl 26);
|
Controller cannot support End Attribute in NOP ADMA descriptor
|
SDHCI_QUIRK_MISSING_CAPS = (1 shl 27);
|
Controller is missing device caps. Use caps provided by host
|
SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 = (1 shl 28);
|
Controller uses Auto CMD12 command to stop the transfer
|
SDHCI_QUIRK_NO_HISPD_BIT = (1 shl 29);
|
Controller doesn't have HISPD bit field in HI-SPEED SD card
|
SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC = (1 shl 30);
|
Controller treats ADMA descriptors with length 0000h incorrectly
|
SDHCI_QUIRK_UNSTABLE_RO_DETECT = (1 shl 31);
|
The read-only detection via SDHCI_PRESENT_STATE register is unstable
|
|
|
| SDHCI More Quirks/Bugs
|
| From Linux /include/linux/mmc/sdhci.h
|
SDHCI_QUIRK2_HOST_OFF_CARD_ON = (1 shl 0);
|
|
SDHCI_QUIRK2_HOST_NO_CMD23 = (1 shl 1);
|
|
SDHCI_QUIRK2_NO_1_8_V = (1 shl 2);
|
The system physically doesn't support 1.8v, even if the host does
|
SDHCI_QUIRK2_PRESET_VALUE_BROKEN = (1 shl 3);
|
|
SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON = (1 shl 4);
|
|
SDHCI_QUIRK2_BROKEN_HOST_CONTROL = (1 shl 5);
|
Controller has a non-standard host control register
|
SDHCI_QUIRK2_BROKEN_HS200 = (1 shl 6);
|
Controller does not support HS200
|
SDHCI_QUIRK2_BROKEN_DDR50 = (1 shl 7);
|
Controller does not support DDR50
|
SDHCI_QUIRK2_STOP_WITH_TC = (1 shl 8);
|
Stop command(CMD12) can set Transfer Complete when not using MMC_RSP_BUSY
|
|
|
| Additions from U-Boot
|
SDHCI_QUIRK2_REG32_RW = (1 shl 28);
|
Controller requires all register reads and writes as 32bit
|
SDHCI_QUIRK2_BROKEN_R1B = (1 shl 29);
|
Response type R1B is broken
|
SDHCI_QUIRK2_WAIT_SEND_CMD = (1 shl 30);
|
Controller requires a delay between each command write
|
SDHCI_QUIRK2_USE_WIDE8 = (1 shl 31);
|
|
[Expand]
SDHCI host SDMA buffer boundary SDHCI_DEFAULT_BOUNDARY_*
| Valid values from 4K to 512K in powers of 2
|
|
|
SDHCI_DEFAULT_BOUNDARY_SIZE = (512 * 1024);
|
|
SDHCI_DEFAULT_BOUNDARY_ARG = (7);
|
|
[Expand]
SDHCI timeout value SDHCI_TIMEOUT_VALUE*
SDHCI_TIMEOUT_VALUE = $0E;
|
|
Type definitions
MMC command
[Expand]
PMMCCommand = ^TMMCCommand;
TMMCCommand = record
| Command Properties
|
Command:Word;
|
|
Argument:LongWord;
|
|
ResponseType:LongWord;
|
|
Response:array[0..3] of LongWord;
|
|
Status:LongWord;
|
|
Data:PMMCData;
|
|
| Host Properties
|
DataCompleted:Boolean;
|
|
BusyCompleted:Boolean;
|
|
TuningCompleted:Boolean;
|
|
CommandCompleted:Boolean;
|
|
MMC data
[Expand]
PMMCData = ^TMMCData;
TMMCData = record
| Data Properties
|
Data:Pointer;
|
|
Flags:LongWord;
|
|
BlockSize:LongWord;
|
|
BlockCount:LongWord;
|
|
| Host Properties
|
BlockOffset:LongWord;
|
|
BlocksRemaining:LongWord;
|
|
BytesRemaining:LongWord;
|
|
BytesTransfered:LongWord;
|
|
MMC card identification data (CID)
[Expand]
PMMCCardIdentificationData = ^TMMCCardIdentificationData;
TMMCCardIdentificationData = record
| Note: See: Section 5.2 of SD Physical Layer Simplified Specification Version 4.10
|
ManufacturerId:Byte;
|
|
OEMId:Word;
|
|
ProductName:array[0..7] of Char;
|
Max 0 to 6, 1 extra for null terminator
|
ProductRevision:Byte;
|
|
HardwareRevision:Byte;
|
|
FirmwareRevision:Byte;
|
|
ProductSerialNumber:LongWord;
|
|
ManufacturingMonth:Byte;
|
|
ManufacturingYear:Word;
|
|
CRC:Byte;
|
CRC7 checksum
|
MMC card specific erase data (CSD)
[Expand]
TMMCCardSpecificSDEraseData = record
| Note: See: Section 5.3 of SD Physical Layer Simplified Specification Version 4.10 (Defined here for CSD)
|
EraseBlockEnable:Boolean;
|
Erase single block enable
|
SectorSize:Byte;
|
Erase sector size
|
MMC card specific MMC22 erase data
[Expand]
TMMCCardSpecificMMC22EraseData = record
SectorSize:Byte;
|
Erase sector size
|
EraseGroupSize:Byte;
|
Erase group size
|
MMC card specific MMC31 erase data
[Expand]
TMMCCardSpecificMMC31EraseData = record
EraseGroupSize:Byte;
|
Erase group size
|
EraseGroupMultiplier:Byte;
|
Erase group size multiplier
|
MMC card specific erase data
[Expand]
TMMCCardSpecificEraseData = record
case Integer of
|
|
0:(MMC22:TMMCCardSpecificMMC22EraseData);
|
|
1:(MMC31:TMMCCardSpecificMMC31EraseData);
|
|
2:(SD:TMMCCardSpecificSDEraseData);
|
|
MMC card specific data
[Expand]
PMMCCardSpecificData = ^TMMCCardSpecificData;
TMMCCardSpecificData = record
| Card Values
|
CSDStructure:Byte;
|
CSD structure version
|
SpecVersion:Byte;
|
System specification version (MMC/eMMC Only)
|
TAAC:Byte;
|
Data read access-time-1
|
NSAC:Byte;
|
Data read access-time-2 in CLK cycles (NSAC*100)
|
TransferSpeed:Byte;
|
Max. data transfer rate
|
CCC:Word;
|
Card command classes
|
ReadBlockLength:Byte;
|
Max. read data block length
|
ReadBlockPartial:Boolean;
|
Partial blocks for read allowed
|
WriteBlockMisalign:Boolean;
|
Write block misalignment
|
ReadBlockMisalign:Boolean;
|
Read block misalignment
|
DSRImplemented:Boolean;
|
DSR implemented
|
DeviceSize:Word;
|
Device size
|
VDDReadCurrentMin:Byte;
|
Max. read current @VDD min
|
VDDReadCurrentMax:Byte;
|
Max. read current @VDD max
|
VDDWriteCurrentMin:Byte;
|
Max. write current @VDD min
|
VDDWriteCurrentMax:Byte;
|
Max. write current @VDD max
|
DeviceSizeMultiplier:Byte;
|
Device size multiplier
|
Erase:TMMCCardSpecificEraseData;
|
Erase group details
|
WriteProtectGroupSize:Byte;
|
Write protect group size
|
WriteProtectGroupEnable:Boolean;
|
Write protect group enable
|
DefaultECC:Byte;
|
Manufacturer default ECC (MMC/eMMC Only)
|
ReadToWriteFactor:Byte;
|
Write speed factor
|
WriteBlockLength:Byte;
|
Max. write data block length
|
WriteBlockPartial:Boolean;
|
Partial blocks for write allowed
|
ContentProtectApplication:Boolean;
|
Content protection application (MMC/eMMC Only)
|
FileFormatGroup:Byte;
|
File format group
|
CopyFlag:Boolean;
|
Copy flag
|
PermanentWriteProtect:Boolean;
|
Permanent write protection
|
TemporaryWriteProtect:Boolean;
|
Temporary write protection
|
FileFormat:Byte;
|
File format
|
ECC:Byte;
|
ECC code (MMC/eMMC Only)
|
CRC:Byte;
|
CRC
|
| Calculated Values
|
DataAccessTime:LongWord;
|
In Nanoseconds
|
DataAccessClocks:Word;
|
In Clock cycles
|
DataTransferRate:LongWord;
|
In Hz
|
EraseSize:LongWord;
|
In Sectors
|
BlockSize:LongWord;
|
"Normalized" Block Size
|
BlockCount:LongWord;
|
In "Normalized" Blocks
|
BlockShift:LongWord;
|
"Normalized" Block Shift
|
SD status data (SSR)
[Expand]
PSDStatusData = ^TSDStatusData;
TSDStatusData = record
| Note: See: Section 4.10.2 of SD Physical Layer Simplified Specification Version 4.10 (Defined here for MMC Device)
|
| Card Values
|
BusWidth:Byte;
|
Shows the currently defined data bus width that was defined by SET_BUS_WIDTH command
|
SecuredMode:Boolean;
|
Card is in Secured Mode of operation (refer to the "Part 3 Security Specification")
|
CardType:Word;
|
In the future, the 8 LSBs will be used to define different variations of an SD Memory Card (Each bit will define different SD Types). The 8 MSBs will be used to define SD Cards that do not comply with the Physical Layer Specification
|
ProtectedSize:LongWord;
|
Size of protected area
|
SpeedClass:Byte;
|
Speed Class of the card
|
PerformanceMove:Byte;
|
Performance of move indicated by 1 [MB/s] step
|
EraseSize:Word;
|
Number of AUs to be erased at a time
|
EraseTimeout:Byte;
|
Timeout value for erasing areas specified by UNIT_OF_ERASE_AU
|
EraseOffset:Byte;
|
Fixed offset value added to erase time
|
UHSSpeedGrade:Byte;
|
Speed Grade for UHS mode
|
| Calculated Values
|
AllocationUnitSize:Byte;
|
Size of Allocation Unit
|
UHSAllocationUnitSize:Byte;
|
Size of Allocation Unit for UHS mode
|
SD switch data
[Expand]
PSDSwitchData = ^TSDSwitchData;
TSDSwitchData = record
| Note: See: Section 4.3.10 of SD Physical Layer Simplified Specification Version 4.10
|
| Card Values
|
MaximumCurrent:Word;
|
Maximum Current/Power Consumption
|
Group6Support:Word;
|
Support Bits of Functions in Function Group 6
|
Group5Support:Word;
|
Support Bits of Functions in Function Group 5
|
Group4Support:Word;
|
Support Bits of Functions in Function Group 4
|
Group3Support:Word;
|
Support Bits of Functions in Function Group 3
|
Group2Support:Word;
|
Support Bits of Functions in Function Group 2
|
Group1Support:Word;
|
Support Bits of Functions in Function Group 1
|
Group6Selection:Byte;
|
Function Selection of Function Group 6
|
Group5Selection:Byte;
|
Function Selection of Function Group 5
|
Group4Selection:Byte;
|
Function Selection of Function Group 4
|
Group3Selection:Byte;
|
Function Selection of Function Group 3
|
Group2Selection:Byte;
|
Function Selection of Function Group 2
|
Group1Selection:Byte;
|
Function Selection of Function Group 1
|
StructureVersion:Byte;
|
Data Structure Version
|
Group6BusyStatus:Word;
|
Busy Status of functions in group 6
|
Group5BusyStatus:Word;
|
Busy Status of functions in group 5
|
Group4BusyStatus:Word;
|
Busy Status of functions in group 4
|
Group3BusyStatus:Word;
|
Busy Status of functions in group 3
|
Group2BusyStatus:Word;
|
Busy Status of functions in group 2
|
Group1BusyStatus:Word;
|
Busy Status of functions in group 1
|
SD configuration data (SCR)
[Expand]
PSDConfigurationData = ^TSDConfigurationData;
TSDConfigurationData = record
| Note: See: Section 5.6 of SD Physical Layer Simplified Specification Version 4.10 (Defined here for MMC Device)
|
| Card Values
|
SCRStructure:Byte;
|
SCR Structure version
|
SpecVersion:Byte;
|
SD Memory Card - Spec. Version
|
DataAfterErase:Byte;
|
Data status after erases
|
Security:Byte;
|
CPRM Security Support
|
SpecVersion3:Boolean;
|
Spec. Version 3.00 or higher
|
ExtendedSecurity:Byte;
|
Extended Security Support
|
SpecVersion4:Boolean;
|
Spec. Version 4.00 or higher
|
CommandSupport:Byte;
|
Command Support bits
|
| Calculated Values
|
ErasedByte:Byte;
|
Value after Erase
|
MMC enumeration callback
TMMCEnumerate = function(MMC:PMMCDevice; Data:Pointer):LongWord;
|
|
MMC notification callback
TMMCNotification = function(Device:PDevice; Data:Pointer; Notification:LongWord):LongWord;
|
|
MMC device initialize
TMMCDeviceInitialize = function(MMC:PMMCDevice):LongWord;
|
|
MMC device deinitialize
TMMCDeviceDeinitialize = function(MMC:PMMCDevice):LongWord;
|
|
MMC device get card detect
TMMCDeviceGetCardDetect = function(MMC:PMMCDevice):LongWord;
|
|
MMC device get write protect
TMMCDeviceGetWriteProtect = function(MMC:PMMCDevice):LongWord;
|
|
MMC device send command
TMMCDeviceSendCommand = function(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
|
|
MMC device set IOS
TMMCDeviceSetIOS = function(MMC:PMMCDevice):LongWord;
|
|
MMC device types
[Expand]
PMMCDevice = ^TMMCDevice;
TMMCDevice = record
| Device Properties
|
Device:TDevice;
|
The Device entry for this MMC
|
| MMC Properties
|
MMCId:LongWord;
|
Unique Id of this MMC in the MMC table
|
MMCState:LongWord;
|
MMC state (eg MMC_STATE_INSERTED)
|
DeviceInitialize:TMMCDeviceInitialize;
|
A Device specific DeviceInitialize method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceDeinitialize:TMMCDeviceDeinitialize;
|
A Device specific DeviceDeinitialize method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceGetCardDetect:TMMCDeviceGetCardDetect;
|
A Device specific DeviceGetCardDetect method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceGetWriteProtect:TMMCDeviceGetWriteProtect;
|
A Device specific DeviceGetWriteProtect method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceSendCommand:TMMCDeviceSendCommand;
|
A Device specific DeviceSendCommand method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceSetIOS:TMMCDeviceSetIOS;
|
A Device specific DeviceSetIOS method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
| Statistics Properties
|
CommandCount:LongWord;
|
|
CommandErrors:LongWord;
|
|
| Driver Properties
|
Lock:TMutexHandle;
|
Device lock
|
Version:LongWord;
|
|
Clock:LongWord;
|
|
Timing:LongWord;
|
|
BusWidth:LongWord;
|
|
Voltages:LongWord;
|
|
Capabilities:LongWord;
|
|
| Register Properties
|
| See: Table 3-2: SD Memory Card Registers of SD Physical Layer Simplified Specification Version 4.10
|
InterfaceCondition:LongWord;
|
Interface Condition Result
|
OperationCondition:LongWord;
|
Operation Condition Register (OCR) See: Section 5.1 of SD Physical Layer Simplified Specification Version 4.10
|
RelativeCardAddress:LongWord;
|
Relative Card Address (RCA) (Word) See: Section 5.4 of SD Physical Layer Simplified Specification Version 4.10
|
CardSpecific:array[0..3] of LongWord;
|
Card Specific Data (CSD) See: Section 5.3 of SD Physical Layer Simplified Specification Version 4.10
|
CardIdentification:array[0..3] of LongWord;
|
Card Identification Data (CID) See: Section 5.2 of SD Physical Layer Simplified Specification Version 4.10
|
CardStatus:LongWord;
|
Card Status Register (CSR) See: Section 4.10.1 of SD Physical Layer Simplified Specification Version 4.10
|
DriverStage:LongWord;
|
Driver Stage Register (DSR) (Word) See: Section 5.5 of SD Physical Layer Simplified Specification Version 4.10
|
SDStatus:array[0..15] of LongWord;
|
SD Status Register (SSR) See: Section 4.10.2 of SD Physical Layer Simplified Specification Version 4.10
|
SDSwitch:array[0..15] of LongWord;
|
SD Switch Status See: Section 4.3.10 of SD Physical Layer Simplified Specification Version 4.10
|
SDConfiguration:array[0..1] of LongWord;
|
SD Configuration Register (SCR) See: Section 5.6 of SD Physical Layer Simplified Specification Version 4.10
|
| Configuration Properties
|
CardSpecificData:TMMCCardSpecificData;
|
|
CardIdentificationData:TMMCCardIdentificationData;
|
|
SDStatusData:TSDStatusData;
|
|
SDSwitchData:TSDSwitchData;
|
|
SDConfigurationData:TSDConfigurationData;
|
|
| Storage Properties
|
Storage:PStorageDevice;
|
The Storage entry for this MMC (Where Applicable)
|
| Internal Properties
|
Prev:PMMCDevice;
|
Previous entry in MMC table
|
Next:PMMCDevice;
|
Next entry in MMC table
|
SDHCI enumeration callback
TSDHCIEnumerate = function(SDHCI:PSDHCIHost; Data:Pointer):LongWord;
|
|
SDHCI notification callback
TSDHCINotification = function(Device:PDevice; Data:Pointer; Notification:LongWord):LongWord;
|
|
SDHCI host start
TSDHCIHostStart = function(SDHCI:PSDHCIHost):LongWord;
|
|
SDHCI host stop
TSDHCIHostStop = function(SDHCI:PSDHCIHost):LongWord;
|
|
SDHCI host read byte
TSDHCIHostReadByte = function(SDHCI:PSDHCIHost; Reg:LongWord):Byte;
|
|
SDHCI host read word
TSDHCIHostReadWord = function(SDHCI:PSDHCIHost; Reg:LongWord):Word;
|
|
SDHCI host read long
TSDHCIHostReadLong = function(SDHCI:PSDHCIHost; Reg:LongWord):LongWord;
|
|
SDHCI host write byte
TSDHCIHostWriteByte = procedure(SDHCI:PSDHCIHost; Reg:LongWord; Value:Byte);
|
|
SDHCI host write word
TSDHCIHostWriteWord = procedure(SDHCI:PSDHCIHost; Reg:LongWord; Value:Word);
|
|
SDHCI host write long
TSDHCIHostWriteLong = procedure(SDHCI:PSDHCIHost; Reg:LongWord; Value:LongWord);
|
|
SDHCI host set clock divider
TSDHCIHostSetClockDivider = function(SDHCI:PSDHCIHost; Index:Integer; Divider:LongWord):LongWord;
|
|
SDHCI host set control register
TSDHCIHostSetControlRegister = function(SDHCI:PSDHCIHost):LongWord;
|
|
SDHCI host types
[Expand]
PSDHCIHost = ^TSDHCIHost;
TSDHCIHost = record
| Device Properties
|
Device:TDevice;
|
The Device entry for this SDHCI
|
| SDHCI Properties
|
SDHCIId:LongWord;
|
Unique Id of this SDHCI in the SDHCI table
|
SDHCIState:LongWord;
|
SDHCI state (eg SDHCI_STATE_ENABLED)
|
HostStart:TSDHCIHostStart;
|
A Host specific HostStart method implementing a standard SDHCI host interface
|
HostStop:TSDHCIHostStop;
|
A Host specific HostStop method implementing a standard SDHCI host interface
|
HostReadByte:TSDHCIHostReadByte;
|
A Host specific HostReadByte method implementing a standard SDHCI host interface (Or nil if the default method is suitable)
|
HostReadWord:TSDHCIHostReadWord;
|
A Host specific HostReadWord method implementing a standard SDHCI host interface (Or nil if the default method is suitable)
|
HostReadLong:TSDHCIHostReadLong;
|
A Host specific HostReadLong method implementing a standard SDHCI host interface (Or nil if the default method is suitable)
|
HostWriteByte:TSDHCIHostWriteByte;
|
A Host specific HostWriteByte method implementing a standard SDHCI host interface (Or nil if the default method is suitable)
|
HostWriteWord:TSDHCIHostWriteWord;
|
A Host specific HostWriteWord method implementing a standard SDHCI host interface (Or nil if the default method is suitable)
|
HostWriteLong:TSDHCIHostWriteLong;
|
A Host specific HostWriteLong method implementing a standard SDHCI host interface (Or nil if the default method is suitable)
|
HostSetClockDivider:TSDHCIHostSetClockDivider;
|
|
HostSetControlRegister:TSDHCIHostSetControlRegister;
|
|
DeviceInitialize:TMMCDeviceInitialize;
|
A Device specific DeviceInitialize method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceDeinitialize:TMMCDeviceDeinitialize;
|
A Device specific DeviceDeinitialize method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceGetCardDetect:TMMCDeviceGetCardDetect;
|
A Device specific DeviceGetCardDetect method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceGetWriteProtect:TMMCDeviceGetWriteProtect;
|
A Device specific DeviceGetWriteProtect method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceSendCommand:TMMCDeviceSendCommand;
|
A Device specific DeviceSendCommand method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
DeviceSetIOS:TMMCDeviceSetIOS;
|
A Device specific DeviceSetIOS method implementing a standard MMC device interface (Or nil if the default method is suitable)
|
| Driver Properties
|
Lock:TMutexHandle;
|
Host lock
|
Address:Pointer;
|
Host register base address
|
Version:LongWord;
|
Host version information
|
Quirks:LongWord;
|
Host quirks/bugs flags
|
Quirks2:LongWord;
|
Host additional quirks/bugs flags
|
Clock:LongWord;
|
Host current clock
|
BusWidth:LongWord;
|
Host current bus width
|
Interrupts:LongWord;
|
Host interrupts to be handled
|
Voltages:LongWord;
|
Host configured voltage flags
|
Capabilities:LongWord;
|
Host configured capabilities flags
|
MinimumFrequency:LongWord;
|
Host configured minimum frequency
|
MaximumFrequency:LongWord;
|
Host configured maximum frequency
|
MaximumBlockCount:LongWord;
|
Host configured maximum block count
|
Command:PMMCCommand;
|
Currently processing command
|
Wait:TSemaphoreHandle;
|
Command completed semaphore
|
| Configuration Properties
|
PresetVoltages:LongWord;
|
Host predefined voltage flags
|
PresetCapabilities:LongWord;
|
Host predefined capabilities flags
|
ClockMinimum:LongWord;
|
Host predefined minimum clock frequency
|
ClockMaximum:LongWord;
|
Host predefined maximum clock frequency
|
DriverStageRegister:LongWord;
|
Host predefined driver stage register (DSR)
|
| Statistics Properties
|
InterruptCount:LongWord;
|
Number of interrupt requests received by the host
|
| Internal Properties
|
Prev:PSDHCIHost;
|
Previous entry in SDHCI table
|
Next:PSDHCIHost;
|
Next entry in SDHCI table
|
Public variables
MMC logging
MMC_DEFAULT_LOG_LEVEL:LongWord = MMC_LOG_LEVEL_DEBUG;
|
Minimum level for MMC messages. Only messages with level greater than or equal to this will be printed.
|
Function declarations
Initialization functions
[Expand]
procedure MMCInit;
Description: To be documented
[Expand]
function MMCStart:LongWord;
Description: To be documented
[Expand]
function MMCStop:LongWord;
Description: To be documented
[Expand]
procedure MMCAsyncStart(SDHCI:PSDHCIHost);
Description: To be documented
MMC functions
[Expand]
function MMCDeviceReadBlocks(MMC:PMMCDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Description: To be documented
[Expand]
function MMCDeviceWriteBlocks(MMC:PMMCDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Description: To be documented
[Expand]
function MMCDeviceEraseBlocks(MMC:PMMCDevice; const Start,Count:Int64):LongWord;
Description: To be documented
[Expand]
function MMCDeviceGoIdle(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSetClock(MMC:PMMCDevice; Clock:LongWord):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSetBusWidth(MMC:PMMCDevice; Width:LongWord):LongWord;
Description: To be documented
| Reference
|
Section 3.4 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf
|
[Expand]
function MMCDeviceSetBlockLength(MMC:PMMCDevice; Length:LongWord):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSetBlockCount(MMC:PMMCDevice; Count:LongWord; Relative:Boolean):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSetDriverStage(MMC:PMMCDevice; DriverStage:LongWord):LongWord;
Description: To be documented
[Expand]
function MMCDeviceStopTransmission(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSelectCard(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceDeselectCard(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSwitch(MMC:PMMCDevice; Setting,Index,Value:Byte):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSendCardStatus(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSendOperationCondition(MMC:PMMCDevice; Probe:Boolean):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSendCardSpecific(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceDecodeCardSpecific(MMC:PMMCDevice):LongWord;
Description: Given a 128-bit response, decode to our card CSD structure
[Expand]
function MMCDeviceSendCardIdentification(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSendAllCardIdentification(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceDecodeCardIdentification(MMC:PMMCDevice):LongWord;
Description: Given a 128-bit response, decode to our card CID structure
[Expand]
function MMCDeviceGetExtendedCardSpecific(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSendExtendedCardSpecific(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceDecodeExtendedCardSpecific(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSetRelativeAddress(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSPISetCRC(MMC:PMMCDevice; Enable:Boolean):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSPIReadOperationCondition(MMC:PMMCDevice; HighCapacity:Boolean):LongWord;
Description: To be documented
[Expand]
function MMCDeviceInsert(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceRemove(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceInitialize(MMC:PMMCDevice):LongWord;
Description: To be documented
| Reference
|
Section 3.6 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf
|
[Expand]
function MMCDeviceDeinitialize(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceGetCardDetect(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceGetWriteProtect(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSendCommand(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
Description: To be documented
[Expand]
function MMCDeviceSetIOS(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function MMCDeviceCreate:PMMCDevice;
Description: Create a new MMC entry
| Return
|
Pointer to new MMC entry or nil if MMC could not be created
|
[Expand]
function MMCDeviceCreateEx(Size:LongWord):PMMCDevice;
Description: Create a new MMC entry
| Size
|
Size in bytes to allocate for new MMC (Including the MMC entry)
|
| Return
|
Pointer to new MMC entry or nil if MMC could not be created
|
[Expand]
function MMCDeviceDestroy(MMC:PMMCDevice):LongWord;
Description: Destroy an existing MMC entry
[Expand]
function MMCDeviceRegister(MMC:PMMCDevice):LongWord;
Description: Register a new MMC in the MMC table
[Expand]
function MMCDeviceDeregister(MMC:PMMCDevice):LongWord;
Description: Deregister a MMC from the MMC table
[Expand]
function MMCDeviceFind(MMCId:LongWord):PMMCDevice;
Description: To be documented
[Expand]
function MMCDeviceFindByDevice(Device:PDevice):PMMCDevice;
Description: Find an MMC/SD device by the matching DeviceData property
| Device
|
The device entry to match with the DeviceData value
|
| Return
|
The MMC/SD device matched or nil if none found
|
[Expand]
function MMCDeviceFindByName(const Name:String):PMMCDevice; inline;
Description: To be documented
[Expand]
function MMCDeviceFindByDescription(const Description:String):PMMCDevice; inline;
Description: To be documented
[Expand]
function MMCDeviceEnumerate(Callback:TMMCEnumerate; Data:Pointer):LongWord;
Description: To be documented
[Expand]
function MMCDeviceNotification(MMC:PMMCDevice; Callback:TMMCNotification; Data:Pointer; Notification,Flags:LongWord):LongWord;
Description: To be documented
SD functions
[Expand]
function SDDeviceSwitch(MMC:PMMCDevice; Mode,Group:Integer; Value:Byte; Buffer:Pointer):LongWord;
Description: To be documented
| Buffer
|
Buffer must point to a 64 byte buffer for Switch Status information
|
| Note
|
See 4.3.10 of SD Physical Layer Simplified Specification V4.10
|
[Expand]
function SDDeviceSwitchHighspeed(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceSetBusSpeed(MMC:PMMCDevice; Speed:LongWord):LongWord;
Description: To be documented
[Expand]
function SDDeviceSetBusWidth(MMC:PMMCDevice; Width:LongWord):LongWord;
Description: To be documented
| Note
|
See Table 4-30 in Section 4.7.4 of SD Physical Layer Simplified Specification V4.10
|
[Expand]
function SDDeviceSendInterfaceCondition(MMC:PMMCDevice):LongWord;
Description: To be documented
| Note
|
See 4.3.13 of SD Physical Layer Simplified Specification V4.10. CMD8 (SEND_IF_COND) must be invoked to support SD 2.0 cards. The card must be in Idle State before issuing this command. This command will fail harmlessly for SD 1.0 cards.
|
[Expand]
function SDDeviceSendOperationCondition(MMC:PMMCDevice; Probe:Boolean):LongWord;
Description: To be documented
| Note
|
See 4.2.3.1 of SD Physical Layer Simplified Specification V4.10
|
[Expand]
function SDDeviceGetCardSpecific(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceDecodeCardSpecific(MMC:PMMCDevice):LongWord;
Description: Given a 128-bit response, decode to our card CSD structure
[Expand]
function SDDeviceGetCardIdentification(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceDecodeCardIdentification(MMC:PMMCDevice):LongWord;
Description: Given a 128-bit response, decode to our card CID structure
[Expand]
function SDDeviceSendSDStatus(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceDecodeSDStatus(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceSendSDSwitch(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceDecodeSDSwitch(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceSendSDConfiguration(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceDecodeSDConfiguration(MMC:PMMCDevice):LongWord;
Description: Given a 64-bit response, decode to our card SCR structure
[Expand]
function SDDeviceSendRelativeAddress(MMC:PMMCDevice):LongWord;
Description: To be documented
[Expand]
function SDDeviceSendApplicationCommand(MMC:PMMCDevice; Command:PMMCCommand):LongWord;
Description: To be documented
SDIO functions
[Expand]
function SDIODeviceReset(MMC:PMMCDevice):LongWord;
Description: To be documented
| Note
|
See SDIO Simplified Specification V2.0, 4.4 Reset for SDIO
|
[Expand]
function SDIODeviceSendOperationCondition(MMC:PMMCDevice; Probe:Boolean):LongWord;
Description: To be documented
[Expand]
function SDIODeviceReadWriteDirect(MMC:PMMCDevice; Write:Boolean; Operation,Address:LongWord; Input:Byte; Output:PByte):LongWord;
Description: To be documented
[Expand]
function SDIODeviceReadWriteExtended(MMC:PMMCDevice; Write:Boolean; Operation,Address:LongWord; Increment:Boolean; Buffer:Pointer; BlockCount,BlockSize:LongWord):LongWord;
Description: To be documented
SDHCI functions
[Expand]
function SDHCIHostReset(SDHCI:PSDHCIHost; Mask:Byte):LongWord;
Description: To be documented
| Reference
|
Section 3.3 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf
|
[Expand]
function SDHCIHostSetPower(SDHCI:PSDHCIHost; Power:Word):LongWord;
Description: To be documented
| Reference
|
Section 3.3 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf
|
[Expand]
function SDHCIHostSetClock(SDHCI:PSDHCIHost; Clock:LongWord):LongWord;
Description: To be documented
| Reference
|
Section 3.2 of SD Host Controller Simplified Specification V3.0 partA2_300.pdf
|
[Expand]
function SDHCIHostTransferPIO(SDHCI:PSDHCIHost):LongWord;
Description: To be documented
[Expand]
function SDHCIHostTransferDMA(SDHCI:PSDHCIHost):LongWord;
Description: To be documented
[Expand]
function SDHCIHostFinishCommand(SDHCI:PSDHCIHost):LongWord;
Description: Called by Interrupt Command handler when an SDHCI_INT_RESPONSE is received
[Expand]
function SDHCIHostFinishData(SDHCI:PSDHCIHost):LongWord;
Description: Called by Interrupt Data handler when data is received
[Expand]
function SDHCIHostCommandInterrupt(SDHCI:PSDHCIHost; InterruptMask:LongWord; var ReturnMask:LongWord):LongWord;
Description: To be documented
[Expand]
function SDHCIHostDataInterrupt(SDHCI:PSDHCIHost; InterruptMask:LongWord):LongWord;
Description: To be documented
[Expand]
function SDHCIHostStart(SDHCI:PSDHCIHost):LongWord;
Description: To be documented
[Expand]
function SDHCIHostStop(SDHCI:PSDHCIHost):LongWord;
Description: To be documented
[Expand]
function SDHCIHostReadByte(SDHCI:PSDHCIHost; Reg:LongWord):Byte; inline;
Description: To be documented
[Expand]
function SDHCIHostReadWord(SDHCI:PSDHCIHost; Reg:LongWord):Word; inline;
Description: To be documented
[Expand]
function SDHCIHostReadLong(SDHCI:PSDHCIHost; Reg:LongWord):LongWord; inline;
Description: To be documented
[Expand]
procedure SDHCIHostWriteByte(SDHCI:PSDHCIHost; Reg:LongWord; Value:Byte); inline;
Description: To be documented
[Expand]
procedure SDHCIHostWriteWord(SDHCI:PSDHCIHost; Reg:LongWord; Value:Word); inline;
Description: To be documented
[Expand]
procedure SDHCIHostWriteLong(SDHCI:PSDHCIHost; Reg:LongWord; Value:LongWord); inline;
Description: To be documented
[Expand]
function SDHCIHostSetClockDivider(SDHCI:PSDHCIHost; Index:Integer; Divider:LongWord):LongWord;
Description: To be documented
[Expand]
function SDHCIHostSetControlRegister(SDHCI:PSDHCIHost):LongWord;
Description: To be documented
[Expand]
function SDHCIHostCreate:PSDHCIHost;
Description: Create a new SDHCI entry
| Return
|
Pointer to new SDHCI entry or nil if SDHCI could not be created
|
[Expand]
function SDHCIHostCreateEx(Size:LongWord):PSDHCIHost;
Description: Create a new SDHCI entry
| Size
|
Size in bytes to allocate for new SDHCI (Including the SDHCI entry)
|
| Return
|
Pointer to new SDHCI entry or nil if SDHCI could not be created
|
[Expand]
function SDHCIHostDestroy(SDHCI:PSDHCIHost):LongWord;
Description: Destroy an existing SDHCI entry
[Expand]
function SDHCIHostRegister(SDHCI:PSDHCIHost):LongWord;
Description: Register a new SDHCI in the SDHCI table
[Expand]
function SDHCIHostDeregister(SDHCI:PSDHCIHost):LongWord;
Description: Deregister a SDHCI from the SDHCI table
[Expand]
function SDHCIHostFind(SDHCIId:LongWord):PSDHCIHost;
Description: To be documented
[Expand]
function SDHCIHostEnumerate(Callback:TSDHCIEnumerate; Data:Pointer):LongWord;
Description: To be documented
[Expand]
function SDHCIHostNotification(SDHCI:PSDHCIHost; Callback:TSDHCINotification; Data:Pointer; Notification,Flags:LongWord):LongWord;
Description: To be documented
MMC helper functions
[Expand]
function MMCGetCount:LongWord; inline;
Description: Get the current MMC count
[Expand]
function MMCDeviceCheck(MMC:PMMCDevice):PMMCDevice;
Description: Check if the supplied MMC is in the MMC table
[Expand]
function MMCIsSD(MMC:PMMCDevice):Boolean;
Description: To be documented
[Expand]
function MMCGetCIDValue(MMC:PMMCDevice; Version,Value:LongWord):LongWord;
Description: Extract a CID field value from the 128 bit Card Identification register
[Expand]
function MMCGetCSDValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Description: Extract a CSD field value from the 128 bit Card Specific register
[Expand]
function MMCGetExtendedCSDValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Description: Extract an Extended CSD field value from the 512 byte Extended Card Specific register
[Expand]
function MMCExtractBits(Buffer:Pointer; Start,Size:LongWord):LongWord;
Description: To be documented
| Start
|
Start is the starting bit to extract
|
| Size
|
Size is the number of bits to extract
|
| Note
|
Start is the LSB so to extract 8 bits from 127 to 120 then Start would be 120 and Size would be 8
|
[Expand]
function MMCExtractBitsEx(Buffer:Pointer; Length,Start,Size:LongWord):LongWord;
Description: To be documented
| Length
|
Length is the size of the buffer in LongWords
|
| Start
|
Start is the starting bit to extract
|
| Size
|
Size is the number of bits to extract
|
| Note
|
Start is the LSB so to extract 8 bits from 127 to 120 then Start would be 120 and Size would be 8. For a 128 bit buffer (16 bytes) Length would be 4. For a 512 bit buffer (64 bytes) Length would be 16.
|
[Expand]
function MMCIsMultiCommand(Command:Word):Boolean;
Description: To be documented
[Expand]
function MMCStatusToString(Status:LongWord):String;
Description: Translates an MMC status code into a string describing it
[Expand]
function MMCDeviceTypeToString(MMCType:LongWord):String;
Description: To be documented
[Expand]
function MMCDeviceStateToString(MMCState:LongWord):String;
Description: To be documented
[Expand]
procedure MMCLog(Level:LongWord; MMC:PMMCDevice; const AText:String);
Description: To be documented
[Expand]
procedure MMCLogInfo(MMC:PMMCDevice; const AText:String); inline;
Description: To be documented
[Expand]
procedure MMCLogWarn(MMC:PMMCDevice; const AText:String); inline;
Description: To be documented
[Expand]
procedure MMCLogError(MMC:PMMCDevice; const AText:String); inline;
Description: To be documented
[Expand]
procedure MMCLogDebug(MMC:PMMCDevice; const AText:String); inline;
Description: To be documented
SD helper functions
[Expand]
function SDGetMaxClock(MMC:PMMCDevice):LongWord;
Description: Determine the Maximum Clock (DTR) for the current card
[Expand]
function SDGetCIDValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Description: Extract a CID field value from the 128 bit Card Identification register
[Expand]
function SDGetCSDValue(MMC:PMMCDevice; Version,Value:LongWord):LongWord;
Description: Extract a CSD field value from the 128 bit Card Specific register
[Expand]
function SDGetSCRValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Description: Extract an SCR field value from the 64 bit SD Configuration register
[Expand]
function SDGetSSRValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Description: Extract an SCR field value from the 512 bit SD Status register
[Expand]
function SDGetSwitchValue(MMC:PMMCDevice; Value:LongWord):LongWord;
Description: Extract a Switch field value from the 512 bit SD Switch status
SDHCI helper functions
[Expand]
function SDHCIGetCount:LongWord; inline;
Description: Get the current SDHCI count
[Expand]
function SDHCIHostCheck(SDHCI:PSDHCIHost):PSDHCIHost;
Description: Check if the supplied SDHCI is in the SDHCI table
[Expand]
function SDHCIIsSPI(SDHCI:PSDHCIHost):Boolean;
Description: To be documented
[Expand]
function SDHCIGetVersion(SDHCI:PSDHCIHost):Word;
Description: To be documented
[Expand]
function SDHCIGetCommand(Command:Word):Word;
Description: To be documented
[Expand]
function SDHCIMakeCommand(Command,Flags:Word):Word;
Description: To be documented
[Expand]
function SDHCIMakeBlockSize(DMA,BlockSize:Word):Word;
Description: To be documented
[Expand]
function SDHCIDeviceTypeToString(SDHCIType:LongWord):String;
Description: To be documented
[Expand]
function SDHCIDeviceStateToString(SDHCIState:LongWord):String;
Description: To be documented
MMC storage functions
[Expand]
function MMCStorageDeviceRead(Storage:PStorageDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Description: To be documented
[Expand]
function MMCStorageDeviceWrite(Storage:PStorageDevice; const Start,Count:Int64; Buffer:Pointer):LongWord;
Description: To be documented
[Expand]
function MMCStorageDeviceErase(Storage:PStorageDevice; const Start,Count:Int64):LongWord;
Description: To be documented
[Expand]
function MMCStorageDeviceControl(Storage:PStorageDevice; Request:Integer; Argument1:LongWord; var Argument2:LongWord):LongWord;
Description: To be documented
Return to Unit Reference
