Unit PlatformQEMUVPB

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Description

Ultibo Platform interface unit for QEMU VersatilePB

To be documented

Constants


QEMUVPB specific constants QEMUVPB_*
QEMUVPB_STARTUP_ADDRESS = $00010000; Address of StartupHandler on Reset


QEMUVPB page table QEMUVPB_PAGE_TABLE_*
QEMUVPB_PAGE_TABLE_BASE = $00004000; Place the first level Page Table after the interrupt vectors at 0x00001000 and before the code start at 0x00010000
QEMUVPB_PAGE_TABLE_SIZE = SIZE_16K; ARMv7 first level Page Table is exactly 16KB in size (4096 32 bit (4 byte) entries)


QEMUVPB vector table QEMUVPB_VECTOR_TABLE_*
QEMUVPB_VECTOR_TABLE_BASE = $00001000; Place the Interrupt Vector Table at 0x00001000 before the code start at 0x00010000
QEMUVPB_VECTOR_TABLE_SIZE = SIZE_64; The Interrupt Vector Table is exactly 64 bytes (16 32 bit (4 byte) entries)
QEMUVPB_VECTOR_TABLE_COUNT = 8; The Interrupt Vector Table contains 8 entries on an ARMv7 device


QEMUVPB CPU count QEMUVPB_CPU_*
QEMUVPB_CPU_COUNT = VERSATILEPB_CPU_COUNT;  
QEMUVPB_CPU_BOOT = CPU_ID_0;  
QEMUVPB_CPU_MASK = CPU_AFFINITY_0;  


QEMUVPB SWI QEMUVPB_SWI_*
QEMUVPB_SWI_COUNT = 256; Number of available SWI entries


QEMUVPB kernel name QEMUVPB_KERNEL_*
QEMUVPB_KERNEL_NAME = 'kernel.bin';  
QEMUVPB_KERNEL_NAME = 'kernel64.bin';  
QEMUVPB_KERNEL_CONFIG = ; Not available as a file
QEMUVPB_KERNEL_COMMAND = ; Not available as a file


Type definitions


PL110 CLCD registers

PPL110CLCDRegisters = ^TPL110CLCDRegisters;

TPL110CLCDRegisters = record

Note: Layout of the PL110 registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html)
TIMING0:LongWord; Horizontal Axis Panel Control Register
TIMING1:LongWord; Vertical Axis Panel Control Register
TIMING2:LongWord; Clock and Signal Polarity Control Register
TIMING3:LongWord; Line End Control Register
UPBASE:LongWord; Upper Panel Frame Base Address Registers
LPBASE:LongWord; Lower Panel Frame Base Address Registers
CONTROL:LongWord; Control Register Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM
IMSC:LongWord; Interrupt Mask Set/Clear Register Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM
RIS:LongWord; Raw Interrupt Status Register
MIS:LongWord; Masked Interrupt Status Register
ICR:LongWord; Interrupt Clear Register
UPCURR:LongWord; Upper Panel Current Address Value Registers
LPCURR:LongWord; Lower Panel Current Address Value Registers

PL110 framebuffer

PPL110Framebuffer = ^TPL110Framebuffer;

TPL110Framebuffer = record

Framebuffer Properties
Framebuffer:TFramebufferDevice;  
PL110 Properties
Mode:LongWord; PL110 framebuffer mode (eg PL110_MODE_TFT)
Depth:LongWord; Framebuffer color depth (eg FRAMEBUFFER_DEPTH_16)
Width:LongWord; Framebuffer width in pixels
Height:LongWord; Framebuffer height in pixels
Rotation:LongWord; Framebuffer rotation (eg FRAMEBUFFER_ROTATION_180)
Driver Properties
Control:LongWord; Preset Control register value
Timing0:LongWord; Preset Timing0 register value
Timing1:LongWord; Preset Timing1 register value
Timing2:LongWord; Preset Timing2 register value
Timing3:LongWord; Preset Timing2 register value
Registers:PPL110CLCDRegisters; PL110 registers


Public variables


QEMUVPB specific Ultibo variables

QEMUVPBInitialized:Boolean;

Clock variables

ClockGetLast:LongWord; Value of 24MHz Counter on last ClockGetCount or ClockGetTotal call
ClockGetBase:Int64; Base value for 64-bit clock, incremented each time the 24MHz Counter rolls over (Only accurate if ClockGetCount/ClockGetTotal is called at least once per 178 seconds)
ClockGetLock:THandle = INVALID_HANDLE_VALUE; Lock handle for creating 64-bit clock from a 32-bit register
ClockGetTimer:THandle = INVALID_HANDLE_VALUE; Timer handle for ensuring clock is read periodically to maintain accurracy

Timer variables

Timer0Registers:PSP804TimerRegisters; Use Timer0 for Clock
Timer2Registers:PSP804TimerRegisters; Use Timer2 for Scheduler

Interrupt variables

PrimaryInterruptRegisters:PPL190InterruptRegisters;
SecondaryInterruptRegisters:PVersatilePBInterruptRegisters;
InterruptEntries:array[0..(VERSATILEPB_IRQ_COUNT - 1)] of TInterruptEntry;

System call

SystemCallEntries:array[0..QEMUVPB_SWI_COUNT - 1] of TSystemCallEntry;

IRQ/FIQ

IRQEnabled:array[0..1] of LongWord; 2 groups of IRQs to Enable/Disable (See: TPL190InterruptRegisters)
FIQEnabled:LongWord; The single IRQ number to Enable as FIQ instead (See: TPL190InterruptRegisters)


Function declarations


Initialization functions 

procedure QEMUVPBInit;
Description: To be documented
Note None documented


QEMUVPB platform functions 

procedure QEMUVPBBoardInit;
Description: To be documented
Note None documented 


procedure QEMUVPBMemoryInit;
Description: To be documented
Note None documented 


procedure QEMUVPBClockInit;
Description: To be documented
Note None documented 


procedure QEMUVPBPowerInit;
Description: To be documented
Note None documented 


procedure QEMUVPBInterruptInit;
Description: To be documented
Note None documented 


procedure QEMUVPBPeripheralInit;
Description: To be documented
Note None documented 


procedure QEMUVPBFramebufferInit;
Description: To be documented
Note None documented 


procedure QEMUVPBPageTableInit;
Description: Initialize the Hardware Page Tables before enabling the MMU
Note See ?????? 


function QEMUVPBRequestExIRQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request registration of the supplied handler to the specified IRQ number
CPUID CPU to route IRQ to
Number IRQ number to register
Handler Interrupt handler function to register
HandlerEx Extended Interrupt handler function to register
Note Only one of Handler or HandlerEx can be specified 


function QEMUVPBReleaseExIRQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request deregistration of the supplied handler from the specified IRQ number
CPUID CPU to route IRQ to
Number IRQ number to deregister
Handler Interrupt handler function to deregister
HandlerEx Extended Interrupt handler function to deregister
Note Only one of Handler or HandlerEx can be specified 


function QEMUVPBRequestExFIQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request registration of the supplied handler to the specified FIQ number
CPUID CPU to route FIQ to
Number FIQ number to register
Handler Interrupt handler function to register
HandlerEx Extended Interrupt handler function to register
Note Only one of Handler or HandlerEx can be specified 


function QEMUVPBReleaseExFIQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request deregistration of the supplied handler from the specified FIQ number
CPUID CPU to route FIQ to
Number FIQ number to deregister
Handler Interrupt handler function to deregister
HandlerEx Extended Interrupt handler function to deregister
Note Only one of Handler or HandlerEx can be specified 


function QEMUVPBRegisterSystemCallEx(CPUID,Number:LongWord; Handler:TSystemCallHandler; HandlerEx:TSystemCallExHandler):LongWord;
Description: Request registration of the supplied extended handler to the specified System Call number
CPUID The CPU Id to register the System Call against (Ignored on QEMUVPB)
Number The System Call number to be registered
Handler The handler function to be registered
HandlerEx The extended handler function to be registered
Note Only one of Handler or HandlerEx can be specified 


function QEMUVPBDeregisterSystemCallEx(CPUID,Number:LongWord; Handler:TSystemCallHandler; HandlerEx:TSystemCallExHandler):LongWord;
Description: Request deregistration of the supplied extended handler from the specified System Call number
CPUID The CPU Id to deregister the System Call from (Ignored on QEMUVPB)
Number The System Call number to be deregistered
Handler The handler function to be deregistered
HandlerEx The extended handler function to be deregistered
Note Only one of Handler or HandlerEx can be specified 


function QEMUVPBGetInterruptEntry(Number:LongWord):TInterruptEntry;
Description: To be documented
Note Get the interrupt entry for the specified interrupt number 


function QEMUVPBGetSystemCallEntry(Number:LongWord):TSystemCallEntry;
Description: Get the system call entry for the specified system call number
Note None documented 


function QEMUVPBSystemRestart(Delay:LongWord):LongWord;
Description: To be documented
Note None documented 


function QEMUVPBSystemShutdown(Delay:LongWord):LongWord;
Description: To be documented
Note None documented 


function QEMUVPBClockGetCount:LongWord;
Description: Gets the current system clock count (32 least significant bits of total)
Note On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds 


function QEMUVPBClockGetTotal:Int64;
Description: Gets the total system clock count
Note On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds and increment the rollover value. This is only accurate if either ClockGetCount or ClockGetTotal is called at least once per 178 seconds on order to increment the rollover. 


procedure QEMUVPBClockGetTimer(Data:Pointer);
Description: Timer procedure to ensure ClockGetTotal is called at least once per rollover interval
Note Not intended to be called directly by applications


QEMUVPB thread functions 

procedure QEMUVPBSchedulerInit;
Description: Initialize the scheduler interrupt on the boot CPU
Note None documented


QEMUVPB IRQ functions 

function QEMUVPBDispatchIRQ(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;
Description: Process any pending IRQ requests
Note Called by ARMv7/8IRQHandler in PlatformARMv7/8

A DataMemoryBarrier is executed before and after calling this function 


function QEMUVPBHandleIRQ(Number,CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;
Description: Call the handler function for an IRQ that was received, or halt if it doesn't exist
Note None documented


QEMUVPB FIQ functions 

function QEMUVPBDispatchFIQ(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;
Description: Process any pending FIQ requests
Note Called by ARMv7/8FIQHandler in PlatformARMv7/8

A DataMemoryBarrier is executed before and after calling this function 


function QEMUVPBHandleFIQ(Number,CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;
Description: Call the handler function for an FIQ that was received, or halt if it doesn't exist
Note None documented


QEMUVPB SWI functions 

function QEMUVPBDispatchSWI(CPUID:LongWord; Thread:TThreadHandle; Request:PSystemCallRequest):TThreadHandle;
Description: Process an SWI request
Note Called by ARMv7/8SoftwareInterruptHandler in PlatformARMv7/8

A DataMemoryBarrier is executed before and after calling this function


QEMUVPB clock functions 

procedure QEMUVPBClockInterrupt(Parameter:Pointer);
Description: Interrupt handler function for the clock interrupt
Note This schedules another clock interrupt to occur CLOCK_CYCLES_PER_TICK in the future, then updates ClockTicks and ClockSeconds and checks for timers to trigger. 


procedure QEMUVPBClockUpdate(Cycles:LongWord; var Last:LongWord);
Description: Setup a clock interrupt to trigger after the specified number of clock cycles
Cycles Number of cycles after which the timer interrupt is to be triggered
Note This refers to native clock cycles as specified by CLOCK_FREQUENCY


QEMUVPB scheduler functions 

function QEMUVPBSchedulerInterrupt(CPUID:LongWord; Thread:TThreadHandle; Parameter:Pointer):TThreadHandle;
Description: Interrupt handler function for the scheduler interrupt
Note This schedules another scheduler interrupt to occur SCHEDULER_CLOCKS_PER_INTERRUPT in the future, then checks for threads to wakeup or timeout and the next thread to schedule. 


procedure QEMUVPBSchedulerUpdate(Cycles:LongWord; var Last:LongWord);
Description: Setup a scheduler interrupt to trigger after the specified number of clock cycles
Cycles Number of cycles after which the scheduler interrupt is to be triggered
Note This refers to native clock cycles as specified by VERSATILEPB_TIMER_FREQUENCY 


procedure QEMUVPBSchedulerSystemCall(Request:PSystemCallRequest);
Description: System Call handler for the scheduler
Note This is registered to receive requests for the SYSTEM_CALL_CONTEXT_SWITCH and will perform a context switch from within an SWI


QEMUVPB framebuffer functions 

function QEMUVPBFramebufferDeviceAllocate(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;
Description: Implementation of FramebufferDeviceAllocate API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceAllocate instead 


function QEMUVPBFramebufferDeviceRelease(Framebuffer:PFramebufferDevice):LongWord;
Description: Implementation of FramebufferDeviceRelease API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceRelease instead 


function QEMUVPBFramebufferDeviceBlank(Framebuffer:PFramebufferDevice; Blank:Boolean):LongWord;
Description: Implementation of FramebufferDevicBlank API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDevicBlank instead 


function QEMUVPBFramebufferDeviceCommit(Framebuffer:PFramebufferDevice; Address,Size,Flags:LongWord):LongWord;
Description: Implementation of FramebufferDeviceCommit API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceCommit instead 


function QEMUVPBFramebufferDeviceSetProperties(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;
Description: Implementation of FramebufferDeviceSetProperties API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceSetProperties instead


QEMUVPB helper functions 

procedure QEMUVPBBootBlink; assembler; nostackframe;
Description: Output characters to UART0 without dependency on any other RTL setup
Note None documented 


procedure QEMUVPBBootOutput(Value:LongWord);
Description: Output characters to UART0 without dependency on any other RTL setup
Note Based on hexstrings() function by dwelch67 (https://github.com/dwelch67)


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