Unit LAN78XX
From Ultibo.org
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Description
Microchip LAN78xx USB Ethernet Driver unit
The Microchip LAN78xx is a USB 3.1 to 10/100/1000 Gigabit Ethernet bridge device which supports 10BASE-T, 100BASE-TX and 1000BASE-T. Both USB 2.0 High Speed and USB 3.1 Super Speed interfaces are supported using a pair of Bulk Endpoints and an Interrupt Endpoint for signalling status changes and other events. The Raspberry Pi 3B+ contains a variant of this device called a LAN7515 which is a combination device containing a LAN78xx Gigabit Ethernet controller and two 4 port USB 2.0 compatible hubs. The hubs will be detected and bound by the default USB Hub driver when they are enumerated by the USB core.
Constants
LAN78XX specific constants
LAN78XX_* LAN78XX_NETWORK_DESCRIPTION = 'Microchip LAN78XX USB Ethernet Adapter';
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Description of LAN78XX device |
LAN78XX_DRIVER_NAME = 'Microchip LAN78XX USB Ethernet Adapter Driver';
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Name of LAN78XX driver |
LAN78XX_USB_VENDOR_ID = $0424;
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LAN7800_USB_PRODUCT_ID= $7800;
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LAN7850_USB_PRODUCT_ID = $7850;
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LAN78XX_DEVICE_ID_COUNT = 2;
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Number of supported Device IDs |
LAN78XX_DEVICE_ID:array[0..LAN78XX_DEVICE_ID_COUNT - 1] of TUSBDeviceId = (
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(idVendor:LAN78XX_USB_VENDOR_ID;idProduct:LAN7800_USB_PRODUCT_ID),
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LAN7800/7801 |
(idVendor:LAN78XX_USB_VENDOR_ID;idProduct:LAN7850_USB_PRODUCT_ID));
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LAN7850 |
LAN78XX_SS_USB_PKT_SIZE = 1024;
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LAN78XX_HS_USB_PKT_SIZE = 512;
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LAN78XX_FS_USB_PKT_SIZE = 64;
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LAN78XX_MAX_RX_FIFO_SIZE = 12 * 1024;
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Maximum size 12KB |
LAN78XX_MAX_TX_FIFO_SIZE = 12 * 1024;
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Maximum size 12KB |
LAN78XX_DEFAULT_BURST_CAP_SIZE = 32 * 1024;
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Originally LAN78XX_MAX_RX_FIFO_SIZE (12 * 1024) |
LAN78XX_DEFAULT_BULK_IN_DELAY = $0800;
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2048 x 16.667 ns = 34.133 us |
LAN78XX_MAX_SINGLE_PACKET_SIZE = 9000;
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LAN78XX_TX_OVERHEAD = 8;
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TX Command A + TX Command B |
LAN78XX_RX_OVERHEAD = 10;
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RX Command A + RX Command B + RX Command C |
LAN78XX_RXW_PADDING = 2;
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LAN78XX_RX_MAX_QUEUE_MEMORY = 512 * (ETHERNET_MAX_PACKET_SIZE + LAN78XX_RX_OVERHEAD);
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Originally 60 * 1518 |
LAN78XX_TX_MAX_QUEUE_MEMORY = 64 * (ETHERNET_MAX_PACKET_SIZE + LAN78XX_TX_OVERHEAD);
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Originally 60 * 1518 |
LAN78XX_EEPROM_MAGIC = $78A5;
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LAN78XX_OTP_MAGIC = $78F3;
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LAN78XX_PHY_ADDRESS = 1;
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LAN78XX_EEPROM_INDICATOR = $A5;
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LAN78XX_EEPROM_MAC_OFFSET = $01;
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LAN78XX_MAX_EEPROM_SIZE = 512;
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LAN78XX_OTP_INDICATOR_1 = $F3;
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LAN78XX_OTP_INDICATOR_2 = $F7;
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LAN78XX USB vendor request
LAN78XX_USB_VENDOR_* LAN78XX_USB_VENDOR_REQUEST_WRITE_REGISTER = $A0;
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LAN78XX_USB_VENDOR_REQUEST_READ_REGISTER = $A1;
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LAN78XX_USB_VENDOR_REQUEST_GET_STATS = $A2;
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LAN78XX interrupt endpoint status
LAN78XX_INT_ENP_* LAN78XX_INT_ENP_EEE_START_TX_LPI_INT = (1 shl 26);
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LAN78XX_INT_ENP_EEE_STOP_TX_LPI_INT = (1 shl 25);
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LAN78XX_INT_ENP_EEE_RX_LPI_INT = (1 shl 24);
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LAN78XX_INT_ENP_RDFO_INT = (1 shl 22);
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LAN78XX_INT_ENP_TXE_INT = (1 shl 21);
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LAN78XX_INT_ENP_TX_DIS_INT = (1 shl 19);
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LAN78XX_INT_ENP_RX_DIS_INT = (1 shl 18);
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LAN78XX_INT_ENP_PHY_INT = (1 shl 17);
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LAN78XX_INT_ENP_DP_INT = (1 shl 16);
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LAN78XX_INT_ENP_MAC_ERR_INT = (1 shl 15);
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LAN78XX_INT_ENP_TDFU_INT = (1 shl 14);
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LAN78XX_INT_ENP_TDFO_INT = (1 shl 13);
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LAN78XX_INT_ENP_UTX_FP_INT = (1 shl 12);
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LAN78XX TX/RX packet alignment
LAN78XX_*_PKT_ALIGNMENT LAN78XX_TX_PKT_ALIGNMENT = 4;
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LAN78XX_RX_PKT_ALIGNMENT = 4;
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LAN78XX TX command A
LAN78XX_TX_CMD_A_* LAN78XX_TX_CMD_A_IGE = $20000000;
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LAN78XX_TX_CMD_A_ICE = $10000000;
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LAN78XX_TX_CMD_A_LSO = $08000000;
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LAN78XX_TX_CMD_A_IPE = $04000000;
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LAN78XX_TX_CMD_A_TPE = $02000000;
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LAN78XX_TX_CMD_A_IVTG = $01000000;
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LAN78XX_TX_CMD_A_RVTG = $00800000;
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LAN78XX_TX_CMD_A_FCS = $00400000;
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LAN78XX_TX_CMD_A_LEN_MASK = $000FFFFF;
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LAN78XX TX command B
LAN78XX_TX_CMD_B_* LAN78XX_TX_CMD_B_MSS_SHIFT = 16;
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LAN78XX_TX_CMD_B_MSS_MASK = $3FFF0000;
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LAN78XX_TX_CMD_B_MSS_MIN = 8;
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LAN78XX_TX_CMD_B_VTAG_MASK = $0000FFFF;
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LAN78XX_TX_CMD_B_VTAG_PRI_MASK = $0000E000;
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LAN78XX_TX_CMD_B_VTAG_CFI_MASK = $00001000;
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LAN78XX_TX_CMD_B_VTAG_VID_MASK = $00000FFF;
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LAN78XX RX command A
LAN78XX_RX_CMD_A_* LAN78XX_RX_CMD_A_ICE = $80000000;
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LAN78XX_RX_CMD_A_TCE = $40000000;
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LAN78XX_RX_CMD_A_CSE_MASK = $C0000000;
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LAN78XX_RX_CMD_A_IPV = $20000000;
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LAN78XX_RX_CMD_A_PID_MASK = $18000000;
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LAN78XX_RX_CMD_A_PID_NONE_IP = $00000000;
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LAN78XX_RX_CMD_A_PID_TCP_IP = $08000000;
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LAN78XX_RX_CMD_A_PID_UDP_IP = $10000000;
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LAN78XX_RX_CMD_A_PID_IP = $18000000;
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LAN78XX_RX_CMD_A_PFF = $04000000;
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LAN78XX_RX_CMD_A_BAM = $02000000;
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LAN78XX_RX_CMD_A_MAM = $01000000;
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LAN78XX_RX_CMD_A_FVTG = $00800000;
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LAN78XX_RX_CMD_A_RED = $00400000;
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LAN78XX_RX_CMD_A_RX_ERRS_MASK = $C03F0000;
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LAN78XX_RX_CMD_A_RWT = $00200000;
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LAN78XX_RX_CMD_A_RUNT = $00100000;
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LAN78XX_RX_CMD_A_LONG = $00080000;
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LAN78XX_RX_CMD_A_RXE = $00040000;
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LAN78XX_RX_CMD_A_DRB = $00020000;
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LAN78XX_RX_CMD_A_FCS = $00010000;
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LAN78XX_RX_CMD_A_UAM = $00008000;
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LAN78XX_RX_CMD_A_ICSM = $00004000;
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LAN78XX_RX_CMD_A_LEN_MASK = $00003FFF;
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LAN78XX RX command B
LAN78XX_RX_CMD_B_* LAN78XX_RX_CMD_B_CSUM_SHIFT = 16;
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LAN78XX_RX_CMD_B_CSUM_MASK = $FFFF0000;
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LAN78XX_RX_CMD_B_VTAG_MASK = $0000FFFF;
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LAN78XX_RX_CMD_B_VTAG_PRI_MASK = $0000E000;
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LAN78XX_RX_CMD_B_VTAG_CFI_MASK = $00001000;
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LAN78XX_RX_CMD_B_VTAG_VID_MASK = $00000FFF;
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LAN78XX RX command C
LAN78XX_RX_CMD_C_* LAN78XX_RX_CMD_C_WAKE_SHIFT = 15;
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LAN78XX_RX_CMD_C_WAKE = $8000;
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LAN78XX_RX_CMD_C_REF_FAIL_SHIFT = 14;
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LAN78XX_RX_CMD_C_REF_FAIL = $4000;
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LAN78XX system control and status
LAN78XX_NUMBER_* LAN78XX_NUMBER_OF_REGS = 193;
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LAN78XX device Id and revision
LAN78XX_ID_REV_* LAN78XX_ID_REV = $00;
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LAN78XX_ID_REV_CHIP_ID_MASK = $FFFF0000;
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LAN78XX_ID_REV_CHIP_REV_MASK = $0000FFFF;
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LAN78XX_ID_REV_CHIP_ID_7800 = $7800;
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LAN78XX_ID_REV_CHIP_ID_7850 = $7850;
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LAN78XX FGPA revision
LAN78XX_FPGA_REV_* LAN78XX_FPGA_REV = $04;
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LAN78XX_FPGA_REV_MINOR_MASK = $0000FF00;
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LAN78XX_FPGA_REV_MAJOR_MASK = $000000FF;
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LAN78XX interrupt status
LAN78XX_INT_STS_* LAN78XX_INT_STS = $0C;
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LAN78XX_INT_STS_CLEAR_ALL = $FFFFFFFF;
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LAN78XX_INT_STS_EEE_TX_LPI_STRT = $04000000;
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LAN78XX_INT_STS_EEE_TX_LPI_STOP = $02000000;
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LAN78XX_INT_STS_EEE_RX_LPI = $01000000;
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LAN78XX_INT_STS_RDFO = $00400000;
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LAN78XX_INT_STS_TXE = $00200000;
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LAN78XX_INT_STS_TX_DIS = $00080000;
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LAN78XX_INT_STS_RX_DIS = $00040000;
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LAN78XX_INT_STS_PHY_INT = $00020000;
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LAN78XX_INT_STS_DP_INT = $00010000;
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LAN78XX_INT_STS_MAC_ERR = $00008000;
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LAN78XX_INT_STS_TDFU = $00004000;
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LAN78XX_INT_STS_TDFO = $00002000;
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LAN78XX_INT_STS_UFX_FP = $00001000;
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LAN78XX_INT_STS_GPIO_MASK = $00000FFF;
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LAN78XX_INT_STS_GPIO11 = $00000800;
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LAN78XX_INT_STS_GPIO10 = $00000400;
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LAN78XX_INT_STS_GPIO9 = $00000200;
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LAN78XX_INT_STS_GPIO8 = $00000100;
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LAN78XX_INT_STS_GPIO7 = $00000080;
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LAN78XX_INT_STS_GPIO6 = $00000040;
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LAN78XX_INT_STS_GPIO5 = $00000020;
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LAN78XX_INT_STS_GPIO4 = $00000010;
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LAN78XX_INT_STS_GPIO3 = $00000008;
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LAN78XX_INT_STS_GPIO2 = $00000004;
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LAN78XX_INT_STS_GPIO1 = $00000002;
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LAN78XX_INT_STS_GPIO0 = $00000001;
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LAN78XX hardware configuration
LAN78XX_HW_CFG_* LAN78XX_HW_CFG = $010;
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LAN78XX_HW_CFG_CLK125_EN = $02000000;
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LAN78XX_HW_CFG_REFCLK25_EN = $01000000;
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LAN78XX_HW_CFG_LED3_EN = $00800000;
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LAN78XX_HW_CFG_LED2_EN = $00400000;
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LAN78XX_HW_CFG_LED1_EN = $00200000;
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LAN78XX_HW_CFG_LED0_EN = $00100000;
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LAN78XX_HW_CFG_EEE_PHY_LUSU = $00020000;
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LAN78XX_HW_CFG_EEE_TSU = $00010000;
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LAN78XX_HW_CFG_NETDET_STS = $00008000;
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LAN78XX_HW_CFG_NETDET_EN = $00004000;
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LAN78XX_HW_CFG_EEM = $00002000;
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LAN78XX_HW_CFG_RST_PROTECT = $00001000;
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LAN78XX_HW_CFG_CONNECT_BUF = $00000400;
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LAN78XX_HW_CFG_CONNECT_EN = $00000200;
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LAN78XX_HW_CFG_CONNECT_POL = $00000100;
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LAN78XX_HW_CFG_SUSPEND_N_SEL_MASK = $000000C0;
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LAN78XX_HW_CFG_SUSPEND_N_SEL_2 = $00000000;
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LAN78XX_HW_CFG_SUSPEND_N_SEL_12N = $00000040;
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LAN78XX_HW_CFG_SUSPEND_N_SEL_012N = $00000080;
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LAN78XX_HW_CFG_SUSPEND_N_SEL_0123N = $000000C0;
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LAN78XX_HW_CFG_SUSPEND_N_POL = $00000020;
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LAN78XX_HW_CFG_MEF = $00000010;
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LAN78XX_HW_CFG_ETC = $00000008;
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LAN78XX_HW_CFG_LRST = $00000002;
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LAN78XX_HW_CFG_SRST = $00000001;
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LAN78XX power management control
LAN78XX_PMT_CTL_* LAN78XX_PMT_CTL = $014;
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LAN78XX_PMT_CTL_EEE_WAKEUP_EN = $00002000;
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LAN78XX_PMT_CTL_EEE_WUPS = $00001000;
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LAN78XX_PMT_CTL_MAC_SRST = $00000800;
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LAN78XX_PMT_CTL_PHY_PWRUP = $00000400;
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LAN78XX_PMT_CTL_RES_CLR_WKP_MASK = $00000300;
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LAN78XX_PMT_CTL_RES_CLR_WKP_STS = $00000200;
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LAN78XX_PMT_CTL_RES_CLR_WKP_EN = $00000100;
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LAN78XX_PMT_CTL_READY = $00000080;
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LAN78XX_PMT_CTL_SUS_MODE_MASK = $00000060;
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LAN78XX_PMT_CTL_SUS_MODE_0 = $00000000;
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LAN78XX_PMT_CTL_SUS_MODE_1 = $00000020;
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LAN78XX_PMT_CTL_SUS_MODE_2 = $00000040;
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LAN78XX_PMT_CTL_SUS_MODE_3 = $00000060;
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LAN78XX_PMT_CTL_PHY_RST = $00000010;
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LAN78XX_PMT_CTL_WOL_EN = $00000008;
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LAN78XX_PMT_CTL_PHY_WAKE_EN = $00000004;
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LAN78XX_PMT_CTL_WUPS_MASK = $00000003;
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LAN78XX_PMT_CTL_WUPS_MLT = $00000003;
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LAN78XX_PMT_CTL_WUPS_MAC = $00000002;
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LAN78XX_PMT_CTL_WUPS_PHY = $00000001;
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LAN78XX general purpose IO configuration 0 register
LAN78XX_GPIO_CFG0_* LAN78XX_GPIO_CFG0 = $018;
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LAN78XX_GPIO_CFG0_GPIOEN_MASK = $0000F000;
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LAN78XX_GPIO_CFG0_GPIOEN3 = $00008000;
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LAN78XX_GPIO_CFG0_GPIOEN2 = $00004000;
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LAN78XX_GPIO_CFG0_GPIOEN1 = $00002000;
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LAN78XX_GPIO_CFG0_GPIOEN0 = $00001000;
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LAN78XX_GPIO_CFG0_GPIOBUF_MASK = $00000F00;
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LAN78XX_GPIO_CFG0_GPIOBUF3 = $00000800;
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LAN78XX_GPIO_CFG0_GPIOBUF2 = $00000400;
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LAN78XX_GPIO_CFG0_GPIOBUF1 = $00000200;
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LAN78XX_GPIO_CFG0_GPIOBUF0 = $00000100;
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LAN78XX_GPIO_CFG0_GPIODIR_MASK = $000000F0;
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LAN78XX_GPIO_CFG0_GPIODIR3 = $00000080;
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LAN78XX_GPIO_CFG0_GPIODIR2 = $00000040;
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LAN78XX_GPIO_CFG0_GPIODIR1 = $00000020;
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LAN78XX_GPIO_CFG0_GPIODIR0 = $00000010;
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LAN78XX_GPIO_CFG0_GPIOD_MASK = $0000000F;
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LAN78XX_GPIO_CFG0_GPIOD3 = $00000008;
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LAN78XX_GPIO_CFG0_GPIOD2 = $00000004;
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LAN78XX_GPIO_CFG0_GPIOD1 = $00000002;
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LAN78XX_GPIO_CFG0_GPIOD0 = $00000001;
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LAN78XX general purpose IO configuration 1 register
LAN78XX_GPIO_CFG1_* LAN78XX_GPIO_CFG1 = $01C;
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LAN78XX_GPIO_CFG1_GPIOEN_MASK = $FF000000;
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LAN78XX_GPIO_CFG1_GPIOEN11 = $80000000;
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LAN78XX_GPIO_CFG1_GPIOEN10 = $40000000;
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LAN78XX_GPIO_CFG1_GPIOEN9 = $20000000;
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LAN78XX_GPIO_CFG1_GPIOEN8 = $10000000;
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LAN78XX_GPIO_CFG1_GPIOEN7 = $08000000;
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LAN78XX_GPIO_CFG1_GPIOEN6 = $04000000;
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LAN78XX_GPIO_CFG1_GPIOEN5 = $02000000;
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LAN78XX_GPIO_CFG1_GPIOEN4 = $01000000;
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LAN78XX_GPIO_CFG1_GPIOBUF_MASK = $00FF0000;
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LAN78XX_GPIO_CFG1_GPIOBUF11 = $00800000;
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LAN78XX_GPIO_CFG1_GPIOBUF10 = $00400000;
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LAN78XX_GPIO_CFG1_GPIOBUF9 = $00200000;
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LAN78XX_GPIO_CFG1_GPIOBUF8 = $00100000;
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LAN78XX_GPIO_CFG1_GPIOBUF7 = $00080000;
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LAN78XX_GPIO_CFG1_GPIOBUF6 = $00040000;
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LAN78XX_GPIO_CFG1_GPIOBUF5 = $00020000;
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LAN78XX_GPIO_CFG1_GPIOBUF4 = $00010000;
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LAN78XX_GPIO_CFG1_GPIODIR_MASK = $0000FF00;
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LAN78XX_GPIO_CFG1_GPIODIR11 = $00008000;
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LAN78XX_GPIO_CFG1_GPIODIR10 = $00004000;
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LAN78XX_GPIO_CFG1_GPIODIR9 = $00002000;
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LAN78XX_GPIO_CFG1_GPIODIR8 = $00001000;
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LAN78XX_GPIO_CFG1_GPIODIR7 = $00000800;
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LAN78XX_GPIO_CFG1_GPIODIR6 = $00000400;
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LAN78XX_GPIO_CFG1_GPIODIR5 = $00000200;
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LAN78XX_GPIO_CFG1_GPIODIR4 = $00000100;
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LAN78XX_GPIO_CFG1_GPIOD_MASK = $000000FF;
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LAN78XX_GPIO_CFG1_GPIOD11 = $00000080;
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LAN78XX_GPIO_CFG1_GPIOD10 = $00000040;
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LAN78XX_GPIO_CFG1_GPIOD9 = $00000020;
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LAN78XX_GPIO_CFG1_GPIOD8 = $00000010;
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LAN78XX_GPIO_CFG1_GPIOD7 = $00000008;
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LAN78XX_GPIO_CFG1_GPIOD6 = $00000004;
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LAN78XX_GPIO_CFG1_GPIOD5 = $00000002;
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LAN78XX_GPIO_CFG1_GPIOD4 = $00000001;
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LAN78XX general purpose IO wake enable and polarity
LAN78XX_GPIO_WAKE_* LAN78XX_GPIO_WAKE = $020;
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LAN78XX_GPIO_WAKE_GPIOPOL_MASK = $0FFF0000;
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LAN78XX_GPIO_WAKE_GPIOPOL11 = $08000000;
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LAN78XX_GPIO_WAKE_GPIOPOL10 = $04000000;
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LAN78XX_GPIO_WAKE_GPIOPOL9 = $02000000;
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LAN78XX_GPIO_WAKE_GPIOPOL8 = $01000000;
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LAN78XX_GPIO_WAKE_GPIOPOL7 = $00800000;
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LAN78XX_GPIO_WAKE_GPIOPOL6 = $00400000;
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LAN78XX_GPIO_WAKE_GPIOPOL5 = $00200000;
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LAN78XX_GPIO_WAKE_GPIOPOL4 = $00100000;
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LAN78XX_GPIO_WAKE_GPIOPOL3 = $00080000;
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LAN78XX_GPIO_WAKE_GPIOPOL2 = $00040000;
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LAN78XX_GPIO_WAKE_GPIOPOL1 = $00020000;
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LAN78XX_GPIO_WAKE_GPIOPOL0 = $00010000;
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LAN78XX_GPIO_WAKE_GPIOWK_MASK = $00000FFF;
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LAN78XX_GPIO_WAKE_GPIOWK11 = $00000800;
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LAN78XX_GPIO_WAKE_GPIOWK10 = $00000400;
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LAN78XX_GPIO_WAKE_GPIOWK9 = $00000200;
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LAN78XX_GPIO_WAKE_GPIOWK8 = $00000100;
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LAN78XX_GPIO_WAKE_GPIOWK7 = $00000080;
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LAN78XX_GPIO_WAKE_GPIOWK6 = $00000040;
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LAN78XX_GPIO_WAKE_GPIOWK5 = $00000020;
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LAN78XX_GPIO_WAKE_GPIOWK4 = $00000010;
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LAN78XX_GPIO_WAKE_GPIOWK3 = $00000008;
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LAN78XX_GPIO_WAKE_GPIOWK2 = $00000004;
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LAN78XX_GPIO_WAKE_GPIOWK1 = $00000002;
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LAN78XX_GPIO_WAKE_GPIOWK0 = $00000001;
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LAN78XX data port select
LAN78XX_DP_SEL_* LAN78XX_DP_SEL = $024;
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LAN78XX_DP_SEL_DPRDY = $80000000;
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LAN78XX_DP_SEL_RSEL_MASK = $0000000F;
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LAN78XX_DP_SEL_RSEL_USB_PHY_CSRS = $0000000F;
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LAN78XX_DP_SEL_RSEL_OTP_64BIT = $00000009;
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LAN78XX_DP_SEL_RSEL_OTP_8BIT = $00000008;
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LAN78XX_DP_SEL_RSEL_UTX_BUF_RAM = $00000007;
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LAN78XX_DP_SEL_RSEL_DESC_RAM = $00000005;
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LAN78XX_DP_SEL_RSEL_TXFIFO = $00000004;
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LAN78XX_DP_SEL_RSEL_RXFIFO = $00000003;
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LAN78XX_DP_SEL_RSEL_LSO = $00000002;
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LAN78XX_DP_SEL_RSEL_VLAN_DA = $00000001;
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LAN78XX_DP_SEL_RSEL_URXBUF = $00000000;
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LAN78XX_DP_SEL_VHF_HASH_LEN = 16;
|
|
LAN78XX_DP_SEL_VHF_VLAN_LEN = 128;
|
LAN78XX data port command
LAN78XX_DP_CMD_* LAN78XX_DP_CMD = $028;
|
|
LAN78XX_DP_CMD_WRITE = $00000001;
|
|
LAN78XX_DP_CMD_READ = $00000000;
|
LAN78XX data port address
LAN78XX_DP_ADDR_* LAN78XX_DP_ADDR = $02C;
|
|
LAN78XX_DP_ADDR_MASK = $00003FFF;
|
LAN78XX data port data
LAN78XX_DP_DATA_* LAN78XX_DP_DATA = $030;
|
LAN78XX EEPROM command
LAN78XX_E2P_CMD_* LAN78XX_E2P_CMD = $040;
|
|
LAN78XX_E2P_CMD_EPC_BUSY = $80000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_MASK = $70000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_RELOAD = $70000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_ERAL = $60000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_ERASE = $50000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_WRAL = $40000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_WRITE = $30000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_EWEN = $20000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_EWDS = $10000000;
|
|
LAN78XX_E2P_CMD_EPC_CMD_READ = $00000000;
|
|
LAN78XX_E2P_CMD_EPC_TIMEOUT = $00000400;
|
|
LAN78XX_E2P_CMD_EPC_DL = $00000200;
|
|
LAN78XX_E2P_CMD_EPC_ADDR_MASK = $000001FF;
|
LAN78XX EEPROM data
LAN78XX_E2P_DATA_* LAN78XX_E2P_DATA = $044;
|
|
LAN78XX_E2P_DATA_EEPROM_DATA_MASK = $000000FF;
|
LAN78XX BOS descriptor attribute
LAN78XX_BOS_ATTR_* LAN78XX_BOS_ATTR = $050;
|
|
LAN78XX_BOS_ATTR_BLOCK_SIZE_MASK = $000000FF;
|
LAN78XX SS descriptor attribute
LAN78XX_SS_ATTR_* LAN78XX_SS_ATTR = $054;
|
|
LAN78XX_SS_ATTR_POLL_INT_MASK = $00FF0000;
|
|
LAN78XX_SS_ATTR_DEV_DESC_SIZE_MASK = $0000FF00;
|
|
LAN78XX_SS_ATTR_CFG_BLK_SIZE_MASK = $000000FF;
|
LAN78XX HS descriptor attribute
LAN78XX_HS_ATTR_* LAN78XX_HS_ATTR = $058;
|
|
LAN78XX_HS_ATTR_POLL_INT_MASK = $00FF0000;
|
|
LAN78XX_HS_ATTR_DEV_DESC_SIZE_MASK = $0000FF00;
|
|
LAN78XX_HS_ATTR_CFG_BLK_SIZE_MASK = $000000FF;
|
LAN78XX FS descriptor attribute
LAN78XX_FS_ATTR_* LAN78XX_FS_ATTR = $05C;
|
|
LAN78XX_FS_ATTR_POLL_INT_MASK = $00FF0000;
|
|
LAN78XX_FS_ATTR_DEV_DESC_SIZE_MASK = $0000FF00;
|
|
LAN78XX_FS_ATTR_CFG_BLK_SIZE_MASK = $000000FF;
|
LAN78XX string attribute register 0
LAN78XX_STR_ATTR0_* LAN78XX_STR_ATTR0 = $060;
|
|
LAN78XX_STR_ATTR0_CFGSTR_DESC_SIZE_MASK = $FF000000;
|
|
LAN78XX_STR_ATTR0_SERSTR_DESC_SIZE_MASK = $00FF0000;
|
|
LAN78XX_STR_ATTR0_PRODSTR_DESC_SIZE_MASK = $0000FF00;
|
|
LAN78XX_STR_ATTR0_MANUF_DESC_SIZE_MASK = $000000FF;
|
LAN78XX string attribute register 1
LAN78XX_STR_ATTR1_* LAN78XX_STR_ATTR1 = $064;
|
|
LAN78XX_STR_ATTR1_INTSTR_DESC_SIZE_MASK = $000000FF;
|
LAN78XX flag attribute
LAN78XX_STR_FLAG_* LAN78XX_STR_FLAG_ATTR = $068;
|
|
LAN78XX_STR_FLAG_ATTR_PME_FLAGS_MASK = $000000FF;
|
LAN78XX USB configuration register 0
LAN78XX_USB_CFG0_* LAN78XX_USB_CFG0 = $080;
|
|
LAN78XX_USB_CFG_LPM_RESPONSE = $80000000;
|
|
LAN78XX_USB_CFG_LPM_CAPABILITY = $40000000;
|
|
LAN78XX_USB_CFG_LPM_ENBL_SLPM = $20000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_MASK = $1F000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_960 = $1C000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_885 = $1B000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_810 = $1A000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_735 = $19000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_660 = $18000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_585 = $17000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_510 = $16000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_435 = $15000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_360 = $14000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_285 = $13000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_210 = $12000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_135 = $11000000;
|
|
LAN78XX_USB_CFG_HIRD_THR_60 = $10000000;
|
|
LAN78XX_USB_CFG_MAX_BURST_BI_MASK = $00F00000;
|
|
LAN78XX_USB_CFG_MAX_BURST_BO_MASK = $000F0000;
|
|
LAN78XX_USB_CFG_MAX_DEV_SPEED_MASK = $0000E000;
|
|
LAN78XX_USB_CFG_MAX_DEV_SPEED_SS = $00008000;
|
|
LAN78XX_USB_CFG_MAX_DEV_SPEED_HS = $00000000;
|
|
LAN78XX_USB_CFG_MAX_DEV_SPEED_FS = $00002000;
|
|
LAN78XX_USB_CFG_PHY_BOOST_MASK = $00000180;
|
|
LAN78XX_USB_CFG_PHY_BOOST_PLUS_12 = $00000180;
|
|
LAN78XX_USB_CFG_PHY_BOOST_PLUS_8 = $00000100;
|
|
LAN78XX_USB_CFG_PHY_BOOST_PLUS_4 = $00000080;
|
|
LAN78XX_USB_CFG_PHY_BOOST_NORMAL = $00000000;
|
|
LAN78XX_USB_CFG_BIR = $00000040;
|
|
LAN78XX_USB_CFG_BCE = $00000020;
|
|
LAN78XX_USB_CFG_PORT_SWAP = $00000010;
|
|
LAN78XX_USB_CFG_LPM_EN = $00000008;
|
|
LAN78XX_USB_CFG_RMT_WKP = $00000004;
|
|
LAN78XX_USB_CFG_PWR_SEL = $00000002;
|
|
LAN78XX_USB_CFG_STALL_BO_DIS = $00000001;
|
LAN78XX USB configuration register 1
LAN78XX_USB_CFG1_* LAN78XX_USB_CFG1 = $084;
|
|
LAN78XX_USB_CFG1_U1_TIMEOUT_MASK = $FF000000;
|
|
LAN78XX_USB_CFG1_U2_TIMEOUT_MASK = $00FF0000;
|
|
LAN78XX_USB_CFG1_HS_TOUT_CAL_MASK = $0000E000;
|
|
LAN78XX_USB_CFG1_DEV_U2_INIT_EN = $00001000;
|
|
LAN78XX_USB_CFG1_DEV_U2_EN = $00000800;
|
|
LAN78XX_USB_CFG1_DEV_U1_INIT_EN = $00000400;
|
|
LAN78XX_USB_CFG1_DEV_U1_EN = $00000200;
|
|
LAN78XX_USB_CFG1_LTM_ENABLE = $00000100;
|
|
LAN78XX_USB_CFG1_FS_TOUT_CAL_MASK = $00000070;
|
|
LAN78XX_USB_CFG1_SCALE_DOWN_MASK = $00000003;
|
|
LAN78XX_USB_CFG1_SCALE_DOWN_MODE3 = $00000003;
|
|
LAN78XX_USB_CFG1_SCALE_DOWN_MODE2 = $00000002;
|
|
LAN78XX_USB_CFG1_SCALE_DOWN_MODE1 = $00000001;
|
|
LAN78XX_USB_CFG1_SCALE_DOWN_MODE0 = $00000000;
|
LAN78XX USB configuration register 2
LAN78XX_USB_CFG2_* LAN78XX_USB_CFG2 = $088;
|
|
LAN78XX_USB_CFG2_SS_DETACH_TIME_MASK = $FFFF0000;
|
|
LAN78XX_USB_CFG2_HS_DETACH_TIME_MASK = $0000FFFF;
|
LAN78XX burst cap
LAN78XX_BURST_CAP_* LAN78XX_BURST_CAP = $090;
|
|
LAN78XX_BURST_CAP_SIZE_MASK = $000000FF;
|
LAN78XX bulk-in delay
LAN78XX_BULK_IN_* LAN78XX_BULK_IN_DLY = $094;
|
|
LAN78XX_BULK_IN_DLY_MASK = $0000FFFF;
|
LAN78XX interrupt endpoint control
LAN78XX_INT_EP* LAN78XX_INT_EP_CTL = $098;
|
|
LAN78XX_INT_EP_INTEP_ON = $80000000;
|
|
LAN78XX_INT_STS_EEE_TX_LPI_STRT_EN = $04000000;
|
|
LAN78XX_INT_STS_EEE_TX_LPI_STOP_EN = $02000000;
|
|
LAN78XX_INT_STS_EEE_RX_LPI_EN = $01000000;
|
|
LAN78XX_INT_EP_RDFO_EN = $00400000;
|
|
LAN78XX_INT_EP_TXE_EN = $00200000;
|
|
LAN78XX_INT_EP_TX_DIS_EN = $00080000;
|
|
LAN78XX_INT_EP_RX_DIS_EN = $00040000;
|
|
LAN78XX_INT_EP_PHY_INT_EN = $00020000;
|
|
LAN78XX_INT_EP_DP_INT_EN = $00010000;
|
|
LAN78XX_INT_EP_MAC_ERR_EN = $00008000;
|
|
LAN78XX_INT_EP_TDFU_EN = $00004000;
|
|
LAN78XX_INT_EP_TDFO_EN = $00002000;
|
|
LAN78XX_INT_EP_UTX_FP_EN = $00001000;
|
|
LAN78XX_INT_EP_GPIO_EN_MASK = $00000FFF;
|
LAN78XX pipe control
LAN78XX_PIPE_CTL_* LAN78XX_PIPE_CTL = $09C;
|
|
LAN78XX_PIPE_CTL_TXSWING = $00000040;
|
|
LAN78XX_PIPE_CTL_TXMARGIN_MASK = $00000038;
|
|
LAN78XX_PIPE_CTL_TXDEEMPHASIS_MASK = $00000006;
|
|
LAN78XX_PIPE_CTL_ELASTICITYBUFFERMODE = $00000001;
|
LAN78XX U1 exit latency
LAN78XX_U1_LATENCY_* LAN78XX_U1_LATENCY = $A0;
|
LAN78XX U2 exit latency
LAN78XX_U2_LATENCY_* LAN78XX_U2_LATENCY = $A4;
|
LAN78XX USB status
LAN78XX_USB_STATUS_* LAN78XX_USB_STATUS = $0A8;
|
|
LAN78XX_USB_STATUS_REMOTE_WK = $00100000;
|
|
LAN78XX_USB_STATUS_FUNC_REMOTE_WK = $00080000;
|
|
LAN78XX_USB_STATUS_LTM_ENABLE = $00040000;
|
|
LAN78XX_USB_STATUS_U2_ENABLE = $00020000;
|
|
LAN78XX_USB_STATUS_U1_ENABLE = $00010000;
|
|
LAN78XX_USB_STATUS_SET_SEL = $00000020;
|
|
LAN78XX_USB_STATUS_REMOTE_WK_STS = $00000010;
|
|
LAN78XX_USB_STATUS_FUNC_REMOTE_WK_STS = $00000008;
|
|
LAN78XX_USB_STATUS_LTM_ENABLE_STS = $00000004;
|
|
LAN78XX_USB_STATUS_U2_ENABLE_STS = $00000002;
|
|
LAN78XX_USB_STATUS_U1_ENABLE_STS = $00000001;
|
LAN78XX USB configuration register 3
LAN78XX_USB_CFG3_* LAN78XX_USB_CFG3 = $0AC;
|
|
LAN78XX_USB_CFG3_EN_U2_LTM = $40000000;
|
|
LAN78XX_USB_CFG3_BULK_OUT_NUMP_OVR = $20000000;
|
|
LAN78XX_USB_CFG3_DIS_FAST_U1_EXIT = $10000000;
|
|
LAN78XX_USB_CFG3_LPM_NYET_THR = $0F000000;
|
|
LAN78XX_USB_CFG3_RX_DET_2_POL_LFPS = $00800000;
|
|
LAN78XX_USB_CFG3_LFPS_FILT = $00400000;
|
|
LAN78XX_USB_CFG3_SKIP_RX_DET = $00200000;
|
|
LAN78XX_USB_CFG3_DELAY_P1P2P3 = $001C0000;
|
|
LAN78XX_USB_CFG3_DELAY_PHY_PWR_CHG = $00020000;
|
|
LAN78XX_USB_CFG3_U1U2_EXIT_FR = $00010000;
|
|
LAN78XX_USB_CFG3_REQ_P1P2P3 = $00008000;
|
|
LAN78XX_USB_CFG3_HST_PRT_CMPL = $00004000;
|
|
LAN78XX_USB_CFG3_DIS_SCRAMB = $00002000;
|
|
LAN78XX_USB_CFG3_PWR_DN_SCALE = $00001FFF;
|
LAN78XX receive filtering engine control
LAN78XX_RFE_CTL_* LAN78XX_RFE_CTL = $0B0;
|
|
LAN78XX_RFE_CTL_IGMP_COE = $00004000;
|
|
LAN78XX_RFE_CTL_ICMP_COE = $00002000;
|
|
LAN78XX_RFE_CTL_TCPUDP_COE = $00001000;
|
|
LAN78XX_RFE_CTL_IP_COE = $00000800;
|
|
LAN78XX_RFE_CTL_BCAST_EN = $00000400;
|
|
LAN78XX_RFE_CTL_MCAST_EN = $00000200;
|
|
LAN78XX_RFE_CTL_UCAST_EN = $00000100;
|
|
LAN78XX_RFE_CTL_VLAN_STRIP = $00000080;
|
|
LAN78XX_RFE_CTL_DISCARD_UNTAGGED = $00000040;
|
|
LAN78XX_RFE_CTL_VLAN_FILTER = $00000020;
|
|
LAN78XX_RFE_CTL_SA_FILTER = $00000010;
|
|
LAN78XX_RFE_CTL_MCAST_HASH = $00000008;
|
|
LAN78XX_RFE_CTL_DA_HASH = $00000004;
|
|
LAN78XX_RFE_CTL_DA_PERFECT = $00000002;
|
|
LAN78XX_RFE_CTL_RST = $00000001;
|
LAN78XX VLAN type
LAN78XX_VLAN_TYPE_* LAN78XX_VLAN_TYPE = $0B4;
|
|
LAN78XX_VLAN_TYPE_MASK = $0000FFFF;
|
LAN78XX FIFO controller RX FIFO control
LAN78XX_FCT_RX_* LAN78XX_FCT_RX_CTL = $0C0;
|
|
LAN78XX_FCT_RX_CTL_EN = $80000000;
|
|
LAN78XX_FCT_RX_CTL_RST = $40000000;
|
|
LAN78XX_FCT_RX_CTL_SBF = $02000000;
|
|
LAN78XX_FCT_RX_CTL_OVFL = $01000000;
|
|
LAN78XX_FCT_RX_CTL_DROP = $00800000;
|
|
LAN78XX_FCT_RX_CTL_NOT_EMPTY = $00400000;
|
|
LAN78XX_FCT_RX_CTL_EMPTY = $00200000;
|
|
LAN78XX_FCT_RX_CTL_DIS = $00100000;
|
|
LAN78XX_FCT_RX_CTL_USED_MASK = $0000FFFF;
|
LAN78XX FIFO controller TX FIFO control
LAN78XX_FCT_TX_* LAN78XX_FCT_TX_CTL = $0C4;
|
|
LAN78XX_FCT_TX_CTL_EN = $80000000;
|
|
LAN78XX_FCT_TX_CTL_RST = $40000000;
|
|
LAN78XX_FCT_TX_CTL_NOT_EMPTY = $00400000;
|
|
LAN78XX_FCT_TX_CTL_EMPTY = $00200000;
|
|
LAN78XX_FCT_TX_CTL_DIS = $00100000;
|
|
LAN78XX_FCT_TX_CTL_USED_MASK = $0000FFFF;
|
LAN78XX FCT RX FIFO end
LAN78XX_FCT_RX_FIFO_* LAN78XX_FCT_RX_FIFO_END = $0C8;
|
|
LAN78XX_FCT_RX_FIFO_END_MASK = $0000007F;
|
LAN78XX FCT TX FIFO end
LAN78XX_FCT_TX_FIFO_* LAN78XX_FCT_TX_FIFO_END = $0CC;
|
|
LAN78XX_FCT_TX_FIFO_END_MASK = $0000003F;
|
LAN78XX FCT flow control threshold
LAN78XX_FCT_FLOW_* LAN78XX_FCT_FLOW = $0D0;
|
|
LAN78XX_FCT_FLOW_OFF_MASK = $00007F00;
|
|
LAN78XX_FCT_FLOW_ON_MASK = $0000007F;
|
LAN78XX RX datapath storage
LAN78XX_RX_DP_STOR* LAN78XX_RX_DP_STOR = $0D4;
|
|
LAN78XX_RX_DP_STORE_TOT_RXUSED_MASK = $FFFF0000;
|
|
LAN78XX_RX_DP_STORE_UTX_RXUSED_MASK = $0000FFFF;
|
LAN78XX TX datapath storage
LAN78XX_TX_DP_STOR_* LAN78XX_TX_DP_STOR = $0D8;
|
|
LAN78XX_TX_DP_STORE_TOT_TXUSED_MASK = $FFFF0000;
|
|
LAN78XX_TX_DP_STORE_URX_TXUSED_MASK = $0000FFFF;
|
LAN78XX LTM belt idle register 0
LAN78XX_LTM_BELT_IDLE0_* LAN78XX_LTM_BELT_IDLE0 = $0E0;
|
|
LAN78XX_LTM_BELT_IDLE0_IDLE1000 = $0FFF0000;
|
|
LAN78XX_LTM_BELT_IDLE0_IDLE100 = $00000FFF;
|
LAN78XX LTM belt idle register 1
LAN78XX_LTM_BELT_IDLE1_* LAN78XX_LTM_BELT_IDLE1 = $0E4;
|
|
LAN78XX_LTM_BELT_IDLE1_IDLE10 = $00000FFF;
|
LAN78XX LTM belt active register 0
LAN78XX_LTM_BELT_ACT0_* LAN78XX_LTM_BELT_ACT0 = $0E8;
|
|
LAN78XX_LTM_BELT_ACT0_ACT1000 = $0FFF0000;
|
|
LAN78XX_LTM_BELT_ACT0_ACT100 = $00000FFF;
|
LAN78XX LTM belt active register 1
LAN78XX_LTM_BELT_ACT1_* LAN78XX_LTM_BELT_ACT1 = $0EC;
|
|
LAN78XX_LTM_BELT_ACT1_ACT10 = $00000FFF;
|
LAN78XX LTM inactivity timer register 0
LAN78XX_LTM_INACTIVE0_* LAN78XX_LTM_INACTIVE0 = $0F0;
|
|
LAN78XX_LTM_INACTIVE0_TIMER1000 = $FFFF0000;
|
|
LAN78XX_LTM_INACTIVE0_TIMER100 = $0000FFFF;
|
LAN78XX LTM inactivity timer register 1
LAN78XX_LTM_INACTIVE1_* LAN78XX_LTM_INACTIVE1 = $0F4;
|
|
LAN78XX_LTM_INACTIVE1_TIMER10 = $0000FFFF;
|
LAN78XX MAC control
LAN78XX_MAC_CR_* LAN78XX_MAC_CR = $100;
|
|
LAN78XX_MAC_CR_EEE_TX_CLK_STOP_EN = $00040000;
|
|
LAN78XX_MAC_CR_EEE_EN = $00020000;
|
|
LAN78XX_MAC_CR_EEE_TLAR_EN = $00010000;
|
|
LAN78XX_MAC_CR_ADP = $00002000;
|
|
LAN78XX_MAC_CR_AUTO_DUPLEX = $00001000;
|
|
LAN78XX_MAC_CR_AUTO_SPEED = $00000800;
|
|
LAN78XX_MAC_CR_LOOPBACK = $00000400;
|
|
LAN78XX_MAC_CR_BOLMT_MASK = $000000C0;
|
|
LAN78XX_MAC_CR_FULL_DUPLEX = $00000008;
|
|
LAN78XX_MAC_CR_SPEED_MASK = $00000006;
|
|
LAN78XX_MAC_CR_SPEED_1000 = $00000004;
|
|
LAN78XX_MAC_CR_SPEED_100 = $00000002;
|
|
LAN78XX_MAC_CR_SPEED_10 = $00000000;
|
|
LAN78XX_MAC_CR_RST = $00000001;
|
LAN78XX MAC receive
LAN78XX_MAC_RX_* LAN78XX_MAC_RX = $104;
|
|
LAN78XX_MAC_RX_MAX_SIZE_SHIFT = 16;
|
|
LAN78XX_MAC_RX_MAX_SIZE_MASK = LongWord($3FFF0000);
|
|
LAN78XX_MAC_RX_FCS_STRIP = $00000010;
|
|
LAN78XX_MAC_RX_VLAN_FSE = $00000004;
|
|
LAN78XX_MAC_RX_RXD = $00000002;
|
|
LAN78XX_MAC_RX_RXEN = $00000001;
|
LAN78XX MAC transmit
LAN78XX_MAC_TX_* LAN78XX_MAC_TX = $108;
|
|
LAN78XX_MAC_TX_BAD_FCS = $00000004;
|
|
LAN78XX_MAC_TX_TXD = $00000002;
|
|
LAN78XX_MAC_TX_TXEN = $00000001;
|
LAN78XX flow control
LAN78XX_FLOW_* LAN78XX_FLOW = $10C;
|
|
LAN78XX_FLOW_CR_FORCE_FC = $80000000;
|
|
LAN78XX_FLOW_CR_TX_FCEN = $40000000;
|
|
LAN78XX_FLOW_CR_RX_FCEN = $20000000;
|
|
LAN78XX_FLOW_CR_FPF = $10000000;
|
|
LAN78XX_FLOW_CR_FCPT_MASK = $0000FFFF;
|
LAN78XX random number seed value
LAN78XX_RAND_SEED_* LAN78XX_RAND_SEED = $110;
|
|
LAN78XX_RAND_SEED_MASK = $0000FFFF;
|
LAN78XX error status
LAN78XX_ERR_STS_* LAN78XX_ERR_STS = $114;
|
|
LAN78XX_ERR_STS_FERR = $00000100;
|
|
LAN78XX_ERR_STS_LERR = $00000080;
|
|
LAN78XX_ERR_STS_RFERR = $00000040;
|
|
LAN78XX_ERR_STS_ECERR = $00000010;
|
|
LAN78XX_ERR_STS_ALERR = $00000008;
|
|
LAN78XX_ERR_STS_URERR = $00000004;
|
LAN78XX MAC receive address high
LAN78XX_RX_ADDRH_* LAN78XX_RX_ADDRH = $118;
|
|
LAN78XX_RX_ADDRH_MASK = $0000FFFF;
|
LAN78XX MAC receive address low
LAN78XX_RX_ADDRL_* LAN78XX_RX_ADDRL = $11C;
|
|
LAN78XX_RX_ADDRL_MASK = $FFFFFFFF;
|
LAN78XX MII access
LAN78XX_MII_ACC_* LAN78XX_MII_ACC = $120;
|
|
LAN78XX_MII_ACC_PHY_ADDR_SHIFT = 11;
|
|
LAN78XX_MII_ACC_PHY_ADDR_MASK = $0000F800;
|
|
LAN78XX_MII_ACC_MIIRINDA_SHIFT = 6;
|
|
LAN78XX_MII_ACC_MIIRINDA_MASK = $000007C0;
|
|
LAN78XX_MII_ACC_MII_READ = $00000000;
|
|
LAN78XX_MII_ACC_MII_WRITE = $00000002;
|
|
LAN78XX_MII_ACC_MII_BUSY = $00000001;
|
LAN78XX MII data
LAN78XX_MII_DATA_* LAN78XX_MII_DATA = $124;
|
|
LAN78XX_MII_DATA_MASK = $0000FFFF;
|
LAN78XX MAC RGMII ID
LAN78XX_MAC_RGMII_ID_* LAN78XX_MAC_RGMII_ID = $128;
|
|
LAN78XX_MAC_RGMII_ID_TXC_DELAY_EN = $00000002;
|
|
LAN78XX_MAC_RGMII_ID_RXC_DELAY_EN = $00000001;
|
LAN78XX EEE TX LPI request delay count
LAN78XX_EEE_TX_LPI_REQ_* LAN78XX_EEE_TX_LPI_REQ_DLY = $130;
|
|
LAN78XX_EEE_TX_LPI_REQ_DLY_CNT_MASK = $FFFFFFFF;
|
LAN78XX EEE time wait TX system
LAN78XX_EEE_TW_TX_* LAN78XX_EEE_TW_TX_SYS = $134;
|
|
LAN78XX_EEE_TW_TX_SYS_CNT1G_MASK = $FFFF0000;
|
|
LAN78XX_EEE_TW_TX_SYS_CNT100M_MASK = $0000FFFF;
|
LAN78XX EEE TX LPI automatic removal delay
LAN78XX_EEE_TX_LPI_REM_* LAN78XX_EEE_TX_LPI_REM_DLY = $138;
|
|
LAN78XX_EEE_TX_LPI_REM_DLY_CNT = $00FFFFFF;
|
LAN78XX wakeup control and status
LAN78XX_WUCSR_* LAN78XX_WUCSR = $140;
|
|
LAN78XX_WUCSR_TESTMODE = $80000000;
|
|
LAN78XX_WUCSR_RFE_WAKE_EN = $00004000;
|
|
LAN78XX_WUCSR_EEE_TX_WAKE = $00002000;
|
|
LAN78XX_WUCSR_EEE_TX_WAKE_EN = $00001000;
|
|
LAN78XX_WUCSR_EEE_RX_WAKE_EN = $00000400;
|
|
LAN78XX_WUCSR_RFE_WAKE_FR = $00000200;
|
|
LAN78XX_WUCSR_STORE_WAKE = $00000100;
|
|
LAN78XX_WUCSR_PFDA_FR = $00000080;
|
|
LAN78XX_WUCSR_WUFR = $00000040;
|
|
LAN78XX_WUCSR_MPR = $00000020;
|
|
LAN78XX_WUCSR_BCST_FR = $00000010;
|
|
LAN78XX_WUCSR_PFDA_EN = $00000008;
|
|
LAN78XX_WUCSR_WAKE_EN = $00000004;
|
|
LAN78XX_WUCSR_MPEN = $00000002;
|
|
LAN78XX_WUCSR_BCST_EN = $00000001;
|
LAN78XX wakeup source
LAN78XX_WK_SRC_* LAN78XX_WK_SRC = $144;
|
|
LAN78XX_WK_SRC_GPIOX_INT_WK_SHIFT = 20;
|
|
LAN78XX_WK_SRC_GPIOX_INT_WK_MASK = $FFF00000;
|
|
LAN78XX_WK_SRC_IPV6_TCPSYN_RCD_WK = $00010000;
|
|
LAN78XX_WK_SRC_IPV4_TCPSYN_RCD_WK = $00008000;
|
|
LAN78XX_WK_SRC_EEE_TX_WK = $00004000;
|
|
LAN78XX_WK_SRC_EEE_RX_WK = $00002000;
|
|
LAN78XX_WK_SRC_GOOD_FR_WK = $00001000;
|
|
LAN78XX_WK_SRC_PFDA_FR_WK = $00000800;
|
|
LAN78XX_WK_SRC_MP_FR_WK = $00000400;
|
|
LAN78XX_WK_SRC_BCAST_FR_WK = $00000200;
|
|
LAN78XX_WK_SRC_WU_FR_WK = $00000100;
|
|
LAN78XX_WK_SRC_WUFF_MATCH_MASK = $0000001F;
|
LAN78XX wakeup filter X configuration
LAN78XX_WUF_CFG0_* LAN78XX_WUF_CFG0 = $150;
|
|
LAN78XX_NUM_OF_WUF_CFG = 32;
|
|
LAN78XX_WUF_CFG_BEGIN = LAN78XX_WUF_CFG0;
|
|
LAN78XX_WUF_CFG(index) = LAN78XX_WUF_CFG_BEGIN + (4 * (index)))
|
|
LAN78XX_WUF_CFGX_EN = $80000000;
|
|
LAN78XX_WUF_CFGX_TYPE_MASK = $03000000;
|
|
LAN78XX_WUF_CFGX_TYPE_MCAST = $02000000;
|
|
LAN78XX_WUF_CFGX_TYPE_ALL = $01000000;
|
|
LAN78XX_WUF_CFGX_TYPE_UCAST = $00000000;
|
|
LAN78XX_WUF_CFGX_OFFSET_SHIFT = 16;
|
|
LAN78XX_WUF_CFGX_OFFSET_MASK = $00FF0000;
|
|
LAN78XX_WUF_CFGX_CRC16_MASK = $0000FFFF;
|
LAN78XX wakeup filter X byte mask
LAN78XX_WUF_MASK_* LAN78XX_WUF_MASK0_0 = $200;
|
|
LAN78XX_WUF_MASK0_1 = $204;
|
|
LAN78XX_WUF_MASK0_2 = $208;
|
|
LAN78XX_WUF_MASK0_3 = $20C;
|
|
LAN78XX_NUM_OF_WUF_MASK = 32;
|
|
LAN78XX_WUF_MASK0_BEGIN = LAN78XX_WUF_MASK0_0;
|
|
LAN78XX_WUF_MASK1_BEGIN = LAN78XX_WUF_MASK0_1;
|
|
LAN78XX_WUF_MASK2_BEGIN = LAN78XX_WUF_MASK0_2;
|
|
LAN78XX_WUF_MASK3_BEGIN = LAN78XX_WUF_MASK0_3;
|
|
LAN78XX_WUF_MASK0(index) = LAN78XX_WUF_MASK0_BEGIN + = $10 * (index)))
|
|
LAN78XX_WUF_MASK1(index) = LAN78XX_WUF_MASK1_BEGIN + = $10 * (index)))
|
|
LAN78XX_WUF_MASK2(index) = LAN78XX_WUF_MASK2_BEGIN + = $10 * (index)))
|
|
LAN78XX_WUF_MASK3(index) = LAN78XX_WUF_MASK3_BEGIN + = $10 * (index)))
|
LAN78XX MAC address perfect filter
LAN78XX_MAF_* | 0x400 - 0x504 | |
LAN78XX_MAF_BASE = $400;
|
|
LAN78XX_MAF_HIX = $00;
|
|
LAN78XX_MAF_LOX = $04;
|
|
LAN78XX_NUM_OF_MAF = 33;
|
|
LAN78XX_MAF_LO_BEGIN = LAN78XX_MAF_BASE + LAN78XX_MAF_LOX;
|
|
LAN78XX_MAF_HI(index) = LAN78XX_MAF_BASE + (8 * (index)) + (LAN78XX_MAF_HIX))
|
|
LAN78XX_MAF_LO(index) = LAN78XX_MAF_BASE + (8 * (index)) + (LAN78XX_MAF_LOX))
|
|
LAN78XX_MAF_HI_VALID = $80000000;
|
|
LAN78XX_MAF_HI_TYPE_MASK = $40000000;
|
|
LAN78XX_MAF_HI_TYPE_SRC = $40000000;
|
|
LAN78XX_MAF_HI_TYPE_DST = $00000000;
|
|
LAN78XX_MAF_HI_ADDR_MASK = $0000FFFF;
|
|
LAN78XX_MAF_LO_ADDR_MASK = $FFFFFFFF;
|
|
LAN78XX wakeup control and status register 2
LAN78XX_WUCSR2_* LAN78XX_WUCSR2 = $600;
|
|
LAN78XX_WUCSR2_CSUM_DISABLE = $80000000;
|
|
LAN78XX_WUCSR2_NA_SA_SEL = $00000100;
|
|
LAN78XX_WUCSR2_NS_RCD = $00000080;
|
|
LAN78XX_WUCSR2_ARP_RCD = $00000040;
|
|
LAN78XX_WUCSR2_IPV6_TCPSYN_RCD = $00000020;
|
|
LAN78XX_WUCSR2_IPV4_TCPSYN_RCD = $00000010;
|
|
LAN78XX_WUCSR2_NS_OFFLOAD_EN = $00000008;
|
|
LAN78XX_WUCSR2_ARP_OFFLOAD_EN = $00000004;
|
|
LAN78XX_WUCSR2_IPV6_TCPSYN_WAKE_EN = $00000002;
|
|
LAN78XX_WUCSR2_IPV4_TCPSYN_WAKE_EN = $00000001;
|
LAN78XX NS1 IPV6 destination address
LAN78XX_NS1_IPV6_ADDR_DEST_* | 0x610h - 0x61C | |
| 0x650h - 0x65C | |
LAN78XX_NS1_IPV6_ADDR_DEST0 = $610;
|
|
LAN78XX_NS1_IPV6_ADDR_DEST1 = $614;
|
|
LAN78XX_NS1_IPV6_ADDR_DEST2 = $618;
|
|
LAN78XX_NS1_IPV6_ADDR_DEST3 = $61C;
|
|
LAN78XX NS1 IPV6 source address
LAN78XX_NS1_IPV6_ADDR_SRC_* | 0x620 - 0x62C | |
| 0x660 - 0x66C | |
LAN78XX_NS1_IPV6_ADDR_SRC0 = $620;
|
|
LAN78XX_NS1_IPV6_ADDR_SRC1 = $624;
|
|
LAN78XX_NS1_IPV6_ADDR_SRC2 = $628;
|
|
LAN78XX_NS1_IPV6_ADDR_SRC3 = $62C;
|
|
LAN78XX NS1 ICMPV6 address 0 register
LAN78XX_NS1_ICMPV6_ADDR_* | 0x630 - 0x63C | |
| 0x670 - 0x67C | |
LAN78XX_NS1_ICMPV6_ADDR0_0 = $630;
|
|
LAN78XX_NS1_ICMPV6_ADDR0_1 = $634;
|
|
LAN78XX_NS1_ICMPV6_ADDR0_2 = $638;
|
|
LAN78XX_NS1_ICMPV6_ADDR0_3 = $63C;
|
|
LAN78XX NS1 ICMPV6 address 1 register
LAN78XX_NS1_ICMPV6_ADDR1_* | 0x640 - 0x64C | |
| 0x680 - 0x68C | |
LAN78XX_NS1_ICMPV6_ADDR1_0 = $640;
|
|
LAN78XX_NS1_ICMPV6_ADDR1_1 = $644;
|
|
LAN78XX_NS1_ICMPV6_ADDR1_2 = $648;
|
|
LAN78XX_NS1_ICMPV6_ADDR1_3 = $64C;
|
|
LAN78XX NS2 IPV6 destination address
LAN78XX_NS2_IPV6_ADDR_DEST_* LAN78XX_NS2_IPV6_ADDR_DEST0 = $650;
|
|
LAN78XX_NS2_IPV6_ADDR_DEST1 = $654;
|
|
LAN78XX_NS2_IPV6_ADDR_DEST2 = $658;
|
|
LAN78XX_NS2_IPV6_ADDR_DEST3 = $65C;
|
LAN78XX NS2 IPV6 source address
LAN78XX_NS2_IPV6_ADDR_SRC_* LAN78XX_NS2_IPV6_ADDR_SRC0 = $660;
|
|
LAN78XX_NS2_IPV6_ADDR_SRC1 = $664;
|
|
LAN78XX_NS2_IPV6_ADDR_SRC2 = $668;
|
|
LAN78XX_NS2_IPV6_ADDR_SRC3 = $66C;
|
LAN78XX NS2 ICMPV6 address 0 register
LAN78XX_NS2_ICMPV6_ADDR0_* LAN78XX_NS2_ICMPV6_ADDR0_0 = $670;
|
|
LAN78XX_NS2_ICMPV6_ADDR0_1 = $674;
|
|
LAN78XX_NS2_ICMPV6_ADDR0_2 = $678;
|
|
LAN78XX_NS2_ICMPV6_ADDR0_3 = $67C;
|
LAN78XX NS2 ICMPV6 address 1 register
LAN78XX_NS2_ICMPV6_ADDR1_* LAN78XX_NS2_ICMPV6_ADDR1_0 = $680;
|
|
LAN78XX_NS2_ICMPV6_ADDR1_1 = $684;
|
|
LAN78XX_NS2_ICMPV6_ADDR1_2 = $688;
|
|
LAN78XX_NS2_ICMPV6_ADDR1_3 = $68C;
|
LAN78XX SYN IPV4 source address
LAN78XX_SYN_IPV4_ADDR_SRC_* LAN78XX_SYN_IPV4_ADDR_SRC = $690;
|
LAN78XX SYN IPV4 destination address
LAN78XX_SYN_IPV4_ADDR_DEST_* LAN78XX_SYN_IPV4_ADDR_DEST = $694;
|
LAN78XX SYN IPV4 TCP ports
LAN78XX_SYN_IPV4_TCP_PORTS_* LAN78XX_SYN_IPV4_TCP_PORTS = $698;
|
|
LAN78XX_SYN_IPV4_TCP_PORTS_IPV4_DEST_PORT_SHIFT = 16;
|
|
LAN78XX_SYN_IPV4_TCP_PORTS_IPV4_DEST_PORT_MASK = $FFFF0000;
|
|
LAN78XX_SYN_IPV4_TCP_PORTS_IPV4_SRC_PORT_MASK = $0000FFFF;
|
LAN78XX SYN IPV6 source address
LAN78XX_SYN_IPV6_ADDR_SRC_* LAN78XX_SYN_IPV6_ADDR_SRC0 = $69C;
|
|
LAN78XX_SYN_IPV6_ADDR_SRC1 = $6A0;
|
|
LAN78XX_SYN_IPV6_ADDR_SRC2 = $6A4;
|
|
LAN78XX_SYN_IPV6_ADDR_SRC3 = $6A8;
|
LAN78XX SYN IPV6 destination address
LAN78XX_SYN_IPV6_ADDR_DEST_* LAN78XX_SYN_IPV6_ADDR_DEST0 = $6AC;
|
|
LAN78XX_SYN_IPV6_ADDR_DEST1 = $6B0;
|
|
LAN78XX_SYN_IPV6_ADDR_DEST2 = $6B4;
|
|
LAN78XX_SYN_IPV6_ADDR_DEST3 = $6B8;
|
LAN78XX SYN IPV6 TCP ports
LAN78XX_SYN_IPV6_TCP_PORTS_* LAN78XX_SYN_IPV6_TCP_PORTS = $6BC;
|
|
LAN78XX_SYN_IPV6_TCP_PORTS_IPV6_DEST_PORT_SHIFT = 16;
|
|
LAN78XX_SYN_IPV6_TCP_PORTS_IPV6_DEST_PORT_MASK = $FFFF0000;
|
|
LAN78XX_SYN_IPV6_TCP_PORTS_IPV6_SRC_PORT_MASK = $0000FFFF;
|
LAN78XX ARP sender protocol address
LAN78XX_ARP_SPA_* LAN78XX_ARP_SPA = $6C0;
|
LAN78XX ARP target protocol address
LAN78XX_ARP_TPA_* LAN78XX_ARP_TPA = $6C4;
|
LAN78XX PHY device identifier
LAN78XX_PHY_DEV_ID_* LAN78XX_PHY_DEV_ID = $700;
|
|
LAN78XX_PHY_DEV_ID_REV_SHIFT = 28;
|
|
LAN78XX_PHY_DEV_ID_REV_MASK = $F0000000;
|
|
LAN78XX_PHY_DEV_ID_MODEL_SHIFT = 22;
|
|
LAN78XX_PHY_DEV_ID_MODEL_MASK = $0FC00000;
|
|
LAN78XX_PHY_DEV_ID_OUI_MASK = $003FFFFF;
|
LAN78XX OTP
LAN78XX_OTP_* LAN78XX_OTP_BASE_ADDR = $00001000;
|
|
LAN78XX_OTP_ADDR_RANGE = $1FF;
|
|
LAN78XX_OTP_PWR_DN = LAN78XX_OTP_BASE_ADDR + 4 * $00;
|
|
LAN78XX_OTP_PWR_DN_PWRDN_N = $01;
|
|
LAN78XX_OTP_ADDR1 = LAN78XX_OTP_BASE_ADDR + 4 * $01;
|
|
LAN78XX_OTP_ADDR1_15_11 = $1F;
|
|
LAN78XX_OTP_ADDR2 = LAN78XX_OTP_BASE_ADDR + 4 * $02;
|
|
LAN78XX_OTP_ADDR2_10_3 = $FF;
|
|
LAN78XX_OTP_ADDR3 = LAN78XX_OTP_BASE_ADDR + 4 * $03;
|
|
LAN78XX_OTP_ADDR3_2_0 = $03;
|
|
LAN78XX_OTP_PRGM_DATA = LAN78XX_OTP_BASE_ADDR + 4 * $04;
|
|
LAN78XX_OTP_PRGM_MODE = LAN78XX_OTP_BASE_ADDR + 4 * $05;
|
|
LAN78XX_OTP_PRGM_MODE_BYTE = $01;
|
|
LAN78XX_OTP_RD_DATA = LAN78XX_OTP_BASE_ADDR + 4 * $06;
|
|
LAN78XX_OTP_FUNC_CMD = LAN78XX_OTP_BASE_ADDR + 4 * $08;
|
|
LAN78XX_OTP_FUNC_CMD_RESET = $04;
|
|
LAN78XX_OTP_FUNC_CMD_PROGRAM = $02;
|
|
LAN78XX_OTP_FUNC_CMD_READ = $01;
|
|
LAN78XX_OTP_TST_CMD = LAN78XX_OTP_BASE_ADDR + 4 * $09;
|
|
LAN78XX_OTP_TST_CMD_TEST_DEC_SEL = $10;
|
|
LAN78XX_OTP_TST_CMD_PRGVRFY = $08;
|
|
LAN78XX_OTP_TST_CMD_WRTEST = $04;
|
|
LAN78XX_OTP_TST_CMD_TESTDEC = $02;
|
|
LAN78XX_OTP_TST_CMD_BLANKCHECK = $01;
|
|
LAN78XX_OTP_CMD_GO = LAN78XX_OTP_BASE_ADDR + 4 * $0A;
|
|
LAN78XX_OTP_CMD_GO_GO = $01;
|
|
LAN78XX_OTP_PASS_FAIL = LAN78XX_OTP_BASE_ADDR + 4 * $0B;
|
|
LAN78XX_OTP_PASS_FAIL_PASS = $02;
|
|
LAN78XX_OTP_PASS_FAIL_FAIL = $01;
|
|
LAN78XX_OTP_STATUS = LAN78XX_OTP_BASE_ADDR + 4 * $0C;
|
|
LAN78XX_OTP_STATUS_OTP_LOCK = $10;
|
|
LAN78XX_OTP_STATUS_WEB = $08;
|
|
LAN78XX_OTP_STATUS_PGMEN = $04;
|
|
LAN78XX_OTP_STATUS_CPUMPEN = $02;
|
|
LAN78XX_OTP_STATUS_BUSY = $01;
|
|
LAN78XX_OTP_MAX_PRG = LAN78XX_OTP_BASE_ADDR + 4 * $0D;
|
|
LAN78XX_OTP_MAX_PRG_MAX_PROG = $1F;
|
|
LAN78XX_OTP_INTR_STATUS = LAN78XX_OTP_BASE_ADDR + 4 * $10;
|
|
LAN78XX_OTP_INTR_STATUS_READY = $01;
|
|
LAN78XX_OTP_INTR_MASK = LAN78XX_OTP_BASE_ADDR + 4 * $11;
|
|
LAN78XX_OTP_INTR_MASK_READY = $01;
|
|
LAN78XX_OTP_RSTB_PW1 = LAN78XX_OTP_BASE_ADDR + 4 * $14;
|
|
LAN78XX_OTP_RSTB_PW2 = LAN78XX_OTP_BASE_ADDR + 4 * $15;
|
|
LAN78XX_OTP_PGM_PW1 = LAN78XX_OTP_BASE_ADDR + 4 * $18;
|
|
LAN78XX_OTP_PGM_PW2 = LAN78XX_OTP_BASE_ADDR + 4 * $19;
|
|
LAN78XX_OTP_READ_PW1 = LAN78XX_OTP_BASE_ADDR + 4 * $1C;
|
|
LAN78XX_OTP_READ_PW2 = LAN78XX_OTP_BASE_ADDR + 4 * $1D;
|
|
LAN78XX_OTP_TCRST = LAN78XX_OTP_BASE_ADDR + 4 * $20;
|
|
LAN78XX_OTP_RSRD = LAN78XX_OTP_BASE_ADDR + 4 * $21;
|
|
LAN78XX_OTP_TREADEN_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $22;
|
|
LAN78XX_OTP_TDLES_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $23;
|
|
LAN78XX_OTP_TWWL_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $24;
|
|
LAN78XX_OTP_TDLEH_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $25;
|
|
LAN78XX_OTP_TWPED_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $26;
|
|
LAN78XX_OTP_TPES_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $27;
|
|
LAN78XX_OTP_TCPS_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $28;
|
|
LAN78XX_OTP_TCPH_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $29;
|
|
LAN78XX_OTP_TPGMVFY_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $2A;
|
|
LAN78XX_OTP_TPEH_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $2B;
|
|
LAN78XX_OTP_TPGRST_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $2C;
|
|
LAN78XX_OTP_TCLES_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $2D;
|
|
LAN78XX_OTP_TCLEH_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $2E;
|
|
LAN78XX_OTP_TRDES_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $2F;
|
|
LAN78XX_OTP_TBCACC_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $30;
|
|
LAN78XX_OTP_TAAC_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $31;
|
|
LAN78XX_OTP_TACCT_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $32;
|
|
LAN78XX_OTP_TRDEP_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $38;
|
|
LAN78XX_OTP_TPGSV_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $39;
|
|
LAN78XX_OTP_TPVSR_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $3A;
|
|
LAN78XX_OTP_TPVHR_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $3B;
|
|
LAN78XX_OTP_TPVSA_VAL = LAN78XX_OTP_BASE_ADDR + 4 * $3C;
|
|
LAN78XX/LAN88XX interrupt mask
LAN88XX_INT_MASK_* LAN88XX_INT_MASK = $19;
|
|
LAN88XX_INT_MASK_MDINTPIN_EN = $8000;
|
|
LAN88XX_INT_MASK_SPEED_CHANGE = $4000;
|
|
LAN88XX_INT_MASK_LINK_CHANGE = $2000;
|
|
LAN88XX_INT_MASK_FDX_CHANGE = $1000;
|
|
LAN88XX_INT_MASK_AUTONEG_ERR = $0800;
|
|
LAN88XX_INT_MASK_AUTONEG_DONE = $0400;
|
|
LAN88XX_INT_MASK_POE_DETECT = $0200;
|
|
LAN88XX_INT_MASK_SYMBOL_ERR = $0100;
|
|
LAN88XX_INT_MASK_FAST_LINK_FAIL = $0080;
|
|
LAN88XX_INT_MASK_WOL_EVENT = $0040;
|
|
LAN88XX_INT_MASK_EXTENDED_INT = $0020;
|
|
LAN88XX_INT_MASK_RESERVED = $0010;
|
|
LAN88XX_INT_MASK_FALSE_CARRIER = $0008;
|
|
LAN88XX_INT_MASK_LINK_SPEED_DS = $0004;
|
|
LAN88XX_INT_MASK_MASTER_SLAVE_DONE = $0002;
|
|
LAN88XX_INT_MASK_RX__ER = $0001;
|
LAN78XX/LAN88XX interrupt status
LAN88XX_INT_STS_* LAN88XX_INT_STS = $1A;
|
|
LAN88XX_INT_STS_INT_ACTIVE = $8000;
|
|
LAN88XX_INT_STS_SPEED_CHANGE = $4000;
|
|
LAN88XX_INT_STS_LINK_CHANGE = $2000;
|
|
LAN88XX_INT_STS_FDX_CHANGE = $1000;
|
|
LAN88XX_INT_STS_AUTONEG_ERR = $0800;
|
|
LAN88XX_INT_STS_AUTONEG_DONE = $0400;
|
|
LAN88XX_INT_STS_POE_DETECT = $0200;
|
|
LAN88XX_INT_STS_SYMBOL_ERR = $0100;
|
|
LAN88XX_INT_STS_FAST_LINK_FAIL = $0080;
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LAN88XX_INT_STS_WOL_EVENT = $0040;
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LAN88XX_INT_STS_EXTENDED_INT = $0020;
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LAN88XX_INT_STS_RESERVED = $0010;
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LAN88XX_INT_STS_FALSE_CARRIER = $0008;
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LAN88XX_INT_STS_LINK_SPEED_DS = $0004;
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LAN88XX_INT_STS_MASTER_SLAVE_DONE = $0002;
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LAN88XX_INT_STS_RX_ER = $0001;
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LAN78XX/LAN88XX extended page
LAN88XX_EXT_PAGE_* LAN88XX_EXT_PAGE_ACCESS = $1F;
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LAN88XX_EXT_PAGE_SPACE_0 = $0000;
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LAN88XX_EXT_PAGE_SPACE_1 = $0001;
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LAN88XX_EXT_PAGE_SPACE_2 = $0002;
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LAN78XX/LAN88XX extended mode control
LAN88XX_EXT_MODE_CTRL_* LAN88XX_EXT_MODE_CTRL = $13;
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LAN88XX_EXT_MODE_CTRL_MDIX_MASK = $000C;
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LAN88XX_EXT_MODE_CTRL_AUTO_MDIX = $0000;
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LAN88XX_EXT_MODE_CTRL_MDI = $0008;
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LAN88XX_EXT_MODE_CTRL_MDI_X = $000C;
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LAN78XX/LAN88XX MMD 3
LAN88XX_MMD3__* LAN88XX_MMD3_CHIP_ID = 32877;
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LAN88XX_MMD3_CHIP_REV = 32878;
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Type definitions
To be documented
Public variables
To be documented
Function declarations
To be documented
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