Difference between revisions of "Unit PlatformARM"
From Ultibo.org
Line 10: | Line 10: | ||
---- | ---- | ||
− | '' | + | |
+ | |||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''ARM Mode constants ''' <code> ARM_MODE_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|Bits 4..0 in the ARM program status register | ||
+ | |- | ||
+ | |colspan="2"|See: A2.2 Processor Modes of the ARM Architecture Reference Manual and also A2.5.7 The mode bits | ||
+ | |- | ||
+ | |colspan="2"|See also: B1.3.1 ARM processor modes of the ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition) | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>ARM_MODE_USR = $10;</code> | ||
+ | | Normal User Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_FIQ = $11;</code> | ||
+ | | FIQ Processing Fast Interrupts Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_IRQ = $12;</code> | ||
+ | | IRQ Processing Standard Interrupts Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_SVC = $13;</code> | ||
+ | | Supervisor Processing Software Interrupts Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_MON = $16;</code> | ||
+ | | Secure Monitor Mode (For Secure / Non Secure Switching) | ||
+ | |- | ||
+ | | <code>ARM_MODE_MON = $16;</code> | ||
+ | | Secure Monitor Mode (For Secure / Non Secure Switching) | ||
+ | |- | ||
+ | | <code>ARM_MODE_ABT = $17;</code> | ||
+ | | Abort Processing memory Faults Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_HYP = $1A;</code> | ||
+ | | Hypervisor Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_UND = $1B;</code> | ||
+ | | Undefined Processing Undefined Instructions Mode | ||
+ | |- | ||
+ | | <code>ARM_MODE_SYS = $1F;</code> | ||
+ | | System Running Priviledged Operating System Tasks Mode | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>ARM_MODE_BITS = $0000001F;</code> | ||
+ | | Mask of the mode bits in the program status register | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''ARM Interrupt disable constants''' <code> ARM_I_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>|colspan="2"|Bits 7 and 6 in the ARM program status register </code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | |colspan="2"|See: A2.5.6 "The interrupt disable bits" of the ARM Architecture Reference Manual | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>ARM_I_BIT = $00000080;</code> | ||
+ | | IRQs disabled when set to 1 | ||
+ | |- | ||
+ | | <code>ARM_F_BIT = $00000040;</code> | ||
+ | | FIQs disabled when set to 1 | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''ARM thumb and jazelle constants ''' <code> ARM_*_BIT </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|Bits 24 and 5 in the ARM program status register | ||
+ | |- | ||
+ | |colspan="2"|See: A2.5.8 "The T and J bits" of the ARM Architecture Reference Manual | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>ARM_T_BIT = $00000020;</code> | ||
+ | | Thumb mode enabled when set to 1 | ||
+ | |- | ||
+ | | <code>ARM_J_BIT = $01000000;</code> | ||
+ | | Jazelle mode enabled when set to 1 | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''ARM Abort constants ''' <code> ARM_A_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | |colspan="2"|Bit 8 in the ARM program status register | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>ARM_A_BIT = $00000100;</code> | ||
+ | | Data Abort masked when set to 1 | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''ARM boot tag constants ''' <code> ATAG_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>ATAG_NONE = $00000000;</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | | <code>ATAG_CORE = $54410001;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_MEM = $54410002;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_VIDEOTEXT = $54410003;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_RAMDISK = $54410004;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_INITRD2 = $54410005;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_SERIAL = $54410006;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_REVISION = $54410007;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_VIDEOLFB = $54410008;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ATAG_CMDLINE = $54410009;</code> | ||
+ | | | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>ARMTAGS_INITIAL = $FFFFFFFF;</code> | ||
+ | | | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''ARM machine type constants''' <code> ARM_MACHINE_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>ARM_MACHINE_VERSATILE_PB = $00000183;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ARM_MACHINE_BCM2708 = $00000C42;</code> | ||
+ | | | ||
+ | |- | ||
+ | | <code>ARM_MACHINE_BCM2709 = $00000C42;</code> | ||
+ | | BCM2709 uses the same Machine Type as BCM2708 | ||
+ | |- | ||
+ | | <code>ARM_MACHINE_BCM2710 = $00000C42;</code> | ||
+ | | BCM2710 uses the same Machine Type as BCM2708 | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
=== Type definitions === | === Type definitions === |
Revision as of 03:20, 14 December 2016
Return to Unit Reference
Contents
[hide]Description
To be documented
Constants
[Expand]
ARM Mode constants
ARM_MODE_*
[Expand]
ARM Interrupt disable constants
ARM_I_*
[Expand]
ARM thumb and jazelle constants
ARM_*_BIT
[Expand]
ARM Abort constants
ARM_A_*
[Expand]
ARM boot tag constants
ATAG_*
[Expand]
ARM machine type constants
ARM_MACHINE_*
Type definitions
To be documented
Public variables
To be documented
Function declarations
Initialization functions
ARM platform functions
[Expand]
procedure ARMParseBootTags;
Description: Extract some information from the ARM boot tag list and use it to load the memory manager, some other information is stored in variables for future use
[Expand]
procedure ARMParseCommandLine;
Description: Setup argc, argv and cmdline and process known command line options
[Expand]
procedure ARMParseEnvironment;
Description: Setup envp and process known environment options
[Expand]
function ARMGetSP:PtrUInt; assembler; nostackframe;
Description: Get the current stack pointer (SP)
[Expand]
function ARMGetPC:PtrUInt; assembler; nostackframe;
Description: Get the current program counter (PC)
[Expand]
function ARMGetIRQ:Boolean; assembler; nostackframe;
Description: Get Interrupts (IRQ) state
[Expand]
procedure ARMEnableIRQ; assembler; nostackframe;
Description: Enable Interrupts (IRQ) unconditionally
[Expand]
procedure ARMDisableIRQ; assembler; nostackframe;
Description: Disable Interrupts (IRQ) unconditionally
[Expand]
function ARMSaveIRQ:TIRQMask; assembler; nostackframe;
Description: Disable Interrupts (IRQ) and return the previous state
[Expand]
function ARMRestoreIRQ(IRQMask:TIRQMask):TIRQMask; assembler; nostackframe;
Description: Restore Interrupts (IRQ) to a previous state
[Expand]
function ARMGetFIQ:Boolean; assembler; nostackframe;
Description: Get Fast Interrupts (FIQ) state
[Expand]
procedure ARMEnableFIQ; assembler; nostackframe;
Description: Enable Fast Interrupts (FIQ) unconditionally
[Expand]
procedure ARMDisableFIQ; assembler; nostackframe;
Description: Disable Fast Interrupts (FIQ) unconditionally
[Expand]
function ARMSaveFIQ:TFIQMask; assembler; nostackframe;
Description: Disable Fast Interrupts (FIQ) and return the previous state
[Expand]
function ARMRestoreFIQ(FIQMask:TFIQMask):TFIQMask; assembler; nostackframe;
Description: Restore Fast Interrupts (FIQ) to a previous state
[Expand]
procedure ARMEnableIRQFIQ; assembler; nostackframe;
Description: Enable Interrupts and Fast Interrupts (IRQ/FIQ) unconditionally
[Expand]
procedure ARMDisableIRQFIQ; assembler; nostackframe;
Description: Disable Interrupts and Fast Interrupts (IRQ/FIQ) unconditionally
[Expand]
function ARMSaveIRQFIQ:TIRQFIQMask; assembler; nostackframe;
Description: Disable Interrupts and Fast Interrupts (IRQ/FIQ) and return the previous state
[Expand]
function ARMRestoreIRQFIQ(IRQFIQMask:TIRQFIQMask):TIRQFIQMask; assembler; nostackframe;
Description: Restore Interrupts and Fast Interrupts (IRQ/FIQ) to a previous state
[Expand]
procedure ARMEnableAbort; assembler; nostackframe;
Description: Enable Aborts unconditionally
[Expand]
procedure ARMDisableAbort; assembler; nostackframe;
Description: Disable Aborts unconditionally
[Expand]
function ARMSaveAbort:TAbortMask; assembler; nostackframe;
Description: Disable Aborts and return the previous state
[Expand]
function ARMRestoreAbort(AbortMask:TAbortMask):TAbortMask; assembler; nostackframe;
Description: Restore Aborts to a previous state
ARM helper functions
Return to Unit Reference