Difference between revisions of "Unit PlatformARM"

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''To be documented''
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''ARM Mode constants ''' <code> ARM_MODE_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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|colspan="2"|Bits 4..0 in the ARM program status register 
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|-
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|colspan="2"|See: A2.2 Processor Modes of the ARM Architecture Reference Manual and also A2.5.7 The mode bits
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|-
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|colspan="2"|See also: B1.3.1 ARM processor modes of the ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition)
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>ARM_MODE_USR = $10;</code>
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| Normal User Mode
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|-
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| <code>ARM_MODE_FIQ = $11;</code>
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| FIQ Processing Fast Interrupts Mode
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|-
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| <code>ARM_MODE_IRQ = $12;</code>
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| IRQ Processing Standard Interrupts Mode
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|-
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| <code>ARM_MODE_SVC = $13;</code>
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| Supervisor Processing Software Interrupts Mode
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|-
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| <code>ARM_MODE_MON = $16;</code>
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| Secure Monitor Mode (For Secure / Non Secure Switching)
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|-
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| <code>ARM_MODE_MON = $16;</code>
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| Secure Monitor Mode (For Secure / Non Secure Switching)
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|-
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| <code>ARM_MODE_ABT = $17;</code>
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| Abort Processing memory Faults Mode
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|-
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| <code>ARM_MODE_HYP = $1A;</code>
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| Hypervisor Mode
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|-
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| <code>ARM_MODE_UND = $1B;</code>
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| Undefined Processing Undefined Instructions Mode
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|-
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| <code>ARM_MODE_SYS = $1F;</code>
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| System Running Priviledged Operating System Tasks Mode
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>ARM_MODE_BITS = $0000001F;</code>
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| Mask of the mode bits in the program status register
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|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''ARM Interrupt disable constants''' <code> ARM_I_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>|colspan="2"|Bits 7 and 6 in the ARM program status register </code>
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| style="width: 50%;"|&nbsp;
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|-
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|colspan="2"|See: A2.5.6 "The interrupt disable bits" of the ARM Architecture Reference Manual
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>ARM_I_BIT = $00000080;</code>
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| IRQs disabled when set to 1
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|-
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| <code>ARM_F_BIT = $00000040;</code>
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| FIQs disabled when set to 1
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|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''ARM thumb and jazelle constants ''' <code> ARM_*_BIT </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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|colspan="2"|Bits 24 and 5 in the ARM program status register
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|-
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|colspan="2"|See: A2.5.8 "The T and J bits" of the ARM Architecture Reference Manual
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>ARM_T_BIT = $00000020;</code>
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| Thumb mode enabled when set to 1
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|-
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| <code>ARM_J_BIT = $01000000;</code>
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| Jazelle mode enabled when set to 1
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|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''ARM Abort constants ''' <code> ARM_A_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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|colspan="2"|Bit 8 in the ARM program status register
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>ARM_A_BIT = $00000100;</code>
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| Data Abort masked when set to 1
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|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''ARM boot tag constants ''' <code> ATAG_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>ATAG_NONE = $00000000;</code>
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| style="width: 50%;"|&nbsp;
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|-
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| <code>ATAG_CORE = $54410001;</code>
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| &nbsp;
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|-
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| <code>ATAG_MEM = $54410002;</code>
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| &nbsp;
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|-
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| <code>ATAG_VIDEOTEXT = $54410003;</code>
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| &nbsp;
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|-
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| <code>ATAG_RAMDISK = $54410004;</code>
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| &nbsp;
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|-
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| <code>ATAG_INITRD2 = $54410005;</code>
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| &nbsp;
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|-
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| <code>ATAG_SERIAL = $54410006;</code>
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| &nbsp;
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|-
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| <code>ATAG_REVISION = $54410007;</code>
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| &nbsp;
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|-
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| <code>ATAG_VIDEOLFB = $54410008;</code>
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| &nbsp;
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|-
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| <code>ATAG_CMDLINE = $54410009;</code>
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| &nbsp;
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>ARMTAGS_INITIAL = $FFFFFFFF;</code>
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| &nbsp;
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|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''ARM machine type constants''' <code> ARM_MACHINE_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>ARM_MACHINE_VERSATILE_PB = $00000183;</code>
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| &nbsp;
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|-
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| <code>ARM_MACHINE_BCM2708 = $00000C42;</code>
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| &nbsp;
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|-
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| <code>ARM_MACHINE_BCM2709 = $00000C42;</code>
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| BCM2709 uses the same Machine Type as BCM2708
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|-
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| <code>ARM_MACHINE_BCM2710 = $00000C42;</code>
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| BCM2710 uses the same Machine Type as BCM2708
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|-
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|}
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</div></div>
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<br />
  
 
=== Type definitions ===
 
=== Type definitions ===

Revision as of 03:20, 14 December 2016

Return to Unit Reference


Description

To be documented

Constants


ARM Mode constants ARM_MODE_*
Bits 4..0 in the ARM program status register
See: A2.2 Processor Modes of the ARM Architecture Reference Manual and also A2.5.7 The mode bits
See also: B1.3.1 ARM processor modes of the ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition)
 
ARM_MODE_USR = $10; Normal User Mode
ARM_MODE_FIQ = $11; FIQ Processing Fast Interrupts Mode
ARM_MODE_IRQ = $12; IRQ Processing Standard Interrupts Mode
ARM_MODE_SVC = $13; Supervisor Processing Software Interrupts Mode
ARM_MODE_MON = $16; Secure Monitor Mode (For Secure / Non Secure Switching)
ARM_MODE_MON = $16; Secure Monitor Mode (For Secure / Non Secure Switching)
ARM_MODE_ABT = $17; Abort Processing memory Faults Mode
ARM_MODE_HYP = $1A; Hypervisor Mode
ARM_MODE_UND = $1B; Undefined Processing Undefined Instructions Mode
ARM_MODE_SYS = $1F; System Running Priviledged Operating System Tasks Mode
 
ARM_MODE_BITS = $0000001F; Mask of the mode bits in the program status register


ARM Interrupt disable constants ARM_I_*
colspan="2"|Bits 7 and 6 in the ARM program status register  
See: A2.5.6 "The interrupt disable bits" of the ARM Architecture Reference Manual
 
ARM_I_BIT = $00000080; IRQs disabled when set to 1
ARM_F_BIT = $00000040; FIQs disabled when set to 1


ARM thumb and jazelle constants ARM_*_BIT
Bits 24 and 5 in the ARM program status register
See: A2.5.8 "The T and J bits" of the ARM Architecture Reference Manual
 
ARM_T_BIT = $00000020; Thumb mode enabled when set to 1
ARM_J_BIT = $01000000; Jazelle mode enabled when set to 1


ARM Abort constants ARM_A_*
Bit 8 in the ARM program status register
 
ARM_A_BIT = $00000100; Data Abort masked when set to 1


ARM boot tag constants ATAG_*
ATAG_NONE = $00000000;  
ATAG_CORE = $54410001;  
ATAG_MEM = $54410002;  
ATAG_VIDEOTEXT = $54410003;  
ATAG_RAMDISK = $54410004;  
ATAG_INITRD2 = $54410005;  
ATAG_SERIAL = $54410006;  
ATAG_REVISION = $54410007;  
ATAG_VIDEOLFB = $54410008;  
ATAG_CMDLINE = $54410009;  
 
ARMTAGS_INITIAL = $FFFFFFFF;  


ARM machine type constants ARM_MACHINE_*
ARM_MACHINE_VERSATILE_PB = $00000183;  
ARM_MACHINE_BCM2708 = $00000C42;  
ARM_MACHINE_BCM2709 = $00000C42; BCM2709 uses the same Machine Type as BCM2708
ARM_MACHINE_BCM2710 = $00000C42; BCM2710 uses the same Machine Type as BCM2708


Type definitions

To be documented

Public variables

To be documented

Function declarations


Initialization functions 

procedure ARMInit;
Description: To be documented
Note None documented


ARM platform functions 

procedure ARMParseBootTags;
Description: Extract some information from the ARM boot tag list and use it to load the memory manager, some other information is stored in variables for future use
Note None documented 


procedure ARMParseCommandLine;
Description: Setup argc, argv and cmdline and process known command line options
Note None documented 


procedure ARMParseEnvironment;
Description: Setup envp and process known environment options
Note None documented 


function ARMGetSP:PtrUInt; assembler; nostackframe;
Description: Get the current stack pointer (SP)
Note None documented 


function ARMGetPC:PtrUInt; assembler; nostackframe;
Description: Get the current program counter (PC)
Note None documented 


function ARMGetIRQ:Boolean; assembler; nostackframe;
Description: Get Interrupts (IRQ) state
Return True is enabled, False if disabled (Returned in R0) 


procedure ARMEnableIRQ; assembler; nostackframe;
Description: Enable Interrupts (IRQ) unconditionally
Note None documented 


procedure ARMDisableIRQ; assembler; nostackframe;
Description: Disable Interrupts (IRQ) unconditionally
Note None documented 


function ARMSaveIRQ:TIRQMask; assembler; nostackframe;
Description: Disable Interrupts (IRQ) and return the previous state
Return IRQ state when called (Returned in R0) 


function ARMRestoreIRQ(IRQMask:TIRQMask):TIRQMask; assembler; nostackframe;
Description: Restore Interrupts (IRQ) to a previous state
IRQMask IRQ state to restore (Passed in R0)
Return IRQ state when called (Returned in R0) 


function ARMGetFIQ:Boolean; assembler; nostackframe;
Description: Get Fast Interrupts (FIQ) state
Return True is enabled, False if disabled (Returned in R0) 


procedure ARMEnableFIQ; assembler; nostackframe;
Description: Enable Fast Interrupts (FIQ) unconditionally
Note None documented 


procedure ARMDisableFIQ; assembler; nostackframe;
Description: Disable Fast Interrupts (FIQ) unconditionally
Note None documented 


function ARMSaveFIQ:TFIQMask; assembler; nostackframe;
Description: Disable Fast Interrupts (FIQ) and return the previous state
Return FIQ state when called (Returned in R0) 


function ARMRestoreFIQ(FIQMask:TFIQMask):TFIQMask; assembler; nostackframe;
Description: Restore Fast Interrupts (FIQ) to a previous state
FIQMask FIQ state to restore (Passed in R0)
Return FIQ state when called (Returned in R0) 


procedure ARMEnableIRQFIQ; assembler; nostackframe;
Description: Enable Interrupts and Fast Interrupts (IRQ/FIQ) unconditionally
Note None documented 


procedure ARMDisableIRQFIQ; assembler; nostackframe;
Description: Disable Interrupts and Fast Interrupts (IRQ/FIQ) unconditionally
Note None documented 


function ARMSaveIRQFIQ:TIRQFIQMask; assembler; nostackframe;
Description: Disable Interrupts and Fast Interrupts (IRQ/FIQ) and return the previous state
Return IRQ/FIQ state when called (Returned in R0) 


function ARMRestoreIRQFIQ(IRQFIQMask:TIRQFIQMask):TIRQFIQMask; assembler; nostackframe;
Description: Restore Interrupts and Fast Interrupts (IRQ/FIQ) to a previous state
IRQFIQMask IRQ/FIQ state to restore (Passed in R0)
Return IRQ/FIQ state when called (Returned in R0) 


function ARMGetAbort:Boolean; assembler; nostackframe;
Description: Get Abort state
Return True is enabled, False if disabled (Returned in R0) 


procedure ARMEnableAbort; assembler; nostackframe;
Description: Enable Aborts unconditionally
Note None documented 


procedure ARMDisableAbort; assembler; nostackframe;
Description: Disable Aborts unconditionally
Note None documented 


function ARMSaveAbort:TAbortMask; assembler; nostackframe;
Description: Disable Aborts and return the previous state
Return Abort state when called (Returned in R0) 


function ARMRestoreAbort(AbortMask:TAbortMask):TAbortMask; assembler; nostackframe;
Description: Restore Aborts to a previous state
AbortMask Abort state to restore (Passed in R0)
Return Abort state when called (Returned in R0)


ARM helper functions 

procedure ARMWait; inline;
Description: To be documented
Note None documented 


procedure ARMLongWait; inline;
Description: To be documented
Note None documented 


procedure ARMShortWait; inline;
Description: To be documented
Note None documented 


procedure ARMSlowBlink; inline;
Description: To be documented
Note None documented 


procedure ARMFastBlink; inline;
Description: To be documented
Note None documented 


function ARMModeToString(ARMMode:LongWord):String;
Description: To be documented
Note None documented


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