Difference between revisions of "Unit PlatformQEMUVPB"

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----
 
----
  
−
''To be documented''
+
'''Ultibo Platform Interface unit for QEMU VersatilePB'''
  
 
=== Constants ===
 
=== Constants ===
 
----
 
----
  
−
''To be documented''
+
 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''QEMUVPB specific constants''' <code> QEMUVPB_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>QEMUVPB_STARTUP_ADDRESS = $00010000;</code>
 +
| Address of StartupHandler on Reset (Obtain from linker)
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''QEMUVPB page table''' <code> QEMUVPB_PAGE_TABLE_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>QEMUVPB_PAGE_TABLE_BASE = $00004000;</code>
 +
| Place the first level Page Table after the interrupt vectors at 0x00001000 and before the code start at 0x00010000
 +
|-
 +
| <code>QEMUVPB_PAGE_TABLE_SIZE = SIZE_16K;</code>
 +
| ARMv7 first level Page Table is exactly 16KB in size (4096 32 bit (4 byte) entries)
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''QEMUVPB vector table''' <code> QEMUVPB_VECTOR_TABLE_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>QEMUVPB_VECTOR_TABLE_BASE = $00001000;</code>
 +
| Place the Interrupt Vector Table at 0x00001000 before the code start at 0x00010000
 +
|-
 +
| <code>QEMUVPB_VECTOR_TABLE_SIZE = SIZE_64;</code>
 +
| The Interrupt Vector Table is exactly 64 bytes (16 32 bit (4 byte) entries)
 +
|-
 +
| <code>QEMUVPB_VECTOR_TABLE_COUNT = 8;</code>
 +
| The Interrupt Vector Table contains 8 entries on an ARMv7 device
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''QEMUVPB CPU count''' <code> QEMUVPB_CPU_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>QEMUVPB_CPU_COUNT = VERSATILEPB_CPU_COUNT;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>QEMUVPB_CPU_BOOT = CPU_ID_0;</code>
 +
| &nbsp;
 +
|-
 +
| <code>QEMUVPB_CPU_MASK = CPU_AFFINITY_0;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''QEMUVPB SWI''' <code> QEMUVPB_SWI_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>QEMUVPB_SWI_COUNT = 256;</code>
 +
| Number of available SWI entries
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''QEMUVPB kernel name''' <code> QEMUVPB_KERNEL_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>QEMUVPB_KERNEL_NAME = 'kernel.bin';</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>QEMUVPB_KERNEL_NAME = 'kernel64.bin';</code>
 +
| &nbsp;
 +
|-
 +
| <code>QEMUVPB_KERNEL_CONFIG = '';</code>
 +
| Not available as a file
 +
|-
 +
| <code>QEMUVPB_KERNEL_COMMAND = '';</code>
 +
| Not available as a file
 +
|-
 +
| <code>QEMUVPB_FIRMWARE_FILES = '';</code>
 +
| Not available as a file
 +
|-
 +
| <code>QEMUVPB_DTB_FILES = '';</code>
 +
| Not available as a file
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 specific constants''' <code> PL110_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_FRAMEBUFFER_DESCRIPTION = 'ARM PrimeCell PL110 Color LCD';</code>
 +
| Description of PL110 device
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 mode''' <code> PL110_MODE_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_MODE_UNKNOWN = 0;</code>
 +
| &nbsp;
 +
|-
 +
| <code>PL110_MODE_VGA = 1;</code>
 +
| Connected to a VGA display
 +
|-
 +
| <code>PL110_MODE_SVGA = 2;</code>
 +
| Connected to a SVGA display
 +
|-
 +
| <code>PL110_MODE_TFT = 3;</code>
 +
| Connected to a TFT display
 +
|-
 +
| <code>PL110_MODE_STN = 4;</code>
 +
| Connected to an STN display
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 register offset''' <code> PL110_CLCD_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
 +
|-
 +
| <code>PL110_CLCD_TIMING0 = $00000000;</code>
 +
| Horizontal Axis Panel Control Register
 +
|-
 +
| <code>PL110_CLCD_TIMING1 = $00000004;</code>
 +
| Vertical Axis Panel Control Register
 +
|-
 +
| <code>PL110_CLCD_TIMING2 = $00000008;</code>
 +
| Clock and Signal Polarity Control Register
 +
|-
 +
| <code>PL110_CLCD_TIMING3 = $0000000c;</code>
 +
| Line End Control Register
 +
|-
 +
| <code>PL110_CLCD_UPBASE = $00000010;</code>
 +
| Upper Panel Frame Base Address Registers
 +
|-
 +
| <code>PL110_CLCD_LPBASE = $00000014;</code>
 +
| Lower Panel Frame Base Address Registers
 +
|-
 +
| <code>PL110_CLCD_CONTROL = $00000018;</code>
 +
| Control Register ''Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM''
 +
|-
 +
| <code>PL110_CLCD_IMSC = $0000001c;</code>
 +
| Interrupt Mask Set/Clear Register ''Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM''
 +
|-
 +
| <code>PL110_CLCD_RIS = $00000020;</code>
 +
| Raw Interrupt Status Register
 +
|-
 +
| <code>PL110_CLCD_MIS = $00000024;</code>
 +
| Masked Interrupt Status Register
 +
|-
 +
| <code>PL110_CLCD_ICR = $00000028;</code>
 +
| Interrupt Clear Register
 +
|-
 +
| <code>PL110_CLCD_UPCURR = $0000002C;</code>
 +
| Upper Panel Current Address Value Registers
 +
|-
 +
| <code>PL110_CLCD_LPCURR = $00000030;</code>
 +
| Lower Panel Current Address Value Registers
 +
|-
 +
| <code>PL110_CLCD_PALETTE = $00000200;</code>
 +
| Color Palette Register
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD timing0''' <code> PL110_CLCD_TIMING0_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
 +
|-
 +
| <code>PL110_CLCD_TIMING0_HBP = ($FF shl 24);</code>
 +
| Horizontal back porch
 +
|-
 +
| <code>PL110_CLCD_TIMING0_HFP = ($FF shl 16);</code>
 +
| Horizontal front porch
 +
|-
 +
| <code>PL110_CLCD_TIMING0_HSW = ($FF shl 8);</code>
 +
| Horizontal synchronization pulse width
 +
|-
 +
| <code>PL110_CLCD_TIMING0_PPL = ($FC shl 2);</code>
 +
| Pixels-per-line (Actual pixels-per-line = 16 * (PPL + 1))
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD timing1''' <code> PL110_CLCD_TIMING1_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
 +
|-
 +
| <code>PL110_CLCD_TIMING1_VBP = ($FF shl 24);</code>
 +
| Vertical back porch
 +
|-
 +
| <code>PL110_CLCD_TIMING1_VFP = ($FF shl 16);</code>
 +
| Vertical front porch
 +
|-
 +
| <code>PL110_CLCD_TIMING1_VSW = ($FC shl 10);</code>
 +
| Vertical synchronization pulse width
 +
|-
 +
| <code>PL110_CLCD_TIMING1_LPP = ($3FF shl 0);</code>
 +
| Lines per panel is the number of active lines per screen (Program to number of lines required minus 1)
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD timing2''' <code> PL110_CLCD_TIMING2_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
 +
|-
 +
| <code>PL110_CLCD_TIMING2_PCD_HI = ($1F shl 27);</code>
 +
| Upper five bits of Panel Clock Divisor
 +
|-
 +
| <code>PL110_CLCD_TIMING2_BCD = (1 shl 26);</code>
 +
| Bypass pixel clock divider
 +
|-
 +
| <code>PL110_CLCD_TIMING2_CPL = ($3FF shl 16);</code>
 +
| Clocks per line
 +
|-
 +
| <code>PL110_CLCD_TIMING2_IOE = (1 shl 14);</code>
 +
| Invert output enable
 +
|-
 +
| <code>PL110_CLCD_TIMING2_IPC = (1 shl 13);</code>
 +
| Invert panel clock
 +
|-
 +
| <code>PL110_CLCD_TIMING2_IHS = (1 shl 12);</code>
 +
| Invert horizontal synchron
 +
|-
 +
| <code>PL110_CLCD_TIMING2_IVS = (1 shl 11);</code>
 +
| Invert vertical synchronization
 +
|-
 +
| <code>PL110_CLCD_TIMING2_ACB = ($1F shl 6);</code>
 +
| AC bias pin frequency
 +
|-
 +
| <code>PL110_CLCD_TIMING2_CLKSEL = (1 shl 5);</code>
 +
| This bit drives the CLCDCLKSEL signal which is used as the select signal for the external LCD clock multiplexor
 +
|-
 +
| <code>PL110_CLCD_TIMING2_PCD_LO = ($1F shl 0);</code>
 +
| Lower five bits of Panel Clock Divisor
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD timing3''' <code> PL110_CLCD_TIMING3_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
 +
|-
 +
| <code>PL110_CLCD_TIMING3_LEE = (1 shl 16);</code>
 +
| LCD Line end enable: 0 = CLLE disabled (held LOW)/1 = CLLE signal active
 +
|-
 +
| <code>PL110_CLCD_TIMING3_LED = ($3F shl 0);</code>
 +
| Line-end signal delay from the rising-edge of the last panel clock
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD control''' <code> PL110_CLCD_CONTROL_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDEN = (1 shl 0);</code>
 +
| &nbsp;
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP1 = (0 shl 1);</code>
 +
| LCD bits per pixel: 000 = 1 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP2 = (1 shl 1);</code>
 +
| LCD bits per pixel: 001 = 2 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP4 = (2 shl 1);</code>
 +
| LCD bits per pixel: 010 = 4 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP8 = (3 shl 1);</code>
 +
| LCD bits per pixel: 011 = 8 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP16 = (4 shl 1);</code>
 +
| LCD bits per pixel: 100 = 16 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP16_565 = (6 shl 1);</code>
 +
| LCD bits per pixel: 110 = 16 bpp 565 (PL111 only)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP16_444 = (7 shl 1);</code>
 +
| LCD bits per pixel: 111 = 16 bpp 444 (PL111 only)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP24 = (5 shl 1);</code>
 +
| LCD bits per pixel: 101 = 24 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBW = (1 shl 4);</code>
 +
| STN LCD is monochrome (black and white) (0 = STN LCD is color/1 = STN LCD is monochrome)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDTFT = (1 shl 5);</code>
 +
| LCD is TFT (0 = LCD is an STN display, use gray scaler/1 = LCD is TFT, do not use gray scaler)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDMONO8 = (1 shl 6);</code>
 +
| Monochrome LCD has an 8-bit interface (0 = mono LCD uses 4-bit interface/1 = mono LCD uses 8-bit interface)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDDUAL = (1 shl 7);</code>
 +
| LCD interface is dual panel STN (0 = single panel LCD is in use/1 = dual panel LCD is in use)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_BGR = (1 shl 8);</code>
 +
| RGB or BGR format selection (0 = RGB normal output/1 = BGR red and blue swapped.)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_BEBO = (1 shl 9);</code>
 +
| Big-endian byte order (0 = little-endian byte order/1 = big-endian byte order)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_BEPO = (1 shl 10);</code>
 +
| Big-endian pixel ordering within a byte (0 = little-endian pixel ordering within a byte/1= big-endian pixel ordering within a byte)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDPWR = (1 shl 11);</code>
 +
| LCD power enable
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_VSYNC = (0 shl 12);</code>
 +
| Generate interrupt at: 00 = start of vertical synchronization
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_BPORCH = (1 shl 12);</code>
 +
| Generate interrupt at: 01 = start of back porch
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_VIDEO = (2 shl 12);</code>
 +
| Generate interrupt at: 10 = start of active video
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_FPORCH = (3 shl 12);</code>
 +
| Generate interrupt at: 11 = start of front porch
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LDMAFIFOTIME = (1 shl 15);</code>
 +
| Unknown
 +
|-
 +
| <code>PL110_CLCD_CONTROL_WATERMARK = (1 shl 16);</code>
 +
| LCD DMA FIFO Watermark level
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 control''' <code> PL110_CONTROL_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_CONTROL_VGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>PL110_CONTROL_SVGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 timing0''' <code> PL110_TIMING0_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_TIMING0_VGA = $3F1F3F9C;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>PL110_TIMING0_SVGA = $1313A4C4;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 timing1''' <code> PL110_TIMING1_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_TIMING1_VGA = $090B61DF;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>PL110_TIMING1_SVGA = $0505F657;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br /> 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 timing2''' <code> PL110_TIMING2_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_TIMING2_VGA = $067F1800;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>PL110_TIMING2_SVGA = $071F1800;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br />
  
 
=== Type definitions ===
 
=== Type definitions ===
 
----
 
----
  
−
''To be documented''
+
 
 +
'''PL110 CLCD registers'''
 +
 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;">
 +
<code>PPL110CLCDRegisters = ^TPL110CLCDRegisters;</code>
 +
 
 +
<code>TPL110CLCDRegisters = record</code>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|Note: Layout of the PL110 registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html)
 +
|-
 +
| <code>TIMING0:LongWord;</code>
 +
| Horizontal Axis Panel Control Register
 +
|-
 +
| <code>TIMING1:LongWord;</code>
 +
| Vertical Axis Panel Control Register
 +
|-
 +
| <code>TIMING2:LongWord;</code>
 +
| Clock and Signal Polarity Control Register
 +
|-
 +
| <code>TIMING3:LongWord;</code>
 +
| Line End Control Register
 +
|-
 +
| <code>UPBASE:LongWord;</code>
 +
| Upper Panel Frame Base Address Registers
 +
|-
 +
| <code>LPBASE:LongWord;</code>
 +
| Lower Panel Frame Base Address Registers
 +
|-
 +
| <code>CONTROL:LongWord;</code>
 +
| Control Register Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM
 +
|-
 +
| <code>IMSC:LongWord;</code>
 +
| Interrupt Mask Set/Clear Register Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM
 +
|-
 +
| <code>RIS:LongWord;</code>
 +
| Raw Interrupt Status Register
 +
|-
 +
| <code>MIS:LongWord;</code>
 +
| Masked Interrupt Status Register
 +
|-
 +
| <code>ICR:LongWord;</code>
 +
| Interrupt Clear Register
 +
|-
 +
| <code>UPCURR:LongWord;</code>
 +
| Upper Panel Current Address Value Registers
 +
|-
 +
| <code>LPCURR:LongWord;</code>
 +
| Lower Panel Current Address Value Registers
 +
|-
 +
|}
 +
</div></div> 
 +
 
 +
'''PL110 framebuffer''' 
 +
 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial;">
 +
<code>PPL110Framebuffer = ^TPL110Framebuffer;</code>
 +
 
 +
<code>TPL110Framebuffer = record</code>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|''Framebuffer Properties''
 +
|-
 +
| <code>Framebuffer:TFramebufferDevice;</code>
 +
| &nbsp;
 +
|-
 +
|colspan="2"|''PL110 Properties''
 +
|-
 +
| <code>Mode:LongWord;</code>
 +
| PL110 framebuffer mode (eg PL110_MODE_TFT)
 +
|-
 +
| <code>Depth:LongWord;</code>
 +
| Framebuffer color depth (eg FRAMEBUFFER_DEPTH_16)
 +
|-
 +
| <code>Width:LongWord;</code>
 +
| Framebuffer width in pixels
 +
|-
 +
| <code>Height:LongWord;</code>
 +
| Framebuffer height in pixels
 +
|-
 +
| <code>Rotation:LongWord;</code>
 +
| Framebuffer rotation (eg FRAMEBUFFER_ROTATION_180)
 +
|-
 +
|colspan="2"|''Driver Properties''
 +
|-
 +
| <code>Control:LongWord;</code>
 +
| Preset Control register value
 +
|-
 +
| <code>Timing0:LongWord;</code>
 +
| Preset Timing0 register value
 +
|-
 +
| <code>Timing1:LongWord;</code>
 +
| Preset Timing1 register value
 +
|-
 +
| <code>Timing2:LongWord;</code>
 +
| Preset Timing2 register value
 +
|-
 +
| <code>Timing3:LongWord;</code>
 +
| Preset Timing2 register value
 +
|-
 +
| <code>Registers:PPL110CLCDRegisters;</code>
 +
| PL110 registers
 +
|-
 +
|}
 +
</div></div> 
 +
<br />
  
 
=== Public variables ===
 
=== Public variables ===
 
----
 
----
  
−
''To be documented''
+
 
 +
'''QEMUVPB specific Ultibo variables'''
 +
 
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>QEMUVPBInitialized:Boolean;</code>
 +
| style="width: 40%;"|
 +
|-
 +
|}
 +
 
 +
'''Clock variables'''
 +
 
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>ClockGetLast:LongWord;</code>
 +
| style="width: 40%;"|Value of 24MHz Counter on last ClockGetCount or ClockGetTotal call
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>ClockGetBase:Int64;</code>
 +
| style="width: 40%;"|Base value for 64-bit clock, incremented each time the 24MHz Counter rolls over (Only accurate if ClockGetCount/ClockGetTotal is called at least once per 178 seconds)
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>ClockGetLock:THandle = INVALID_HANDLE_VALUE;</code>
 +
| style="width: 40%;"|Lock handle for creating 64-bit clock from a 32-bit register
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>ClockGetTimer:THandle = INVALID_HANDLE_VALUE;</code>
 +
| style="width: 40%;"|Timer handle for ensuring clock is read periodically to maintain accurracy
 +
|-
 +
|}
 +
 
 +
'''Timer variables'''
 +
 
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>Timer0Registers:PSP804TimerRegisters;</code>
 +
| style="width: 40%;"|Use Timer0 for Clock
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>Timer2Registers:PSP804TimerRegisters;</code>
 +
| style="width: 40%;"|Use Timer2 for Scheduler
 +
|-
 +
|}
 +
 
 +
'''Interrupt variables'''
 +
 
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>PrimaryInterruptRegisters:PPL190InterruptRegisters;</code>
 +
| style="width: 40%;"|
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>SecondaryInterruptRegisters:PVersatilePBInterruptRegisters;</code>
 +
| style="width: 40%;"|
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>InterruptEntries:array[0..(VERSATILEPB_IRQ_COUNT - 1)] of PInterruptEntry;</code>
 +
| style="width: 40%;"|
 +
|-
 +
|}
 +
 
 +
'''System call'''
 +
 
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>SystemCallEntries:array[0..QEMUVPB_SWI_COUNT - 1] of TSystemCallEntry;</code>
 +
| style="width: 40%;"|
 +
|-
 +
|}
 +
 
 +
'''IRQ/FIQ'''
 +
 
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>IRQEnabled:array[0..1] of LongWord;</code>
 +
| style="width: 40%;"|2 groups of IRQs to Enable/Disable (See: TPL190InterruptRegisters)
 +
|-
 +
|}
 +
{| class="wikitable" style="font-size: 14px; text-align: left; width: 100%; height: 50px;"
 +
|-
 +
| <code>FIQEnabled:array[0..1] of LongWord;</code>
 +
| style="width: 40%;"|2 groups of FIQs to Enable/Disable (See: TPL190InterruptRegisters)
 +
|-
 +
|}
 +
<br />
  
 
=== Function declarations ===
 
=== Function declarations ===
Line 34: Line 666:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 49: Line 681:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 61: Line 693:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 73: Line 705:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 85: Line 717:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 97: Line 729:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 109: Line 741:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 121: Line 753:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 133: Line 765:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
−
| See ??????
+
| None documented
 
|-
 
|-
 
|}
 
|}
Line 145: Line 777:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''CPUID'''
+
! Note
−
| CPU to route IRQ to
+
| None documented
−
|-
+
−
! '''Number'''
+
−
| IRQ number to register
+
−
|-
+
−
! '''Handler'''
+
−
| Interrupt handler function to register
+
−
|-
+
−
! '''HandlerEx'''
+
−
| Extended Interrupt handler function to register
+
−
|-
+
−
! '''Note'''
+
−
| Only one of Handler or HandlerEx can be specified
+
 
|-
 
|-
 
|}
 
|}
Line 169: Line 789:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''CPUID'''
+
! Note
−
| CPU to route IRQ to
+
| None documented
−
|-
+
−
! '''Number'''
+
−
| IRQ number to deregister
+
−
|-
+
−
! '''Handler'''
+
−
| Interrupt handler function to deregister
+
−
|-
+
−
! '''HandlerEx'''
+
−
| Extended Interrupt handler function to deregister
+
−
|-
+
−
! '''Note'''
+
−
| Only one of Handler or HandlerEx can be specified
+
 
|-
 
|-
 
|}
 
|}
Line 193: Line 801:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''CPUID'''
+
! Note
−
| CPU to route FIQ to
+
| None documented
−
|-
+
−
! '''Number'''
+
−
| FIQ number to register
+
−
|-
+
−
! '''Handler'''
+
−
| Interrupt handler function to register
+
−
|-
+
−
! '''HandlerEx'''
+
−
| Extended Interrupt handler function to register
+
−
|-
+
−
! '''Note'''
+
−
| Only one of Handler or HandlerEx can be specified
+
 
|-
 
|-
 
|}
 
|}
Line 217: Line 813:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''CPUID'''
+
! Note
−
| CPU to route FIQ to
+
| None documented
 
|-
 
|-
−
! '''Number'''
+
|}
−
| FIQ number to deregister
+
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBRegisterInterrupt(Number,Mask,Priority,Flags:LongWord; Handler:TSharedInterruptHandler; Parameter:Pointer):LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Request registration of the supplied handler to the specified interrupt number (Where Applicable)</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Handler'''
+
! Note
−
| Interrupt handler function to deregister
+
| None documented
 
|-
 
|-
−
! '''HandlerEx'''
+
|}
−
| Extended Interrupt handler function to deregister
+
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBDeregisterInterrupt(Number,Mask,Priority,Flags:LongWord; Handler:TSharedInterruptHandler; Parameter:Pointer):LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Request deregistration of the supplied handler from the specified interrupt number (Where Applicable)</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
−
| Only one of Handler or HandlerEx can be specified
+
| None documented
 
|-
 
|-
 
|}
 
|}
Line 241: Line 849:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''CPUID'''
+
! Note
−
| The CPU ID to register the System Call against (Ignored on QEMUVPB)
+
| None documented
−
|-
+
−
! '''Number'''
+
−
| The System Call number to be registered
+
−
|-
+
−
! '''Handler'''
+
−
| The handler function to be registered
+
−
|-
+
−
! '''HandlerEx'''
+
−
| The extended handler function to be registered
+
−
|-
+
−
! '''Note'''
+
−
| Only one of Handler or HandlerEx can be specified
+
 
|-
 
|-
 
|}
 
|}
Line 265: Line 861:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''CPUID'''
+
! Note
−
| The CPU ID to deregister the System Call from (Ignored on QEMUVPB)
+
| None documented
−
|-
+
−
! '''Number'''
+
−
| The System Call number to be deregistered
+
−
|-
+
−
! '''Handler'''
+
−
| The handler function to be deregistered
+
−
|-
+
−
! '''HandlerEx'''
+
−
| The extended handler function to be deregistered
+
−
|-
+
−
! '''Note'''
+
−
| Only one of Handler or HandlerEx can be specified
+
 
|-
 
|-
 
|}
 
|}
Line 284: Line 868:
 
<br />
 
<br />
 
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
−
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBGetInterruptEntry(Number:LongWord):TInterruptEntry;</pre>
+
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBGetInterruptEntry(Number,Instance:LongWord; var Interrupt:TInterruptEntry):LongWord;</pre>
−
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
+
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Get the interrupt entry for the specified interrupt number and instance</div>
 
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| Get the interrupt entry for the specified interrupt number
 
| Get the interrupt entry for the specified interrupt number
 
|-
 
|-
Line 301: Line 885:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 313: Line 897:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 325: Line 909:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 337: Line 921:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
−
| On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds
+
| On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds and increment the rollover value. Because we return the lower 32 bits then the value returned by this function will rollover to zero every 4295 seconds or about every 71 minutes.
 
|-
 
|-
 
|}
 
|}
Line 349: Line 933:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
−
| On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds and increment the rollover value. This is only accurate if either ClockGetCount or ClockGetTotal is called at least once per 178 seconds on order to increment the rollover.
+
| On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds and increment the rollover value. This is only accurate if either ClockGetCount or ClockGetTotal is called at least once per 178 seconds in order to increment the rollover.
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBClockGetTimer(Data:Pointer);</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Timer procedure to ensure ClockGetTotal is called at least once per rollover interval</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| Not intended to be called directly by applications
 
|-
 
|-
 
|}
 
|}
Line 364: Line 960:
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-
Line 371: Line 967:
 
<br />
 
<br />
  
−
'''QEMUVPB IRQ functions'''
+
'''QEMUVPB clock functions'''
  
 
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
−
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBDispatchIRQ(CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;</pre>
+
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBClockInterrupt(Parameter:Pointer);</pre>
−
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Process any pending IRQ requests</div>
+
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Interrupt handler function for the clock interrupt</div>
 
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{| class="wikitable" style="font-size: 14px; background: white;"
 
|-
 
|-
−
! '''Note'''
+
! Note
−
| Called by ARMv7/8IRQHandler in PlatformARMv7/8
+
| This schedules another clock interrupt to occur CLOCK_CYCLES_PER_TICK in the future, then updates ClockTicks and ClockSeconds and checks for timers to trigger.
−
A DataMemoryBarrier is executed before and after calling this function
+
 
|-
 
|-
 
|}
 
|}
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<br />
 
<br />
 
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
−
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBHandleIRQ(Number,CPUID:LongWord; Thread:TThreadHandle):TThreadHandle;</pre>
+
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBClockUpdate(Cycles:LongWord; var Last:LongWord);</pre>
−
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Call the handler function for an IRQ that was received, or halt if it doesn't exist</div>
+
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Setup a clock interrupt to trigger after the specified number of clock cycles</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Cycles
 +
| Number of cycles after which the timer interrupt is to be triggered
 +
|-
 +
! Note
 +
| This refers to native clock cycles as specified by CLOCK_FREQUENCY
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
 
 +
'''QEMUVPB scheduler functions'''
 +
 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBSchedulerInterrupt(CPUID:LongWord; Thread:TThreadHandle; Parameter:Pointer):TThreadHandle;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Interrupt handler function for the scheduler interrupt</div>
 +
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 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| This schedules another scheduler interrupt to occur SCHEDULER_CLOCKS_PER_INTERRUPT in the future, then checks for threads to wakeup or timeout and the next thread to schedule.
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBSchedulerUpdate(Cycles:LongWord; var Last:LongWord);</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Setup a scheduler interrupt to trigger after the specified number of clock cycles</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Cycles
 +
| Number of cycles after which the scheduler interrupt is to be triggered
 +
|-
 +
! Note
 +
| This refers to native clock cycles as specified by VERSATILEPB_TIMER_FREQUENCY
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBSchedulerSystemCall(Request:PSystemCallRequest);</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' System Call handler for the scheduler</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| This is registered to receive requests for the SYSTEM_CALL_CONTEXT_SWITCH and will perform a context switch from within an SWI
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
 
 +
'''QEMUVPB framebuffer functions'''
 +
 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBFramebufferDeviceAllocate(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Implementation of FramebufferDeviceAllocate API for PL110 Framebuffer</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| Not intended to be called directly by applications, use FramebufferDeviceAllocate instead.
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBFramebufferDeviceRelease(Framebuffer:PFramebufferDevice):LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Implementation of FramebufferDeviceRelease API for PL110 Framebuffer</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| Not intended to be called directly by applications, use FramebufferDeviceRelease instead.
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBFramebufferDeviceBlank(Framebuffer:PFramebufferDevice; Blank:Boolean):LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Implementation of FramebufferDevicBlank API for PL110 Framebuffer</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| Not intended to be called directly by applications, use FramebufferDevicBlank instead.
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBFramebufferDeviceCommit(Framebuffer:PFramebufferDevice; Address:PtrUInt; Size,Flags:LongWord):LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Implementation of FramebufferDeviceCommit API for PL110 Framebuffer</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| Not intended to be called directly by applications, use FramebufferDeviceCommit instead.
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
 
 +
'''QEMUVPB helper functions'''
 +
 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBBootBlink; assembler; nostackframe;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Output characters to UART0 without dependency on any other RTL setup</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| None documented
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBBootOutput(Value:LongWord);</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Output characters to UART0 without dependency on any other RTL setup</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| Based on hexstrings() function by dwelch67 (https://github.com/dwelch67)
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBBootConsoleStart;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| None documented
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBBootConsoleWrite(const Value:String);</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| None documented
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">procedure QEMUVPBBootConsoleWriteEx(const Value:String; X,Y:LongWord);</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| None documented
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBBootConsoleGetX:LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
! Note
 +
| None documented
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
 +
<pre style="border: 0; padding-bottom:0px;">function QEMUVPBBootConsoleGetY:LongWord;</pre>
 +
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
 
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 
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|-
 
|-
−
! '''Note'''
+
! Note
 
| None documented
 
| None documented
 
|-
 
|-

Latest revision as of 05:40, 7 April 2023

Return to Unit Reference


Description

Ultibo Platform Interface unit for QEMU VersatilePB

Constants


QEMUVPB specific constants QEMUVPB_*
QEMUVPB_STARTUP_ADDRESS = $00010000; Address of StartupHandler on Reset (Obtain from linker)


QEMUVPB page table QEMUVPB_PAGE_TABLE_*
QEMUVPB_PAGE_TABLE_BASE = $00004000; Place the first level Page Table after the interrupt vectors at 0x00001000 and before the code start at 0x00010000
QEMUVPB_PAGE_TABLE_SIZE = SIZE_16K; ARMv7 first level Page Table is exactly 16KB in size (4096 32 bit (4 byte) entries)


QEMUVPB vector table QEMUVPB_VECTOR_TABLE_*
QEMUVPB_VECTOR_TABLE_BASE = $00001000; Place the Interrupt Vector Table at 0x00001000 before the code start at 0x00010000
QEMUVPB_VECTOR_TABLE_SIZE = SIZE_64; The Interrupt Vector Table is exactly 64 bytes (16 32 bit (4 byte) entries)
QEMUVPB_VECTOR_TABLE_COUNT = 8; The Interrupt Vector Table contains 8 entries on an ARMv7 device


QEMUVPB CPU count QEMUVPB_CPU_*
QEMUVPB_CPU_COUNT = VERSATILEPB_CPU_COUNT;  
QEMUVPB_CPU_BOOT = CPU_ID_0;  
QEMUVPB_CPU_MASK = CPU_AFFINITY_0;  


QEMUVPB SWI QEMUVPB_SWI_*
QEMUVPB_SWI_COUNT = 256; Number of available SWI entries


QEMUVPB kernel name QEMUVPB_KERNEL_*
QEMUVPB_KERNEL_NAME = 'kernel.bin';  
QEMUVPB_KERNEL_NAME = 'kernel64.bin';  
QEMUVPB_KERNEL_CONFIG = ; Not available as a file
QEMUVPB_KERNEL_COMMAND = ; Not available as a file
QEMUVPB_FIRMWARE_FILES = ; Not available as a file
QEMUVPB_DTB_FILES = ; Not available as a file


PL110 specific constants PL110_*
PL110_FRAMEBUFFER_DESCRIPTION = 'ARM PrimeCell PL110 Color LCD'; Description of PL110 device


PL110 mode PL110_MODE_*
PL110_MODE_UNKNOWN = 0;  
PL110_MODE_VGA = 1; Connected to a VGA display
PL110_MODE_SVGA = 2; Connected to a SVGA display
PL110_MODE_TFT = 3; Connected to a TFT display
PL110_MODE_STN = 4; Connected to an STN display


PL110 register offset PL110_CLCD_*
See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 
PL110_CLCD_TIMING0 = $00000000; Horizontal Axis Panel Control Register
PL110_CLCD_TIMING1 = $00000004; Vertical Axis Panel Control Register
PL110_CLCD_TIMING2 = $00000008; Clock and Signal Polarity Control Register
PL110_CLCD_TIMING3 = $0000000c; Line End Control Register
PL110_CLCD_UPBASE = $00000010; Upper Panel Frame Base Address Registers
PL110_CLCD_LPBASE = $00000014; Lower Panel Frame Base Address Registers
PL110_CLCD_CONTROL = $00000018; Control Register Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM
PL110_CLCD_IMSC = $0000001c; Interrupt Mask Set/Clear Register Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM
PL110_CLCD_RIS = $00000020; Raw Interrupt Status Register
PL110_CLCD_MIS = $00000024; Masked Interrupt Status Register
PL110_CLCD_ICR = $00000028; Interrupt Clear Register
PL110_CLCD_UPCURR = $0000002C; Upper Panel Current Address Value Registers
PL110_CLCD_LPCURR = $00000030; Lower Panel Current Address Value Registers
PL110_CLCD_PALETTE = $00000200; Color Palette Register


PL110 CLCD timing0 PL110_CLCD_TIMING0_*
See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 
PL110_CLCD_TIMING0_HBP = ($FF shl 24); Horizontal back porch
PL110_CLCD_TIMING0_HFP = ($FF shl 16); Horizontal front porch
PL110_CLCD_TIMING0_HSW = ($FF shl 8); Horizontal synchronization pulse width
PL110_CLCD_TIMING0_PPL = ($FC shl 2); Pixels-per-line (Actual pixels-per-line = 16 * (PPL + 1))


PL110 CLCD timing1 PL110_CLCD_TIMING1_*
See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 
PL110_CLCD_TIMING1_VBP = ($FF shl 24); Vertical back porch
PL110_CLCD_TIMING1_VFP = ($FF shl 16); Vertical front porch
PL110_CLCD_TIMING1_VSW = ($FC shl 10); Vertical synchronization pulse width
PL110_CLCD_TIMING1_LPP = ($3FF shl 0); Lines per panel is the number of active lines per screen (Program to number of lines required minus 1)


PL110 CLCD timing2 PL110_CLCD_TIMING2_*
See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 
PL110_CLCD_TIMING2_PCD_HI = ($1F shl 27); Upper five bits of Panel Clock Divisor
PL110_CLCD_TIMING2_BCD = (1 shl 26); Bypass pixel clock divider
PL110_CLCD_TIMING2_CPL = ($3FF shl 16); Clocks per line
PL110_CLCD_TIMING2_IOE = (1 shl 14); Invert output enable
PL110_CLCD_TIMING2_IPC = (1 shl 13); Invert panel clock
PL110_CLCD_TIMING2_IHS = (1 shl 12); Invert horizontal synchron
PL110_CLCD_TIMING2_IVS = (1 shl 11); Invert vertical synchronization
PL110_CLCD_TIMING2_ACB = ($1F shl 6); AC bias pin frequency
PL110_CLCD_TIMING2_CLKSEL = (1 shl 5); This bit drives the CLCDCLKSEL signal which is used as the select signal for the external LCD clock multiplexor
PL110_CLCD_TIMING2_PCD_LO = ($1F shl 0); Lower five bits of Panel Clock Divisor


PL110 CLCD timing3 PL110_CLCD_TIMING3_*
See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 
PL110_CLCD_TIMING3_LEE = (1 shl 16); LCD Line end enable: 0 = CLLE disabled (held LOW)/1 = CLLE signal active
PL110_CLCD_TIMING3_LED = ($3F shl 0); Line-end signal delay from the rising-edge of the last panel clock


PL110 CLCD control PL110_CLCD_CONTROL_*
See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 
PL110_CLCD_CONTROL_LCDEN = (1 shl 0);  
PL110_CLCD_CONTROL_LCDBPP1 = (0 shl 1); LCD bits per pixel: 000 = 1 bpp
PL110_CLCD_CONTROL_LCDBPP2 = (1 shl 1); LCD bits per pixel: 001 = 2 bpp
PL110_CLCD_CONTROL_LCDBPP4 = (2 shl 1); LCD bits per pixel: 010 = 4 bpp
PL110_CLCD_CONTROL_LCDBPP8 = (3 shl 1); LCD bits per pixel: 011 = 8 bpp
PL110_CLCD_CONTROL_LCDBPP16 = (4 shl 1); LCD bits per pixel: 100 = 16 bpp
PL110_CLCD_CONTROL_LCDBPP16_565 = (6 shl 1); LCD bits per pixel: 110 = 16 bpp 565 (PL111 only)
PL110_CLCD_CONTROL_LCDBPP16_444 = (7 shl 1); LCD bits per pixel: 111 = 16 bpp 444 (PL111 only)
PL110_CLCD_CONTROL_LCDBPP24 = (5 shl 1); LCD bits per pixel: 101 = 24 bpp
PL110_CLCD_CONTROL_LCDBW = (1 shl 4); STN LCD is monochrome (black and white) (0 = STN LCD is color/1 = STN LCD is monochrome)
PL110_CLCD_CONTROL_LCDTFT = (1 shl 5); LCD is TFT (0 = LCD is an STN display, use gray scaler/1 = LCD is TFT, do not use gray scaler)
PL110_CLCD_CONTROL_LCDMONO8 = (1 shl 6); Monochrome LCD has an 8-bit interface (0 = mono LCD uses 4-bit interface/1 = mono LCD uses 8-bit interface)
PL110_CLCD_CONTROL_LCDDUAL = (1 shl 7); LCD interface is dual panel STN (0 = single panel LCD is in use/1 = dual panel LCD is in use)
PL110_CLCD_CONTROL_BGR = (1 shl 8); RGB or BGR format selection (0 = RGB normal output/1 = BGR red and blue swapped.)
PL110_CLCD_CONTROL_BEBO = (1 shl 9); Big-endian byte order (0 = little-endian byte order/1 = big-endian byte order)
PL110_CLCD_CONTROL_BEPO = (1 shl 10); Big-endian pixel ordering within a byte (0 = little-endian pixel ordering within a byte/1= big-endian pixel ordering within a byte)
PL110_CLCD_CONTROL_LCDPWR = (1 shl 11); LCD power enable
PL110_CLCD_CONTROL_LCDVCOMP_VSYNC = (0 shl 12); Generate interrupt at: 00 = start of vertical synchronization
PL110_CLCD_CONTROL_LCDVCOMP_BPORCH = (1 shl 12); Generate interrupt at: 01 = start of back porch
PL110_CLCD_CONTROL_LCDVCOMP_VIDEO = (2 shl 12); Generate interrupt at: 10 = start of active video
PL110_CLCD_CONTROL_LCDVCOMP_FPORCH = (3 shl 12); Generate interrupt at: 11 = start of front porch
PL110_CLCD_CONTROL_LDMAFIFOTIME = (1 shl 15); Unknown
PL110_CLCD_CONTROL_WATERMARK = (1 shl 16); LCD DMA FIFO Watermark level


PL110 control PL110_CONTROL_*
PL110_CONTROL_VGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;  
PL110_CONTROL_SVGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;  


PL110 timing0 PL110_TIMING0_*
PL110_TIMING0_VGA = $3F1F3F9C;  
PL110_TIMING0_SVGA = $1313A4C4;  


PL110 timing1 PL110_TIMING1_*
PL110_TIMING1_VGA = $090B61DF;  
PL110_TIMING1_SVGA = $0505F657;  


PL110 timing2 PL110_TIMING2_*
PL110_TIMING2_VGA = $067F1800;  
PL110_TIMING2_SVGA = $071F1800;  


Type definitions


PL110 CLCD registers

PPL110CLCDRegisters = ^TPL110CLCDRegisters;

TPL110CLCDRegisters = record

Note: Layout of the PL110 registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html)
TIMING0:LongWord; Horizontal Axis Panel Control Register
TIMING1:LongWord; Vertical Axis Panel Control Register
TIMING2:LongWord; Clock and Signal Polarity Control Register
TIMING3:LongWord; Line End Control Register
UPBASE:LongWord; Upper Panel Frame Base Address Registers
LPBASE:LongWord; Lower Panel Frame Base Address Registers
CONTROL:LongWord; Control Register Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM
IMSC:LongWord; Interrupt Mask Set/Clear Register Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM
RIS:LongWord; Raw Interrupt Status Register
MIS:LongWord; Masked Interrupt Status Register
ICR:LongWord; Interrupt Clear Register
UPCURR:LongWord; Upper Panel Current Address Value Registers
LPCURR:LongWord; Lower Panel Current Address Value Registers

PL110 framebuffer

PPL110Framebuffer = ^TPL110Framebuffer;

TPL110Framebuffer = record

Framebuffer Properties
Framebuffer:TFramebufferDevice;  
PL110 Properties
Mode:LongWord; PL110 framebuffer mode (eg PL110_MODE_TFT)
Depth:LongWord; Framebuffer color depth (eg FRAMEBUFFER_DEPTH_16)
Width:LongWord; Framebuffer width in pixels
Height:LongWord; Framebuffer height in pixels
Rotation:LongWord; Framebuffer rotation (eg FRAMEBUFFER_ROTATION_180)
Driver Properties
Control:LongWord; Preset Control register value
Timing0:LongWord; Preset Timing0 register value
Timing1:LongWord; Preset Timing1 register value
Timing2:LongWord; Preset Timing2 register value
Timing3:LongWord; Preset Timing2 register value
Registers:PPL110CLCDRegisters; PL110 registers


Public variables


QEMUVPB specific Ultibo variables

QEMUVPBInitialized:Boolean;

Clock variables

ClockGetLast:LongWord; Value of 24MHz Counter on last ClockGetCount or ClockGetTotal call
ClockGetBase:Int64; Base value for 64-bit clock, incremented each time the 24MHz Counter rolls over (Only accurate if ClockGetCount/ClockGetTotal is called at least once per 178 seconds)
ClockGetLock:THandle = INVALID_HANDLE_VALUE; Lock handle for creating 64-bit clock from a 32-bit register
ClockGetTimer:THandle = INVALID_HANDLE_VALUE; Timer handle for ensuring clock is read periodically to maintain accurracy

Timer variables

Timer0Registers:PSP804TimerRegisters; Use Timer0 for Clock
Timer2Registers:PSP804TimerRegisters; Use Timer2 for Scheduler

Interrupt variables

PrimaryInterruptRegisters:PPL190InterruptRegisters;
SecondaryInterruptRegisters:PVersatilePBInterruptRegisters;
InterruptEntries:array[0..(VERSATILEPB_IRQ_COUNT - 1)] of PInterruptEntry;

System call

SystemCallEntries:array[0..QEMUVPB_SWI_COUNT - 1] of TSystemCallEntry;

IRQ/FIQ

IRQEnabled:array[0..1] of LongWord; 2 groups of IRQs to Enable/Disable (See: TPL190InterruptRegisters)
FIQEnabled:array[0..1] of LongWord; 2 groups of FIQs to Enable/Disable (See: TPL190InterruptRegisters)


Function declarations


Initialization functions 

procedure QEMUVPBInit;
Description: To be documented
Note None documented


QEMUVPB platform functions 

procedure QEMUVPBBoardInit;
Description: To be documented
Note None documented 


procedure QEMUVPBMemoryInit;
Description: To be documented
Note None documented 


procedure QEMUVPBClockInit;
Description: To be documented
Note None documented 


procedure QEMUVPBPowerInit;
Description: To be documented
Note None documented 


procedure QEMUVPBInterruptInit;
Description: To be documented
Note None documented 


procedure QEMUVPBPeripheralInit;
Description: To be documented
Note None documented 


procedure QEMUVPBFramebufferInit;
Description: To be documented
Note None documented 


procedure QEMUVPBPageTableInit;
Description: Initialize the Hardware Page Tables before enabling the MMU
Note None documented 


function QEMUVPBRequestExIRQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request registration of the supplied handler to the specified IRQ number
Note None documented 


function QEMUVPBReleaseExIRQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request deregistration of the supplied handler from the specified IRQ number
Note None documented 


function QEMUVPBRequestExFIQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request registration of the supplied handler to the specified FIQ number
Note None documented 


function QEMUVPBReleaseExFIQ(CPUID,Number:LongWord; Handler:TInterruptHandler; HandlerEx:TInterruptExHandler; Parameter:Pointer):LongWord;
Description: Request deregistration of the supplied handler from the specified FIQ number
Note None documented 


function QEMUVPBRegisterInterrupt(Number,Mask,Priority,Flags:LongWord; Handler:TSharedInterruptHandler; Parameter:Pointer):LongWord;
Description: Request registration of the supplied handler to the specified interrupt number (Where Applicable)
Note None documented 


function QEMUVPBDeregisterInterrupt(Number,Mask,Priority,Flags:LongWord; Handler:TSharedInterruptHandler; Parameter:Pointer):LongWord;
Description: Request deregistration of the supplied handler from the specified interrupt number (Where Applicable)
Note None documented 


function QEMUVPBRegisterSystemCallEx(CPUID,Number:LongWord; Handler:TSystemCallHandler; HandlerEx:TSystemCallExHandler):LongWord;
Description: Request registration of the supplied extended handler to the specified System Call number
Note None documented 


function QEMUVPBDeregisterSystemCallEx(CPUID,Number:LongWord; Handler:TSystemCallHandler; HandlerEx:TSystemCallExHandler):LongWord;
Description: Request deregistration of the supplied extended handler from the specified System Call number
Note None documented 


function QEMUVPBGetInterruptEntry(Number,Instance:LongWord; var Interrupt:TInterruptEntry):LongWord;
Description: Get the interrupt entry for the specified interrupt number and instance
Note Get the interrupt entry for the specified interrupt number 


function QEMUVPBGetSystemCallEntry(Number:LongWord):TSystemCallEntry;
Description: Get the system call entry for the specified system call number
Note None documented 


function QEMUVPBSystemRestart(Delay:LongWord):LongWord;
Description: To be documented
Note None documented 


function QEMUVPBSystemShutdown(Delay:LongWord):LongWord;
Description: To be documented
Note None documented 


function QEMUVPBClockGetCount:LongWord;
Description: Gets the current system clock count (32 least significant bits of total)
Note On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds and increment the rollover value. Because we return the lower 32 bits then the value returned by this function will rollover to zero every 4295 seconds or about every 71 minutes. 


function QEMUVPBClockGetTotal:Int64;
Description: Gets the total system clock count
Note On the VersatilePB this comes from the 24MHz counter which will overflow every 178 seconds and increment the rollover value. This is only accurate if either ClockGetCount or ClockGetTotal is called at least once per 178 seconds in order to increment the rollover. 


procedure QEMUVPBClockGetTimer(Data:Pointer);
Description: Timer procedure to ensure ClockGetTotal is called at least once per rollover interval
Note Not intended to be called directly by applications


QEMUVPB thread functions 

procedure QEMUVPBSchedulerInit;
Description: Initialize the scheduler interrupt on the boot CPU
Note None documented


QEMUVPB clock functions 

procedure QEMUVPBClockInterrupt(Parameter:Pointer);
Description: Interrupt handler function for the clock interrupt
Note This schedules another clock interrupt to occur CLOCK_CYCLES_PER_TICK in the future, then updates ClockTicks and ClockSeconds and checks for timers to trigger. 


procedure QEMUVPBClockUpdate(Cycles:LongWord; var Last:LongWord);
Description: Setup a clock interrupt to trigger after the specified number of clock cycles
Cycles Number of cycles after which the timer interrupt is to be triggered
Note This refers to native clock cycles as specified by CLOCK_FREQUENCY


QEMUVPB scheduler functions 

function QEMUVPBSchedulerInterrupt(CPUID:LongWord; Thread:TThreadHandle; Parameter:Pointer):TThreadHandle;
Description: Interrupt handler function for the scheduler interrupt
Note This schedules another scheduler interrupt to occur SCHEDULER_CLOCKS_PER_INTERRUPT in the future, then checks for threads to wakeup or timeout and the next thread to schedule. 


procedure QEMUVPBSchedulerUpdate(Cycles:LongWord; var Last:LongWord);
Description: Setup a scheduler interrupt to trigger after the specified number of clock cycles
Cycles Number of cycles after which the scheduler interrupt is to be triggered
Note This refers to native clock cycles as specified by VERSATILEPB_TIMER_FREQUENCY 


procedure QEMUVPBSchedulerSystemCall(Request:PSystemCallRequest);
Description: System Call handler for the scheduler
Note This is registered to receive requests for the SYSTEM_CALL_CONTEXT_SWITCH and will perform a context switch from within an SWI


QEMUVPB framebuffer functions 

function QEMUVPBFramebufferDeviceAllocate(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;
Description: Implementation of FramebufferDeviceAllocate API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceAllocate instead. 


function QEMUVPBFramebufferDeviceRelease(Framebuffer:PFramebufferDevice):LongWord;
Description: Implementation of FramebufferDeviceRelease API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceRelease instead. 


function QEMUVPBFramebufferDeviceBlank(Framebuffer:PFramebufferDevice; Blank:Boolean):LongWord;
Description: Implementation of FramebufferDevicBlank API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDevicBlank instead. 


function QEMUVPBFramebufferDeviceCommit(Framebuffer:PFramebufferDevice; Address:PtrUInt; Size,Flags:LongWord):LongWord;
Description: Implementation of FramebufferDeviceCommit API for PL110 Framebuffer
Note Not intended to be called directly by applications, use FramebufferDeviceCommit instead.


QEMUVPB helper functions 

procedure QEMUVPBBootBlink; assembler; nostackframe;
Description: Output characters to UART0 without dependency on any other RTL setup
Note None documented 


procedure QEMUVPBBootOutput(Value:LongWord);
Description: Output characters to UART0 without dependency on any other RTL setup
Note Based on hexstrings() function by dwelch67 (https://github.com/dwelch67) 


procedure QEMUVPBBootConsoleStart;
Description: To be documented
Note None documented 


procedure QEMUVPBBootConsoleWrite(const Value:String);
Description: To be documented
Note None documented 


procedure QEMUVPBBootConsoleWriteEx(const Value:String; X,Y:LongWord);
Description: To be documented
Note None documented 


function QEMUVPBBootConsoleGetX:LongWord;
Description: To be documented
Note None documented 


function QEMUVPBBootConsoleGetY:LongWord;
Description: To be documented
Note None documented


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