Difference between revisions of "Unit PL011"

Latest revision as of 05:46, 31 August 2021

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@@ Line 6: / Line 6: @@
 '''ARM PrimeCell PL011 UART Driver unit'''
-''To be documented''
 === Constants ===
@@ Line 58: / Line 56: @@
 |-
 | <code>PL011_UART_CLOCK_RATE = 24000000;</code>
+| &nbsp;
+|-
+|colspan="2"|&nbsp;
+|-
+| <code>PL011_UART_RX_POLL_LIMIT = 256;</code>
+| Number of times interrupt handler may poll the read FIFO
+|-
+| <code>PL011_UART_RX_BUFFER_SIZE = 1024;</code>
 | &nbsp;
 |-
@@ Line 722: / Line 728: @@
 | <code>Registers:PPL011UARTRegisters;</code>
 | Device registers
+|-
+|colspan="2"|&nbsp;
+|-
+| <code>Start:LongWord;</code>
+| Index of first available buffer entry
+|-
+| <code>Count:LongWord;</code>
+| Number of available entries in the buffer
+|-
+| <code>Buffer:array[0..(PL011_UART_RX_BUFFER_SIZE - 1)] of Word;</code>
+| Buffer for received data (Includes data and status)
 |-
 |colspan="2"|''Statistics Properties''
@@ Line 753: / Line 770: @@
 <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
-<pre style="border: 0; padding-bottom:0px;">function PL011UARTCreate(Address:LongWord; const Name:String; IRQ,ClockRate:LongWord):PUARTDevice;</pre>
+<pre style="border: 0; padding-bottom:0px;">function PL011UARTCreate(Address:PtrUInt; const Name:String; IRQ,ClockRate:LongWord):PUARTDevice;</pre>
 <div style="font-size: 14px; padding-left: 12px;">'''Description:''' Create and register a new PL011 UART device which can be accessed using the UART API</div>
 <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Address'''
+! Address
 | The address of the PL011 registers
 |-
-! '''Name'''
+! Name
 | The text description of this device which will show in the device list (Optional)
 |-
-! '''IRQ'''
+! IRQ
 | The interrupt number for the PL011
 |-
-! '''ClockRate'''
+! ClockRate
 | The clock source frequency for the PL011
 |-
-! '''Return'''
+! Return
 | Pointer to the new UART device or nil if the UART device could not be created
 |-
@@ Line 782: / Line 799: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''UART'''
+! UART
 | The UART device to destroy
 |-
-! '''Return'''
+! Return
 | ERROR_SUCCESS if completed or another error code on failure
 |-
@@ Line 800: / Line 817: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
-| Not intended to be called directly by applications, use UARTDeviceOpen instead
+| Not intended to be called directly by applications, use UARTDeviceOpen instead.
 |-
 |}
@@ Line 812: / Line 829: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
-| Not intended to be called directly by applications, use UARTDeviceClose instead
+| Not intended to be called directly by applications, use UARTDeviceClose instead.
 |-
 |}
@@ Line 824: / Line 841: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
-| Not intended to be called directly by applications, use UARTDeviceRead instead
+| Not intended to be called directly by applications, use UARTDeviceRead instead.
+|-
+|}
+</div></div>
+<br />
+<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;">
+<pre style="border: 0; padding-bottom:0px;">function PL011UARTPushRX(UART:PUARTDevice):LongWord;</pre>
+<div style="font-size: 14px; padding-left: 12px;">'''Description:''' To be documented</div>
+<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
+{| class="wikitable" style="font-size: 14px; background: white;"
+|-
+! Note
+| None documented
 |-
 |}
@@ Line 836: / Line 865: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
-| Not intended to be called directly by applications, use UARTDeviceWrite instead
+| Not intended to be called directly by applications, use UARTDeviceWrite instead.
 |-
 |}
@@ Line 848: / Line 877: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
-| Not intended to be called directly by applications, use UARTDeviceGetStatus instead
+| Not intended to be called directly by applications, use UARTDeviceGetStatus instead.
 |-
 |}
@@ Line 860: / Line 889: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
-| Not intended to be called directly by applications, use UARTDeviceSetStatus instead
+| Not intended to be called directly by applications, use UARTDeviceSetStatus instead.
 |-
 |}
@@ Line 872: / Line 901: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
 | Not intended to be called directly by applications
 |-
@@ Line 884: / Line 913: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
 | Not intended to be called directly by applications
 |-
@@ Line 896: / Line 925: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Note'''
+! Note
 | Not intended to be called directly by applications
 |-
@@ Line 908: / Line 937: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''UART'''
+! UART
 | The PL011 UART device to enable the interrupt for
 |-
-! '''Interrupt'''
+! Interrupt
 | The interrupt to enable
 |-
-! '''Note'''
+! Note
 | Caller must hold the UART lock
 |-
@@ Line 926: / Line 955: @@
 {| class="wikitable" style="font-size: 14px; background: white;"
 |-
-! '''Network'''
+! Network
 | The PL011 UART device to disable the interrupt for
 |-
-! '''Interrupt'''
+! Interrupt
 | The interrupt to disable
 |-
-! '''Note'''
+! Note
 | Caller must hold the UART lock
 |-

`PL011_UART_DESCRIPTION = 'ARM PrimeCell PL011 UART';`	Description of PL011 device

`PL011_UART_MIN_BAUD = 300;`	Default minimum of 300 baud
`PL011_UART_MAX_BAUD = 1500000;`	Default maximum based on 24MHz clock

`PL011_UART_MIN_DATABITS = SERIAL_DATA_5BIT;`
`PL011_UART_MAX_DATABITS = SERIAL_DATA_8BIT;`

`PL011_UART_MIN_STOPBITS = SERIAL_STOP_1BIT;`
`PL011_UART_MAX_STOPBITS = SERIAL_STOP_2BIT;`

`PL011_UART_MAX_PARITY = SERIAL_PARITY_EVEN;`

`PL011_UART_MAX_FLOW = SERIAL_FLOW_RTS_CTS;`

`PL011_UART_CLOCK_RATE = 24000000;`

`PL011_UART_RX_POLL_LIMIT = 256;`	Number of times interrupt handler may poll the read FIFO
`PL011_UART_RX_BUFFER_SIZE = 1024;`

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_DR_OE = (1 shl 11);`	Overrun error
`PL011_UART_DR_BE = (1 shl 10);`	Break error
`PL011_UART_DR_PE = (1 shl 9);`	Parity error
`PL011_UART_DR_FE = (1 shl 8);`	Framing error
`PL011_UART_DR_DATA = ($FF shl 0);`	Receive/Transmit data
`PL011_UART_DR_ERROR = PL011_UART_DR_OE or PL011_UART_DR_BE or PL011_UART_DR_PE or PL011_UART_DR_FE;`

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_RSRECR_OE = (1 shl 3);`	Overrun error
`PL011_UART_RSRECR_BE = (1 shl 2);`	Break error
`PL011_UART_RSRECR_PE = (1 shl 1);`	Parity error
`PL011_UART_RSRECR_FE = (1 shl 0);`	Framing error

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_FR_RI = (1 shl 8);`	Unsupported, write zero, read as don't care
`PL011_UART_FR_TXFE = (1 shl 7);`	Transmit FIFO empty
`PL011_UART_FR_RXFF = (1 shl 6);`	Receive FIFO full
`PL011_UART_FR_TXFF = (1 shl 5);`	Transmit FIFO full
`PL011_UART_FR_RXFE = (1 shl 4);`	Receive FIFO empty
`PL011_UART_FR_BUSY = (1 shl 3);`	UART busy
`PL011_UART_FR_DCD = (1 shl 2);`	Unsupported, write zero, read as don't care
`PL011_UART_FR_DSR = (1 shl 1);`	Unsupported, write zero, read as don't care
`PL011_UART_FR_CTS = (1 shl 0);`	Clear to send (This bit is the complement of the UART clear to send, nUARTCTS, modem status input. That is, the bit is 1 when nUARTCTS is LOW)

Difference between revisions of "Unit PL011"

Latest revision as of 05:46, 31 August 2021

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See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.htm

`PL011_UART_IBRD_MASK = ($FFFF shl 0);`

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.htm

`PL011_UART_FBRD_MASK = ($3F shl 0);`

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_LCRH_SPS = (1 shl 7);`	Stick parity select
`PL011_UART_LCRH_WLEN = (3 shl 5);`	Word length
`PL011_UART_LCRH_WLEN8 = (3 shl 5);`	8 bits
`PL011_UART_LCRH_WLEN7 = (2 shl 5);`	7 bits
`PL011_UART_LCRH_WLEN6 = (1 shl 5);`	6 bits
`PL011_UART_LCRH_WLEN5 = (0 shl 5);`	5 bits
`PL011_UART_LCRH_FEN = (1 shl 4);`	Enable FIFOs
`PL011_UART_LCRH_STP2 = (1 shl 3);`	Two stop bits select
`PL011_UART_LCRH_EPS = (1 shl 2);`	Even parity select (0 = odd parity/1 = even parity)
`PL011_UART_LCRH_PEN = (1 shl 1);`	Parity enable
`PL011_UART_LCRH_BRK = (1 shl 0);`	Send break

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_CR_CTSEN = (1 shl 15);`	CTS hardware flow control enable (If this bit is set to 1 data is only transmitted when the nUARTCTS signal is asserted)
`PL011_UART_CR_RTSEN = (1 shl 14);`	RTS hardware flow control enable (If this bit is set to 1 data is only requested when there is space in the receive FIFO for it to be received)
`PL011_UART_CR_OUT2 = (1 shl 13);`	Unsupported, write zero, read as don't care.
`PL011_UART_CR_OUT1 = (1 shl 12);`	Unsupported, write zero, read as don't care.
`PL011_UART_CR_RTS = (1 shl 11);`	Request to send (This bit is the complement of the UART request to send, nUARTRTS, modem status output. That is, when the bit is programmed to a 1 then nUARTRTS is LOW).
`PL011_UART_CR_DTR = (1 shl 10);`	Unsupported, write zero, read as don't care.
`PL011_UART_CR_RXE = (1 shl 9);`	Receive enable
`PL011_UART_CR_TXE = (1 shl 8);`	Transmit enable
`PL011_UART_CR_LBE = (1 shl 7);`	Loopback enable
Bits 6:3 Reserved - Write as 0, read as don't care
`PL011_UART_CR_SIRLP = (1 shl 2);`	Unsupported, write zero, read as don't care.
`PL011_UART_CR_SIREN = (1 shl 1);`	Unsupported, write zero, read as don't care.
`PL011_UART_CR_UARTEN = (1 shl 0);`	UART enable

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_IFLS_RXIFPSEL = (7 shl 9);`	Unsupported, write zero, read as don't care
`PL011_UART_IFLS_TXIFPSEL = (7 shl 6);`	Unsupported, write zero, read as don't care
`PL011_UART_IFLS_RXIFLSEL = (7 shl 3);`	Receive interrupt FIFO level select
`PL011_UART_IFLS_RXIFLSEL1_8 = (0 shl 3);`	b000 = Receive FIFO becomes >= 1/8 full
`PL011_UART_IFLS_RXIFLSEL1_4 = (1 shl 3);`	b001 = Receive FIFO becomes >= 1/4 full
`PL011_UART_IFLS_RXIFLSEL1_2 = (2 shl 3);`	b010 = Receive FIFO becomes >= 1/2 full
`PL011_UART_IFLS_RXIFLSEL3_4 = (3 shl 3);`	b011 = Receive FIFO becomes >= 3/4 full
`PL011_UART_IFLS_RXIFLSEL7_8 = (4 shl 3);`	b100 = Receive FIFO becomes >= 7/8 full
`PL011_UART_IFLS_TXIFLSEL = (7 shl 0);`	Transmit interrupt FIFO level select
`PL011_UART_IFLS_TXIFLSEL1_8 = (0 shl 0);`	b000 = Transmit FIFO becomes <= 1/8 full
`PL011_UART_IFLS_TXIFLSEL1_4 = (1 shl 0);`	b001 = Transmit FIFO becomes <= 1/4 full
`PL011_UART_IFLS_TXIFLSEL1_2 = (2 shl 0);`	b010 = Transmit FIFO becomes <= 1/2 full
`PL011_UART_IFLS_TXIFLSEL3_4 = (3 shl 0);`	b011 = Transmit FIFO becomes <= 3/4 full
`PL011_UART_IFLS_TXIFLSEL7_8 = (4 shl 0);`	b100 = Transmit FIFO becomes <= 7/8 full

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_IMSC_OEIM = (1 shl 10);`	Overrun error interrupt mask
`PL011_UART_IMSC_BEIM = (1 shl 9);`	Break error interrupt mask
`PL011_UART_IMSC_PEIM = (1 shl 8);`	Parity error interrupt mask
`PL011_UART_IMSC_FEIM = (1 shl 7);`	Framing error interrupt mask
`PL011_UART_IMSC_RTIM = (1 shl 6);`	Receive timeout interrupt mask
`PL011_UART_IMSC_TXIM = (1 shl 5);`	Transmit interrupt mask
`PL011_UART_IMSC_RXIM = (1 shl 4);`	Receive interrupt mask
`PL011_UART_IMSC_DSRMIM = (1 shl 3);`	Unsupported, write zero, read as don't care.
`PL011_UART_IMSC_DCDMIM = (1 shl 2);`	Unsupported, write zero, read as don't care.
`PL011_UART_IMSC_CTSMIM = (1 shl 1);`	nUARTCTS modem interrupt mask
`PL011_UART_IMSC_RIMIM = (1 shl 0);`	Unsupported, write zero, read as don't care.

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_RIS_OERIS = (1 shl 10);`	Overrun error interrupt status
`PL011_UART_RIS_BERIS = (1 shl 9);`	Break error interrupt status
`PL011_UART_RIS_PERIS = (1 shl 8);`	Parity error interrupt status
`PL011_UART_RIS_FERIS = (1 shl 7);`	Framing error interrupt status
`PL011_UART_RIS_RTRIS = (1 shl 6);`	Receive timeout interrupt status
`PL011_UART_RIS_TXRIS = (1 shl 5);`	Transmit interrupt status
`PL011_UART_RIS_RXRIS = (1 shl 4);`	Receive interrupt status
`PL011_UART_RIS_DSRMRIS = (1 shl 3);`	Unsupported, write zero, read as don't care.
`PL011_UART_RIS_DCDMRIS = (1 shl 2);`	Unsupported, write zero, read as don't care.
`PL011_UART_RIS_CTSMRIS = (1 shl 1);`	nUARTCTS modem interrupt status
`PL011_UART_RIS_RIMRIS = (1 shl 0);`	Unsupported, write zero, read as don't care.

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_MIS_OEMIS = (1 shl 10);`	Overrun error masked interrupt status
`PL011_UART_MIS_BEMIS = (1 shl 9);`	Break error masked interrupt status
`PL011_UART_MIS_PEMIS = (1 shl 8);`	Parity error masked interrupt status
`PL011_UART_MIS_FEMIS = (1 shl 7);`	Framing error masked interrupt status
`PL011_UART_MIS_RTMIS = (1 shl 6);`	Receive timeout masked interrupt status
`PL011_UART_MIS_TXMIS = (1 shl 5);`	Transmit masked interrupt status
`PL011_UART_MIS_RXMIS = (1 shl 4);`	Receive masked interrupt status
`PL011_UART_MIS_DSRMMIS = (1 shl 3);`	Unsupported, write zero, read as don't care.
`PL011_UART_MIS_DCDMMIS = (1 shl 2);`	Unsupported, write zero, read as don't care.
`PL011_UART_MIS_CTSMMIS = (1 shl 1);`	nUARTCTS modem masked interrupt status
`PL011_UART_MIS_RIMMIS = (1 shl 0);`	Unsupported, write zero, read as don't care.

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

`PL011_UART_ICR_OEIC = (1 shl 10);`	Overrun error interrupt clear
`PL011_UART_ICR_BEIC = (1 shl 9);`	Break error interrupt clear
`PL011_UART_ICR_PEIC = (1 shl 8);`	Parity error interrupt clear
`PL011_UART_ICR_FEIC = (1 shl 7);`	Framing error interrupt clear
`PL011_UART_ICR_RTIC = (1 shl 6);`	Receive timeout interrupt clear
`PL011_UART_ICR_TXIC = (1 shl 5);`	Transmit interrupt clear
`PL011_UART_ICR_RXIC = (1 shl 4);`	Receive interrupt clear
`PL011_UART_ICR_DSRMIC = (1 shl 3);`	Unsupported, write zero, read as don't care.
`PL011_UART_ICR_DCDMIC = (1 shl 2);`	Unsupported, write zero, read as don't care.
`PL011_UART_ICR_CTSMIC = (1 shl 1);`	nUARTCTS modem interrupt clear
`PL011_UART_ICR_RIMIC = (1 shl 0);`	Unsupported, write zero, read as don't care.

See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

This register is disabled, writing to it has no effect and reading returns 0.

Note: Layout of the PL011 registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/I18702.html))
`DR:LongWord;`	Data Register
`RSRECR:LongWord;`	Receive Status Register/Error Clear Register
`Reserved01:LongWord;`
`Reserved02:LongWord;`
`Reserved03:LongWord;`
`Reserved04:LongWord;`
`FR:LongWord;`	Flag register
`Reserved05:LongWord;`
`ILPR:LongWord;`	IrDA Low-Power Counter Register
`IBRD:LongWord;`	Integer Baud rate divisor
`FBRD:LongWord;`	Fractional Baud rate divisor
`LCRH:LongWord;`	Line Control register
`CR:LongWord;`	Control register
`IFLS:LongWord;`	Interrupt FIFO Level Select Register
`IMSC:LongWord;`	Interrupt Mask Set Clear Register
`RIS:LongWord;`	Raw Interrupt Status Register
`MIS:LongWord;`	Masked Interrupt Status Register
`ICR:LongWord;`	Interrupt Clear Register
`DMACR:LongWord;`	DMA Control Register
`Reserved11:LongWord;`
`Reserved12:LongWord;`
`Reserved13:LongWord;`
`Reserved14:LongWord;`
`Reserved15:LongWord;`
`Reserved16:LongWord;`
`Reserved17:LongWord;`
`Reserved18:LongWord;`
`Reserved19:LongWord;`
`Reserved1A:LongWord;`
`Reserved1B:LongWord;`
`Reserved1C:LongWord;`
`Reserved1D:LongWord;`
`ITCR:LongWord;`	Test Control Register
`ITIP:LongWord;`	Integration Test Input Register
`ITOP:LongWord;`	Integration Test Output Register
`TDR:LongWord;`	Test Data Register

UART Properties
`UART:TUARTDevice;`
PL011 Properties
`IRQ:LongWord;`
`Lock:TSpinHandle;`	Device lock (Differs from lock in UART device) (Spin lock due to use by interrupt handler)
`ClockRate:LongWord;`	Device clock rate
`Registers:PPL011UARTRegisters;`	Device registers

`Start:LongWord;`	Index of first available buffer entry
`Count:LongWord;`	Number of available entries in the buffer
`Buffer:array[0..(PL011_UART_RX_BUFFER_SIZE - 1)] of Word;`	Buffer for received data (Includes data and status)
Statistics Properties
`InterruptCount:LongWord;`	Number of interrupt requests received by the device

Address	The address of the PL011 registers
Name	The text description of this device which will show in the device list (Optional)
IRQ	The interrupt number for the PL011
ClockRate	The clock source frequency for the PL011
Return	Pointer to the new UART device or nil if the UART device could not be created

UART	The UART device to destroy
Return	ERROR_SUCCESS if completed or another error code on failure

UART	The PL011 UART device to enable the interrupt for
Interrupt	The interrupt to enable
Note	Caller must hold the UART lock

Network	The PL011 UART device to disable the interrupt for
Interrupt	The interrupt to disable
Note	Caller must hold the UART lock