Difference between revisions of "Unit PL031"
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+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''PL031 specific constants''' <code> PL031_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PL031_RTC_DESCRIPTION = 'ARM PrimeCell PL031 Real Time Clock';</code> | ||
+ | | Description of PL031 device | ||
+ | |- | ||
+ | |colspan="2"| | ||
+ | |- | ||
+ | | <code>PL031_MIN_TIME = TIME_TICKS_TO_1970;</code> | ||
+ | | Time starts at 01/01/1970 00:00:00 (MM/DD/YY HH:MM:SS) | ||
+ | |- | ||
+ | | <code>PL031_MAX_TIME = 137919572470000000;</code> | ||
+ | | Time ends at 19/1/2038 03:14:07 (MM/DD/YY HH:MM:SS) | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''PL031 RTC control register''' <code> PL031_RTC_CR_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PL031_RTC_CR_EN = (1 shl 0);</code> | ||
+ | | If set to 1, the RTC is enabled. Once it is enabled, any writes to this bit have no effect on the RTC until a system reset. A read returns the status of the RTC. | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''PL031 RTC interrupt mask set and clear register''' <code> PL031_RTC_IMSC_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PL031_RTC_IMSC_INTR_SET = (1 shl 0);</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | | <code>PL031_RTC_IMSC_INTR_CLEAR = (0 shl 0);</code> | ||
+ | | | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''PL031 RTC raw interrupt status register''' <code> PL031_RTC_RIS_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PL031_RTC_RIS_INTR = (1 shl 0);</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''PL031 RTC masked interrupt status register''' <code> PL031_RTC_MIS_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PL031_RTC_MIS_INTR = (1 shl 0);</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
+ | <div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;"> | ||
+ | <div style="font-size: 14px; padding-left: 12px;">'''PL031 RTC interrupt clear register''' <code> PL031_RTC_ICR_* </code></div> | ||
+ | <div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;"> | ||
+ | {| class="wikitable" style="font-size: 14px; background: white;" | ||
+ | |- | ||
+ | | <code>PL031_RTC_ICR_INTR = (1 shl 0);</code> | ||
+ | | style="width: 50%;"| | ||
+ | |- | ||
+ | |} | ||
+ | </div></div> | ||
+ | <br /> | ||
=== Type definitions === | === Type definitions === |
Revision as of 05:12, 23 April 2017
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Description
ARM PrimeCell PL031 Real Time Clock Driver unit
The PL031 is a simple memory mapped Real Time Clock (RTC) device that supports a single 32-bit time counter based on the Unix time format which starts at 1 Jan 1970 and runs out at 19 Jan 2038.
The device also includes a single alarm value which can trigger an interrupt when the selected time is reached.
This driver currently does not support reading or setting the alarm value.
Constants
PL031_*
PL031_RTC_DESCRIPTION = 'ARM PrimeCell PL031 Real Time Clock';
|
Description of PL031 device |
PL031_MIN_TIME = TIME_TICKS_TO_1970;
|
Time starts at 01/01/1970 00:00:00 (MM/DD/YY HH:MM:SS) |
PL031_MAX_TIME = 137919572470000000;
|
Time ends at 19/1/2038 03:14:07 (MM/DD/YY HH:MM:SS) |
PL031_RTC_CR_*
PL031_RTC_CR_EN = (1 shl 0);
|
If set to 1, the RTC is enabled. Once it is enabled, any writes to this bit have no effect on the RTC until a system reset. A read returns the status of the RTC. |
PL031_RTC_IMSC_*
PL031_RTC_IMSC_INTR_SET = (1 shl 0);
|
|
PL031_RTC_IMSC_INTR_CLEAR = (0 shl 0);
|
PL031_RTC_RIS_*
PL031_RTC_RIS_INTR = (1 shl 0);
|
PL031_RTC_MIS_*
PL031_RTC_MIS_INTR = (1 shl 0);
|
PL031_RTC_ICR_*
PL031_RTC_ICR_INTR = (1 shl 0);
|
Type definitions
PL031 real time clock (RTC) registers
PPL031RTCRegisters = ^TPL031RTCRegisters;
TPL031RTCRegisters = record
Note: Layout of the PL031 registers (See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0224b/i1005653.html) | |
DR:LongWord;
|
Data register |
MR:LongWord;
|
Match register |
LR:LongWord;
|
Load register |
CR:LongWord;
|
Control register |
IMSC:LongWord;
|
Interrupt mask set and clear register |
RIS:LongWord;
|
Raw interrupt status register |
MIS:LongWord;
|
Masked interrupt status register |
ICR:LongWord;
|
Interrupt clear register |
PL031 real time clock (RTC)
PPL031RTC = ^TPL031RTC;
TPL031RTC = record
RTC Properties | |
RTC:TRTCDevice;
|
|
PL031 Properties | |
IRQ:LongWord;
|
|
Registers:PPL031RTCRegisters;
|
Device registers |
Statistics Properties | |
InterruptCount:LongWord;
|
Number of interrupt requests received by the device |
Public variables
None defined
Function declarations
PL031 functions
function PL031RTCCreate(Address:LongWord; const Name:String; IRQ:LongWord):PRTCDevice;
Address | The address of the PL031 registers |
---|---|
Name | The text description of this device which will show in the device list (Optional) |
IRQ | The interrupt number for the PL031 |
Return | Pointer to the new RTC device or nil if the RTC device could not be created |
function PL031RTCDestroy(RTC:PRTCDevice):LongWord;
RTC | The RTC device to destroy |
---|---|
Return | ERROR_SUCCESS if completed or another error code on failure |
PL031 RTC functions
function PL031RTCStart(RTC:PRTCDevice):LongWord;
Note | Not intended to be called directly by applications, use RTCDeviceStart instead |
---|
function PL031RTCStop(RTC:PRTCDevice):LongWord;
Note | Not intended to be called directly by applications, use RTCDeviceStop instead |
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function PL031RTCGetTime(RTC:PRTCDevice):Int64;
Note | Not intended to be called directly by applications, use RTCDeviceGetTime instead |
---|
function PL031RTCSetTime(RTC:PRTCDevice; const Time:Int64):Int64;
Note | Not intended to be called directly by applications, use RTCDeviceSetTime instead |
---|
PL031 helper functions
function PL031FileTimeToRTCTime(RTC:PRTCDevice; const FileTime:Int64; var RTCTime:LongWord):Boolean;
Note | None documented |
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function PL031RTCTimeToFileTime(RTC:PRTCDevice; RTCTime:LongWord; var FileTime:Int64):Boolean;
Note | None documented |
---|
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