Difference between revisions of "Unit PL110"

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----
  
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''To be documented''
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 specific constants''' <code> PL110_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>PL110_FRAMEBUFFER_DESCRIPTION = 'ARM PrimeCell PL110 Color LCD';</code>
 +
| Description of PL110 device
 +
|-
 +
|}
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</div></div>
 +
<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 mode constants''' <code> PL110_MODE_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>PL110_MODE_UNKNOWN = 0;</code>
 +
| &nbsp;
 +
|-
 +
| <code>PL110_MODE_VGA = 1;</code>
 +
| Connected to a VGA display
 +
|-
 +
| <code>PL110_MODE_SVGA = 2;</code>
 +
| Connected to a SVGA display
 +
|-
 +
| <code>PL110_MODE_TFT = 3;</code>
 +
| Connected to a TFT display
 +
|-
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| <code>PL110_MODE_STN = 4;</code>
 +
| Connected to an STN display
 +
|-
 +
|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 register offset constants''' <code> PL110_CLCD_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>PL110_CLCD_TIMING0 = $00000000;</code>
 +
| Horizontal Axis Panel Control Register
 +
|-
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| <code>PL110_CLCD_TIMING1 = $00000004;</code>
 +
| Vertical Axis Panel Control Register
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|-
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| <code>PL110_CLCD_TIMING2 = $00000008;</code>
 +
| Clock and Signal Polarity Control Register
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|-
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| <code>PL110_CLCD_TIMING3 = $0000000c;</code>
 +
| Line End Control Register
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|-
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| <code>PL110_CLCD_UPBASE = $00000010;</code>
 +
| Upper Panel Frame Base Address Registers
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|-
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| <code>PL110_CLCD_LPBASE = $00000014;</code>
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| Lower Panel Frame Base Address Registers
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|-
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| <code>PL110_CLCD_CONTROL = $00000018;</code>
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| Control Register ''Note: Reversed in VersatilePB implementation, 0x0000001c in PL110 TRM''
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|-
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| <code>PL110_CLCD_IMSC = $0000001c;</code>
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| Interrupt Mask Set/Clear Register ''Note: Reversed in VersatilePB implementation, 0x00000018 in PL110 TRM''
 +
|-
 +
| <code>PL110_CLCD_RIS = $00000020;</code>
 +
| Raw Interrupt Status Register
 +
|-
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| <code>PL110_CLCD_MIS = $00000024;</code>
 +
| Masked Interrupt Status Register
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|-
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| <code>PL110_CLCD_ICR = $00000028;</code>
 +
| Interrupt Clear Register
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|-
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| <code>PL110_CLCD_UPCURR = $0000002C;</code>
 +
| Upper Panel Current Address Value Registers
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|-
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| <code>PL110_CLCD_LPCURR = $00000030;</code>
 +
| Lower Panel Current Address Value Registers
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|-
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| <code>PL110_CLCD_PALETTE = $00000200;</code>
 +
| Color Palette Register
 +
|-
 +
|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD Timing0 constants''' <code> PL110_CLCD_TIMING0_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
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|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>PL110_CLCD_TIMING0_HBP = ($FF shl 24);</code>
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| Horizontal back porch
 +
|-
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| <code>PL110_CLCD_TIMING0_HFP = ($FF shl 16);</code>
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| Horizontal front porch
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|-
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| <code>PL110_CLCD_TIMING0_HSW = ($FF shl 8);</code>
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| Horizontal synchronization pulse width
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|-
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| <code>PL110_CLCD_TIMING0_PPL = ($FC shl 2);</code>
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| Pixels-per-line (Actual pixels-per-line = 16 * (PPL + 1))
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|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD Timing1 constants''' <code> PL110_CLCD_TIMING1_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>PL110_CLCD_TIMING1_VBP = ($FF shl 24);</code>
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| Vertical back porch
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|-
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| <code>PL110_CLCD_TIMING1_VFP = ($FF shl 16);</code>
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| Vertical front porch
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|-
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| <code>PL110_CLCD_TIMING1_VSW = ($FC shl 10);</code>
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| Vertical synchronization pulse width
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|-
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| <code>PL110_CLCD_TIMING1_LPP = ($3FF shl 0);</code>
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| Lines per panel is the number of active lines per screen (Program to number of lines required minus 1)
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|-
 +
|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD Timing2 constants''' <code> PL110_CLCD_TIMING2_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>PL110_CLCD_TIMING2_PCD_HI = ($1F shl 27);</code>
 +
| Upper five bits of Panel Clock Divisor
 +
|-
 +
| <code>PL110_CLCD_TIMING2_BCD = (1 shl 26);</code>
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| Bypass pixel clock divider
 +
|-
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| <code>PL110_CLCD_TIMING2_CPL = ($3FF shl 16);</code>
 +
| Clocks per line
 +
|-
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| <code>PL110_CLCD_TIMING2_IOE = (1 shl 14);</code>
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| Invert output enable
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|-
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| <code>PL110_CLCD_TIMING2_IPC = (1 shl 13);</code>
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| Invert panel clock
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|-
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| <code>PL110_CLCD_TIMING2_IHS = (1 shl 12);</code>
 +
| Invert horizontal synchron
 +
|-
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| <code>PL110_CLCD_TIMING2_IVS = (1 shl 11);</code>
 +
| Invert vertical synchronization
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|-
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| <code>PL110_CLCD_TIMING2_ACB = ($1F shl 6);</code>
 +
| AC bias pin frequency
 +
|-
 +
| <code>PL110_CLCD_TIMING2_CLKSEL = (1 shl 5);</code>
 +
| This bit drives the CLCDCLKSEL signal which is used as the select signal for the external LCD clock multiplexor
 +
|-
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| <code>PL110_CLCD_TIMING2_PCD_LO = ($1F shl 0);</code>
 +
| Lower five bits of Panel Clock Divisor
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|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD Timing3 constants''' <code> PL110_CLCD_TIMING3_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
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|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
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|-
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|colspan="2"|&nbsp;
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|-
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| <code>PL110_CLCD_TIMING3_LEE = (1 shl 16);</code>
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| LCD Line end enable: 0 = CLLE disabled (held LOW) / 1 = CLLE signal active
 +
|-
 +
| <code>PL110_CLCD_TIMING3_LED = ($3F shl 0);</code>
 +
| Line-end signal delay from the rising-edge of the last panel clock
 +
|-
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|}
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</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 CLCD control constants''' <code> PL110_CLCD_CONTROL_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
|colspan="2"|See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0161e/I913915.html
 +
|-
 +
|colspan="2"|&nbsp;
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|-
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| <code>PL110_CLCD_CONTROL_LCDEN = (1 shl 0);</code>
 +
| &nbsp;
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP1 = (0 shl 1);</code>
 +
| LCD bits per pixel: 000 = 1 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP2 = (1 shl 1);</code>
 +
| LCD bits per pixel: 001 = 2 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP4 = (2 shl 1);</code>
 +
| LCD bits per pixel: 010 = 4 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP8 = (3 shl 1);</code>
 +
| LCD bits per pixel: 011 = 8 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP16 = (4 shl 1);</code>
 +
| LCD bits per pixel: 100 = 16 bpp
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP16_565 = (6 shl 1);</code>
 +
| LCD bits per pixel: 110 = 16 bpp 565 (PL111 only)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP16_444 = (7 shl 1);</code>
 +
| LCD bits per pixel: 111 = 16 bpp 444 (PL111 only)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDBPP24 = (5 shl 1);</code>
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| LCD bits per pixel: 101 = 24 bpp
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|-
 +
| <code>PL110_CLCD_CONTROL_LCDBW = (1 shl 4);</code>
 +
| STN LCD is monochrome (black and white) (0 = STN LCD is color / 1 = STN LCD is monochrome)
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|-
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| <code>PL110_CLCD_CONTROL_LCDTFT = (1 shl 5);</code>
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| LCD is TFT (0 = LCD is an STN display, use gray scaler / 1 = LCD is TFT, do not use gray scaler)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDMONO8 = (1 shl 6);</code>
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| Monochrome LCD has an 8-bit interface (0 = mono LCD uses 4-bit interface / 1 = mono LCD uses 8-bit interface)
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|-
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| <code>PL110_CLCD_CONTROL_LCDDUAL = (1 shl 7);</code>
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| LCD interface is dual panel STN (0 = single panel LCD is in use / 1 = dual panel LCD is in use)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_BGR = (1 shl 8);</code>
 +
| RGB of BGR format selection (0 = RGB normal output / 1 = BGR red and blue swapped.)
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|-
 +
| <code>PL110_CLCD_CONTROL_BEBO = (1 shl 9);</code>
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| Big-endian byte order (0 = little-endian byte order / 1 = big-endian byte order)
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|-
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| <code>PL110_CLCD_CONTROL_BEPO = (1 shl 10);</code>
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| Big-endian pixel ordering within a byte (0 = little-endian pixel ordering within a byte / 1= big-endian pixel ordering within a byte)
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDPWR = (1 shl 11);</code>
 +
| LCD power enable
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_VSYNC = (0 shl 12);</code>
 +
| Generate interrupt at: 00 = start of vertical synchronization
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_BPORCH = (1 shl 12);</code>
 +
| Generate interrupt at: 01 = start of back porch
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|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_VIDEO = (2 shl 12);</code>
 +
| Generate interrupt at: 10 = start of active video
 +
|-
 +
| <code>PL110_CLCD_CONTROL_LCDVCOMP_FPORCH = (3 shl 12);</code>
 +
| Generate interrupt at: 11 = start of front porch
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|-
 +
| <code>PL110_CLCD_CONTROL_LDMAFIFOTIME = (1 shl 15);</code>
 +
| Unknown
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|-
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| <code>PL110_CLCD_CONTROL_WATERMARK = (1 shl 16);</code>
 +
| LCD DMA FIFO Watermark level
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|-
 +
|}
 +
</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
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<div style="font-size: 14px; padding-left: 12px;">'''PL110 control constants''' <code> PL110_CONTROL_* </code></div>
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<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
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{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>PL110_CONTROL_VGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;</code>
 +
| style="width: 50%;"|&nbsp;
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|-
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| <code>PL110_CONTROL_SVGA = PL110_CLCD_CONTROL_LCDTFT or PL110_CLCD_CONTROL_LCDVCOMP_BPORCH;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
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<br />
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<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 timing0 constants''' <code> PL110_TIMING0_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
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|-
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| <code>PL110_TIMING0_VGA = $3F1F3F9C;</code>
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| style="width: 50%;"|&nbsp;
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|-
 +
| <code>PL110_TIMING0_SVGA = $1313A4C4;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br />
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 timing1 constants''' <code> PL110_TIMING1_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_TIMING1_VGA = $090B61DF;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>PL110_TIMING1_SVGA = $0505F657;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br /> 
 +
<div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 20px; padding-bottom: 15px;">
 +
<div style="font-size: 14px; padding-left: 12px;">'''PL110 timing2 constants''' <code> PL110_TIMING2_* </code></div>
 +
<div class="mw-collapsible-content" style="text-align: left; padding-left: 5px;">
 +
{| class="wikitable" style="font-size: 14px; background: white;"
 +
|-
 +
| <code>PL110_TIMING2_VGA = $067F1800;</code>
 +
| style="width: 50%;"|&nbsp;
 +
|-
 +
| <code>PL110_TIMING2_SVGA = $071F1800;</code>
 +
| &nbsp;
 +
|-
 +
|}
 +
</div></div>
 +
<br />
  
 
=== Type definitions ===
 
=== Type definitions ===

Revision as of 00:32, 14 December 2016

Return to Unit Reference


Description

The ARM PrimeCell PL110 Color LCD Controller is a AMBA compliant module that provides LCD display support for both TFT and STN displays in a variety of configurations.

While the controller supports TFT displays it differs from other TFT display controllers because it has a DMA interface to system memory rather than using SPI or other serial transfer protocols.

Currently this driver only supports the setup required for the QEMU VersatilePB target however it is possible to support additional configurations by adding more variations of the PL110FramebufferCreate functions (eg PL110FramebufferCreateSTN etc).

Note: The driver does not include support for FRAMEBUFFER_FLAG_SYNC as the QEMU emulation of the device does not provide interrupt support at present.

Constants


[Expand]
PL110 specific constants PL110_*


[Expand]
PL110 mode constants PL110_MODE_*


[Expand]
PL110 register offset constants PL110_CLCD_*


[Expand]
PL110 CLCD Timing0 constants PL110_CLCD_TIMING0_*


[Expand]
PL110 CLCD Timing1 constants PL110_CLCD_TIMING1_*


[Expand]
PL110 CLCD Timing2 constants PL110_CLCD_TIMING2_*


[Expand]
PL110 CLCD Timing3 constants PL110_CLCD_TIMING3_*


[Expand]
PL110 CLCD control constants PL110_CLCD_CONTROL_*


[Expand]
PL110 control constants PL110_CONTROL_*


[Expand]
PL110 timing0 constants PL110_TIMING0_*


[Expand]
PL110 timing1 constants PL110_TIMING1_*


[Expand]
PL110 timing2 constants PL110_TIMING2_*


Type definitions

To be documented

Public variables

To be documented

Function declarations


PL110 functions

[Expand] 
function PL110FramebufferCreateVGA(Address:LongWord; const Name:String; Rotation,Width,Height,Depth:LongWord):PFramebufferDevice;
Description: Create, register and allocate a new PL110 Framebuffer device which can be accessed using the framebuffer API


[Expand] 
function PL110FramebufferCreateSVGA(Address:LongWord; const Name:String; Rotation,Width,Height,Depth:LongWord):PFramebufferDevice;
Description: Create, register and allocate a new PL110 Framebuffer device which can be accessed using the framebuffer API


[Expand] 
function PL110FramebufferDestroy(Framebuffer:PFramebufferDevice):LongWord;
Description: Release, deregister and destroy a PL110 Framebuffer device created by this driver


PL110 framebuffer functions

[Expand] 
function PL110FramebufferAllocate(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;
Description: Implementation of FramebufferDeviceAllocate API for PL110 Framebuffer


[Expand] 
function PL110FramebufferRelease(Framebuffer:PFramebufferDevice):LongWord;
Description: Implementation of FramebufferDeviceRelease API for PL110 Framebuffer


[Expand] 
function PL110FramebufferBlank(Framebuffer:PFramebufferDevice; Blank:Boolean):LongWord;
Description: Implementation of FramebufferDevicBlank API for PL110 Framebuffer


[Expand] 
function PL110FramebufferCommit(Framebuffer:PFramebufferDevice; Address,Size,Flags:LongWord):LongWord;
Description: Implementation of FramebufferDeviceCommit API for PL110 Framebuffer


[Expand] 
function PL110FramebufferSetOffset(Framebuffer:PFramebufferDevice; X,Y:LongWord; Pan:Boolean):LongWord;
Description: Implementation of FramebufferDeviceSetOffset API for PL110 Framebuffer


[Expand] 
function PL110FramebufferSetProperties(Framebuffer:PFramebufferDevice; Properties:PFramebufferProperties):LongWord;
Description: Implementation of FramebufferDeviceSetProperties API for PL110 Framebuffer


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Retrieved from "https://ultibo.org/mediawiki_ultibo_org/index.php?title=Unit_PL110&oldid=1965"