Difference between revisions of "Unit BootRPi"
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Other: GPIO / SPI / I2C / I2S / PL011 (UART) / PWM / SMI / Watchdog (PM) / Random (RNG) / Timer ??? | Other: GPIO / SPI / I2C / I2S / PL011 (UART) / PWM / SMI / Watchdog (PM) / Random (RNG) / Timer ??? | ||
| + | |||
| + | '''Boot RPi''' | ||
| + | |||
| + | The boot loader on the Raspberry Pi will load this code at address 0x00008000 onwards and set the following registers before jumping to this code. | ||
| + | |||
| + | R0 - Zero | ||
| + | |||
| + | R1 - Machine Type (Raspberry Pi or BCM2708 = 0x0c42) | ||
| + | |||
| + | R2 - Address of the ARM Tags structure (Normally 0x0100) | ||
| + | |||
| + | On entry to this code the processor will be in the following state: | ||
| + | |||
| + | World - Secure | ||
| + | |||
| + | Mode - Supervisor (ARM_MODE_SVC) | ||
| + | |||
| + | MMU - Disabled | ||
| + | |||
| + | FPU - Disabled | ||
| + | |||
| + | L1 Data Cache - Disabled | ||
| + | |||
| + | L1 Instruction Cache - Disabled | ||
| + | |||
| + | Branch Predication - Disabled | ||
| + | |||
| + | Unaligned Data Access - Disabled | ||
| + | |||
| + | Ultibo switches the processor to System mode for all operations and remains in the Secure world. | ||
| + | |||
| + | The initialization process enables the MMU, FPU, L1 Cache and other performance optimizations. | ||
=== Constants === | === Constants === | ||
Revision as of 02:23, 21 October 2016
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Description
Raspberry Pi
SoC: Broadcom BCM2835
CPU: ARM1176 (ARMv6) (1 @ 700MHz)
Cache: L1 16KB / L2 128KB (Shared with GPU)
FPU: VFPV2
GPU: Broadcom VideoCore IV (VC4)
RAM: 512MB (256MB on Model A/A+)
USB: Synopsys DesignWare Hi-Speed USB 2.0 On-The-Go Controller (DWCOTG)
LAN: SMSC LAN9512 (SMSC LAN9514 on Model B+ / No LAN on Model A/A+/Zero) (SMSC95XX)
SD/MMC: Arasan (BCM2708)
WiFi: (None)
Bluetooth: (None)
Other: GPIO / SPI / I2C / I2S / PL011 (UART) / PWM / SMI / Watchdog (PM) / Random (RNG) / Timer ???
Boot RPi
The boot loader on the Raspberry Pi will load this code at address 0x00008000 onwards and set the following registers before jumping to this code.
R0 - Zero
R1 - Machine Type (Raspberry Pi or BCM2708 = 0x0c42)
R2 - Address of the ARM Tags structure (Normally 0x0100)
On entry to this code the processor will be in the following state:
World - Secure
Mode - Supervisor (ARM_MODE_SVC)
MMU - Disabled
FPU - Disabled
L1 Data Cache - Disabled
L1 Instruction Cache - Disabled
Branch Predication - Disabled
Unaligned Data Access - Disabled
Ultibo switches the processor to System mode for all operations and remains in the Secure world.
The initialization process enables the MMU, FPU, L1 Cache and other performance optimizations.
Constants
To be documented
Type definitions
To be documented
Public variables
To be documented
Function declarations
To be documented
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