https://ultibo.org/mediawiki_ultibo_org/index.php?action=history&feed=atom&title=Unit_PlatformARMv6
Unit PlatformARMv6 - Revision history
2026-05-17T00:23:39Z
Revision history for this page on the wiki
MediaWiki 1.26.1
https://ultibo.org/mediawiki_ultibo_org/index.php?title=Unit_PlatformARMv6&diff=5324&oldid=prev
Ultibo at 01:35, 22 April 2022
2022-04-22T01:35:45Z
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 01:35, 22 April 2022</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;"></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><div class="toccolours mw-collapsible mw-collapsed" style="border: 1; font-family: arial; padding-top: 0px; padding-bottom: 15px;"></div></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div><pre style="border: 0; padding-bottom:0px;">procedure ARMv6Halt; assembler; nostackframe; public name'_haltproc';</pre></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><pre style="border: 0; padding-bottom:0px;">procedure ARMv6Halt; assembler; nostackframe; public name '_haltproc';</pre></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><div style="font-size: 14px; padding-left: 12px;">'''Description:''' The purpose of the Wait For Interrupt operation is to put the processor in to a low power state</div></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><div style="font-size: 14px; padding-left: 12px;">'''Description:''' The purpose of the Wait For Interrupt operation is to put the processor in to a low power state</div></div></td></tr>
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Ultibo
https://ultibo.org/mediawiki_ultibo_org/index.php?title=Unit_PlatformARMv6&diff=5196&oldid=prev
Ultibo at 06:14, 31 August 2021
2021-08-31T06:14:38Z
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 06:14, 31 August 2021</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>'''Ultibo Platform <del class="diffchange diffchange-inline">interface </del>unit for ARMv6'''</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>'''Ultibo Platform <ins class="diffchange diffchange-inline">Interface </ins>unit for ARMv6'''</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The ARMv6 (ARM11) does not support WFI, WFE, DMB, DSB or ISB instructions, these must be done using MCR operations on the system control processor registers.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The ARMv6 (ARM11) does not support WFI, WFE, DMB, DSB or ISB instructions, these must be done using MCR operations on the system control processor registers.</div></td></tr>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanDataCacheRangeInternal(Address,Size:LongWord); assembler; nostackframe;</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanDataCacheRangeInternal(Address:PtrUInt; Size:LongWord); assembler; nostackframe;</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean data cache range operation</div>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanDataCacheRange(Address,Size:LongWord);</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanDataCacheRange(Address:PtrUInt; Size:LongWord);</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean data cache range, limiting the size for each operation to 4MB because some processors fail to correctly operate with larger ranges</div>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean data cache range, limiting the size for each operation to 4MB because some processors fail to correctly operate with larger ranges</div>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6InvalidateDataCacheRangeInternal(Address,Size:LongWord); assembler; nostackframe;</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6InvalidateDataCacheRangeInternal(Address:PtrUInt; Size:LongWord); assembler; nostackframe;</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform an invalidate data cache range operation</div>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform an invalidate data cache range operation</div>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6InvalidateDataCacheRange(Address,Size:LongWord);</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6InvalidateDataCacheRange(Address:PtrUInt; Size:LongWord);</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform an invalidate data cache range, limiting the size for each operation to 4MB because some processors fail to correctly operate with larger ranges</div>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform an invalidate data cache range, limiting the size for each operation to 4MB because some processors fail to correctly operate with larger ranges</div>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanAndInvalidateDataCacheRangeInternal(Address,Size:LongWord); assembler; nostackframe;</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanAndInvalidateDataCacheRangeInternal(Address:PtrUInt; Size:LongWord); assembler; nostackframe;</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean and invalidate data cache range operation</div>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean and invalidate data cache range operation</div>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanAndInvalidateDataCacheRange(Address,Size:LongWord);</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6CleanAndInvalidateDataCacheRange(Address:PtrUInt; Size:LongWord);</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean and invalidate data cache range, limiting the size for each operation to 4MB because some processors fail to correctly operate with larger ranges</div>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform a clean and invalidate data cache range, limiting the size for each operation to 4MB because some processors fail to correctly operate with larger ranges</div>
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− <pre style="border: 0; padding-bottom:0px;">procedure ARMv6InvalidateInstructionCacheRangeInternal(Address,Size:LongWord); assembler; nostackframe;</pre>
+ <pre style="border: 0; padding-bottom:0px;">procedure ARMv6InvalidateInstructionCacheRangeInternal(Address:PtrUInt; Size:LongWord); assembler; nostackframe;</pre>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform an invalidate instruction cache range operation</div>
<div style="font-size: 14px; padding-left: 12px;">'''Description:''' Perform an invalidate instruction cache range operation</div>
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