26#ifndef _ULTIBO_DS1307_H
27#define _ULTIBO_DS1307_H
37#define DS1307_RTC_DESCRIPTION "Maxim DS1307 Real Time Clock"
39#define DS1307_MIN_TIME 125911584000000000
40#define DS1307_MAX_TIME 157469183990000000
43#define DS1307_CHIP_DS1307 0
44#define DS1307_CHIP_DS1337 1
45#define DS1307_CHIP_DS1338 2
46#define DS1307_CHIP_DS1339 3
47#define DS1307_CHIP_DS1340 4
48#define DS1307_CHIP_DS1388 5
49#define DS1307_CHIP_DS3231 6
50#define DS1307_CHIP_M41T00 7
51#define DS1307_CHIP_MCP794XX 8
52#define DS1307_CHIP_RX8025 9
55#define DS1307_REG_SECONDS 0x00
56#define DS1307_REG_MINUTE 0x01
57#define DS1307_REG_HOUR 0x02
58#define DS1307_REG_WEEKDAY 0x03
59#define DS1307_REG_DAY 0x04
60#define DS1307_REG_MONTH 0x05
61#define DS1307_REG_YEAR 0x06
64#define DS1307_REG_CONTROL 0x07
65#define DS1337_REG_CONTROL 0x0e
66#define DS1340_REG_CONTROL 0x07
67#define DS1340_REG_FLAG 0x09
68#define DS1337_REG_STATUS 0x0f
69#define DS1339_REG_ALARM1_SECONDS 0x07
70#define RX8025_REG_CONTROL1 0x0e
71#define RX8025_REG_CONTROL2 0x0f
74#define DS1307_REG_SECONDS_CH 0x80
75#define DS1340_REG_SECONDS_nEOSC 0x80
76#define MCP794XX_REG_SECONDS_ST 0x80
79#define DS1307_REG_HOUR_12HR 0x40
80#define DS1307_REG_HOUR_PM 0x20
81#define DS1340_REG_HOUR_CENTURY_EN 0x80
82#define DS1340_REG_HOUR_CENTURY 0x40
85#define MCP794XX_REG_WEEKDAY_VBATEN 0x08
88#define DS1337_REG_MONTH_CENTURY 0x80
91#define DS1307_REG_CONTROL_OUT 0x80
92#define DS1338_REG_CONTROL_OSF 0x20
93#define DS1307_REG_CONTROL_SQWE 0x10
94#define DS1307_REG_CONTROL_RS1 0x02
95#define DS1307_REG_CONTROL_RS0 0x01
98#define DS1337_REG_CONTROL_nEOSC 0x80
99#define DS1339_REG_CONTROL_BBSQI 0x20
100#define DS3231_REG_CONTROL_BBSQW 0x40
101#define DS1337_REG_CONTROL_RS2 0x10
102#define DS1337_REG_CONTROL_RS1 0x08
103#define DS1337_REG_CONTROL_INTCN 0x04
104#define DS1337_REG_CONTROL_A2IE 0x02
105#define DS1337_REG_CONTROL_A1IE 0x01
108#define DS1340_REG_CONTROL_OUT 0x80
109#define DS1340_REG_CONTROL_FT 0x40
110#define DS1340_REG_CONTROL_CALIB_SIGN 0x20
111#define DS1340_REG_CONTROL_M_CALIBRATION 0x1f
114#define DS1340_REG_FLAG_OSF 0x80
117#define DS1337_REG_STATUS_OSF 0x80
118#define DS1337_REG_STATUS_A2I 0x02
119#define DS1337_REG_STATUS_A1I 0x01
122#define RX8025_REG_CONTROL1_2412 0x20
125#define RX8025_REG_CONTROL2_PON 0x10
126#define RX8025_REG_CONTROL2_VDET 0x40
127#define RX8025_REG_CONTROL2_XST 0x20
uint8_t DS1307_RTC_TIME[7]
Definition ds1307.h:130
struct _DS1307_RTC_DEVICE DS1307_RTC_DEVICE
Definition ds1307.h:132
RTC_DEVICE *STDCALL ds1307_rtc_create(char *device, uint16_t address, uint32_t chip)
Create, register and start a new DS1307 RTC device connected to the specified I2C device.
uint32_t STDCALL ds1307_rtc_destroy(RTC_DEVICE *rtc)
Stop, deregister and destroy a DS1307 RTC device created by this driver.
#define STDCALL
Definition globaltypes.h:45
struct _I2C_DEVICE I2C_DEVICE
Definition i2c.h:81
struct _RTC_DEVICE RTC_DEVICE
Definition rtc.h:70
uint8_t nvramreg
The register offset for the NVRAM.
Definition ds1307.h:142
I2C_DEVICE * i2c
The I2C device this RTC is connected to.
Definition ds1307.h:138
uint32_t writecount
Number of direct RTC/NVRAM/Control writes to the device.
Definition ds1307.h:147
uint16_t address
The I2C address of the device.
Definition ds1307.h:139
uint8_t controlreg
The control register offset.
Definition ds1307.h:144
uint8_t nvramsize
The NVRAM size.
Definition ds1307.h:143
uint32_t readcount
Number of direct RTC/NVRAM/Control reads to the device.
Definition ds1307.h:146
RTC_DEVICE rtc
Definition ds1307.h:136
uint32_t chip
The chip type (eg DS1307_CHIP_DS1307).
Definition ds1307.h:140
uint8_t rtcreg
The register offset for the RTC.
Definition ds1307.h:141